Prosecution Insights
Last updated: May 29, 2026
Application No. 18/848,027

IMPROVED DATA INTERFACE FOR A CIRCUIT BREAKER AND SYSTEM WITH SUCH A CIRUIT BREAKER

Non-Final OA §102
Filed
Sep 17, 2024
Priority
Mar 24, 2022 — GB 2204173.5 +1 more
Examiner
YESHAW, ESAYAS G
Art Unit
2849
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Eaton Intelligent Power Limited
OA Round
2 (Non-Final)
87%
Grant Probability
Favorable
2-3
OA Rounds
8m
Est. Remaining
99%
With Interview

Examiner Intelligence

Grants 87% — above average
87%
Career Allowance Rate
573 granted / 659 resolved
+18.9% vs TC avg
Moderate +13% lift
Without
With
+12.6%
Interview Lift
resolved cases with interview
Typical timeline
2y 4m
Avg Prosecution
21 currently pending
Career history
700
Total Applications
across all art units

Statute-Specific Performance

§101
0.2%
-39.8% vs TC avg
§103
73.3%
+33.3% vs TC avg
§102
23.0%
-17.0% vs TC avg
§112
0.3%
-39.7% vs TC avg
Black line = Tech Center average estimate • Based on career data from 659 resolved cases

Office Action

§102
DETAILED ACTION The office action is in response to application filed on 11-27-25. Claims 1-4 and 7-20 are pending in the application and have been examined. Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Objections The applicant argument is persuasive and claims objection is withdrawal. Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claims 1-4 and 7-13 and 20 are rejected under 35 U.S.C. 102 (a) (1) as being anticipated by 4,338,647 to Wilson et al. (“Wilson”). Regarding claim 1, Wilson discloses a circuit breaker, comprising: a circuit breaker housing (34 in Fig.1); a switching contact (fig. 2, 18) within the circuit breaker housing (34); metallic main power terminals (terminals to a breaker are inherently metallic 12, 14), which are conductively connected to the switching contact (pushbutton 46 allows an operator to cause the spring and mechanism 20 to open the contacts 18) and which protrude through the circuit breaker housing (see col.6, 37-38, where "The terminals 12 and 14 are on the rear of the housing 34", thus must be external to and protrude from the housing within the context of a circuit breaker device); a trigger unit (20) configured to on the switching contact; a circuit breaker microcontroller (154) and a circuit breaker memory (151) within the circuit breaker housing; a circuit breaker data interface (174) which is connected to a data input and data output of the circuit breaker microcontroller, or to a data input and data output of the circuit breaker memory, wherein the circuit breaker data interface being an optical interface (see col.17,29-31); and a circuit breaker power interface (28, 146, 144), which is coupled to power pins (via the 5V supply, see col.8, 16-17) of the circuit breaker microcontroller or the circuit breaker memory wherein the circuit breaker power interface is a contactless interface (via transformers 28). Regarding claim 2, Wilson discloses the circuit breaker data interface comprises: an optical circuit breaker output sender (Col. 3, lines 15-16), which is connected to the data output or a combined data input and output (174) of the circuit breaker microcontroller or of the circuit breaker memory and which is arranged within the circuit breaker housing (fig. 1) and a circuit breaker output light guide (fig. 5, Col. 6, lines 58-65), which is optically coupled to the optical circuit breaker output sender (Col. 3, lines 15-16) and which protrudes through the circuit breaker housing (pushbutton 46 allows an operator to cause the spring and mechanism 20 to open the contacts 18) or is part of the circuit breaker housing; an optical circuit breaker input receiver (182, 186 and 192), which is connected to the data input or the combined data input and output of the circuit breaker microcontroller of the circuit breaker memory and which is arranged within the circuit breaker housing (figs. 1, 2, 10), and a circuit breaker input light guide (fig. 5, Col. 10), which is optically coupled to the optical circuit breaker input receiver and which protrudes through the circuit breaker housing (34) or is part of the circuit breaker housing. Regarding claim 3, Wilson discloses: a) the circuit breaker data interface comprises an optical circuit breaker output sender (Col. 3, lines 15-16), which is connected to the data output or a combined data input and output of the circuit breaker microcontroller (154) or the circuit breaker memory, and an optical circuit breaker output receiver (Col. 7, lines 23-26), which is optically coupled to the optical circuit breaker output sender, wherein both the optical circuit breaker output sender and the optical circuit breaker output receiver are arranged within the circuit breaker housing, and the circuit breaker further comprises metallic circuit breaker data output terminals (data bus 172 terminals to a breaker are inherently metallic), which are connected to the optical circuit breaker output receiver and which protrude through the circuit breaker housing; or the optical circuit breaker output receiver is connected to a data input or a combined data input and output (154 and 174) of an interfacing microcontroller of the circuit breaker ((154), and the circuit breaker further comprises the metallic circuit breaker data output terminals or combined circuit breaker data input and output terminals (174), which are connected to the data output or the combined data input and output of the interfacing microcontroller and which protrude through the circuit breaker housing the optic circuit breaker data interface (174) comprises an optical circuit breaker input receiver (182, 186 and 192), which is connected to the data input or the combined data input and output (174) of the circuit breaker microcontroller or of the circuit breaker memory, and an optical circuit breaker input sender (FIG. 2, is s11pplied through multiplexers 166 and 168 to multiplexer 158), which is optically coupled to the optical circuit breaker input receiver, wherein both the optical circuit breaker input sender and the optical circuit breaker input receiver are arranged within the circuit breaker housing, and the circuit breaker further comprises metallic circuit breaker data input terminals (terminals to a breaker are inherently metallic 12, 14), which are connected to the optical circuit breaker input sender and which protrude through the circuit breaker housing (fig. 2); or the optical circuit breaker input sender is connected to the data output or the combined data input and, output of an interfacing microcontroller of the circuit breaker (154), and the circuit breaker comprises metallic circuit breaker data input terminals or combined circuit breaker data input/output terminals, which are connected to the data input or the combined data input and output (174) of the interfacing microcontroller and which protrude through the circuit breaker housing. Regarding claim 4, Wilson discloses a battery (Col. 17, lines 40-41, from batteries, to the power supply 144) within the circuit breaker housing, which is connected to the power pins of the circuit breaker microcontroller (154) or the circuit breaker memory (fig. 2). Regarding claim 7, Wilson discloses the circuit breaker power interface (28, 145, 144) comprises an electromagnetic receiver (transformers 24 and 28) arranged within the circuit breaker housing. Regarding claim 8, Wilson discloses the circuit breaker power interface comprises an electromagnetic receiver (transformers 24 and 28) and an electromagnetic circuit breaker sender (Current transformers 24) electromagnetically coupled to each other and both being configured within the circuit breaker housing (fig. 2, 10), and the circuit breaker further comprises metallic circuit breaker auxiliary power terminals (Col. 7, lines 12-15), which are provided configured to feed power to the electromagnetic circuit breaker sender (Col. 8, lines 12-14, transformers 24 and 28 act as current sources and are limited to supply power to the circuit 142 at approximately 40 volts) and which protrude through the circuit breaker housing (fig. 2). Regarding claim 9, Wilson discloses a circuit breaker power stage (28, 145, 144) comprising circuit breaker switching transistors (Col. 7, lines 23-26), which is: connected to the circuit breaker power interface, configured to be controlled by an interfacing microcontroller (154) of the circuit breaker, and configured to be powered via the metallic circuit breaker auxiliary power terminals (12, 14). Regarding claim 10, Wilson discloses the metallic circuit breaker data input and output terminals or metallic auxiliary power terminals are part of an USB socket (data input and output terminals are inherently USB socket). Regarding claim 11, Wilson discloses the circuit breaker microcontroller is functionally coupled to the trigger unit and is configured: to receive tripping characteristics (Col. 2, lines 17-21) or a choice of tripping characteristics for the tripping unit through the circuit breaker data interface; or to receive a command for running a self-test and to send results of the self-test through the circuit breaker data interface. Regarding claim 12, Wilson discloses a Current sensor (fig. 11, Current sensor), which is connected to the circuit breaker microcontroller (154), wherein the circuit breaker microcontroller is configured to send a voltage measurement (708) value measured by the current sensor or a parameter derived from the measurement value (Col. 22, lines 18-25) via the circuit breaker data interface or a voltage sensor (708), which is connected to the circuit breaker microcontroller, wherein the circuit breaker microcontroller is configured to send a voltage measurement value measured by the voltage sensor or a voltage parameter derived from the voltage measurement value (Col. 22, lines 18-25) via the circuit breaker data interface. Regarding claim 13, Wilson discloses an interface (Col. 3, lines 15-16, interface means for optically coupling the trip unit means to associated apparatus) designed configured to communicate with the circuit breaker microcontroller or the circuit breaker memory (151) of the circuit breaker via the circuit breaker data interface (174) or a computer designed configured to communicate with the circuit breaker microcontroller or the circuit breaker memory of the circuit breaker via the circuit breaker data interface (174) or a computer with interface (microcomputer 154) designed configured to communicate (Col. 15, lines 15-17) with the circuit breaker microcontroller or the circuit breaker memory of the circuit breaker via the circuit breaker data interface. Regarding claim 20, Wilson discloses a circuit breaker housing (fig. 1, 34); main power terminals (fig. 2, 12, 14) comprising a first main power terminal (12) and second main power terminal (14); a switching contact (fig. 2, 18) arranged within the circuit breaker housing (fig. 1, 34), the switching contact being conductively connected to the first main power terminal (12) and the second main power terminal (14), and the switching contact being configured to controllably disconnect the first main power terminal from the second main power terminal (Col. 6, lines 11-14, connected to the terminals 12 and 14 are also connected to interrupting contacts 18 which serve to selectively open and close an electrical circuit through the circuit breaker); a circuit breaker microcontroller (154) and a circuit breaker memory (151) each arranged within the circuit breaker housing, the circuit breaker microcontroller or the circuit breaker memory having a data terminal (172), the data terminal comprising a data input, a data output or a combined data input/output (fig. 2, 174) the circuit breaker microcontroller or the circuit breaker memory having a power pin (via the 5V supply, disclosed in the reference) configured to receive operating power for the circuit breaker microcontroller or the circuit breaker memory; a trigger unit (20) functionally coupled to the circuit breaker microcontroller (#20 connected to #154 by #22) and to the switching contract, the trigger unit being configured to receive tripping characteristics (Col. 2, lines 17-21) or a choice of tripping characteristics, the trigger unit being further configured to control the switching contact (Col. 7, lines 23-26) according to the tripping characteristics; and an optical data interface (abstract, an optically coupled data input/output system), which is communicatively coupled to the data terminal; configured to receive modulated light pulses (abstract, pulse transformer receives input pulses generated by the execution of instructions in said microcomputer and supplies these pulses to a plurality of optical isolators), convert the modulated light pulses to electrical signals representing data, and transmit the electrical signals to the data terminal; and a contactless power interface (via transformers 28), which is coupled to the power pin (via the 5V supply, disclosed in the reference), and which is configured to supply the operating power to the circuit breaker microcontroller or the circuit breaker memory from an external power source (fig. 2, 145 or fig. 9, 120 AC input), the external power source being outside of the circuit breaker and galvanically separated from the circuit breaker microcontroller (fig. 2, 145 separated form 154). Allowable Subject Matter Claims 14-19 objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. The following is an examiner’s statement of reasons for the indication of allowable subject matter: Claim 14 indicated as containing allowable subject matter because prior art fails to teach or suggest, either alone or in combination all of the limitations of claim 14, especially wherein the interface comprise: an optical interface data interface, metallic interface data terminals, an interface microcontroller and an interface memory, wherein the metallic interface data terminals are connected to the interface microcontroller and wherein the optical interface data interface comprises: an optical interface input sender, which is connected to a data output or a combined data input/output of the interface microcontroller the interface memory and which is designed configured to be optically coupled to the optical circuit breaker input receiver of the circuit breaker; an optical interface output receiver, which is connected to a data input or a combined data input/output of the interface microcontroller or the interface unit memory and which is configured to be optically coupled to the optical circuit breaker output sender of the circuit breaker. Claim 15 indicated as containing allowable subject matter because prior art fails to teach or suggest, either alone or in combination all of the limitations of claim 15, especially wherein the interface comprises; i) metallic auxiliary interface power terminals; ii) an interface power interface with an electromagnetic interface sender, which is designed configured to be electromagnetically coupled to the electromagnetic receiver of the circuit breaker and iii) an interface power stage with interface switching transistors, which is connected to the interface power interface, configured to be controlled by an interface microcontroller of the interface and configured to be powered via the metallic auxiliary interface power terminals. Claim 16 indicated as containing allowable subject matter because prior art fails to teach or suggest, either alone or in combination all of the limitations of claim 16, especially wherein the circuit breaker power interface comprises an electromagnetic receiver, and wherein the electromagnetic receiver comprises a coil in series with a first circuit breaker capacitor. Response to Arguments Applicant’s argument filed on 11-27-25 with respect to claims 1-4 and 7-15 has been fully considered but are moot in view of the new grounds of rejection. Any inquiry concerning this communication or earlier communications from the examiner should be directed to ESAYAS G YESHAW whose telephone number is (571)270-1959. The examiner can normally be reached Mon-Sat 9AM-7PM. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Menna Youssef can be reached at 5712703684. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /ESAYAS G YESHAW/Examiner, Art Unit 2849 /Menatoallah Youssef/SPE, Art Unit 2849
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Prosecution Timeline

Sep 17, 2024
Application Filed
Sep 10, 2025
Non-Final Rejection mailed — §102
Nov 27, 2025
Response Filed
Apr 21, 2026
Non-Final Rejection mailed — §102 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

2-3
Expected OA Rounds
87%
Grant Probability
99%
With Interview (+12.6%)
2y 4m (~8m remaining)
Median Time to Grant
Moderate
PTA Risk
Based on 659 resolved cases by this examiner. Grant probability derived from career allowance rate.

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