Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Applicant’s election without traverse of Invention 1, claims 1-9 and 11, in the reply filed on 7/2/2026 is acknowledged.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claim 4 is rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
The term “near” in claim 4 is a relative term which renders the claim indefinite. The term “near” is not defined by the claim, the specification does not provide a standard for ascertaining the requisite degree, and one of ordinary skill in the art would not be reasonably apprised of the scope of the invention.
In order to expedite prosecution, the term “near” is construed as how it might be interpreted by a person having ordinary skill in the art.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claims 1-2 and 8-9 are rejected under 35 U.S.C. 103 as being unpatentable over “Imayoshi” (US 2017/0018492) in view of “Sunohara” (US 8,895,868).
Regarding claim 1, Imayoshi discloses 1. A glass circuit board comprising: a glass substrate serving as a core material including a first side, a second side located opposite from the first side, an outer end face located between the first side and the second side, and a through hole penetrating between the first side and the second side (Figs. 2, 4, [0056]-[0057], [0060]; the glass substrate 1 serving as a core material including a top or first side, a bottom or second side located opposite from the top or first side, an outer end face located between the first side and the second side, and a through hole 13 penetrating between the top or first side and the bottom or second side);
an insulating first resin layer covering the first side (Figs. 2, 4, [0056]-[0057], [0060]; the insulative resin layer 7 covering the top or first side);
an insulating second resin layer covering the second side (Figs. 2, 4, [0056]-[0057], [0060]; the insulative resin layer 7 covering the bottom or second side);
a third resin layer that covers an inner surface of the through hole and is continuous with the first resin layer and the second resin layer (Figs. 2, 4, [0056]-[0057], [0060]; the insulative resin layer 7 covering an inner surface of the through hole 13 and is continuous with the first resin layer and the second resin layer);
a first core wiring provided on the first side with the first resin layer interposed between the first core wiring and the first side (Figs. 2, 4, [0056]-[0057], [0060]; the upper wiring layer 8 is a first core wiring provided on the first side with the first resin layer interposed between the first core wiring and the first side);
a second core wiring provided on the second side with the second resin layer interposed between the second core wiring and the second side (Figs. 2, 4, [0056]-[0057], [0060]; the lower wiring layer 8 is a second core wiring provided on the first side with the first resin layer interposed between the first core wiring and the first side);
and a feed-through wiring provided on the inner surface of the through hole with the third resin layer interposed between the feed-through wiring and the inner surface (Figs. 2, 4, [0056]-[0057], [0060]; the through electrode 3 is a feed-through wiring provided on the inner surface of the through hole with the third resin layer interposed between the feed-through wiring and the inner surface).
Imayoshi does not disclose a fourth resin layer that covers the outer end face and is continuous with the first resin layer and the second resin layer.
Sunohara discloses a fourth resin layer that covers the outer end face and is continuous with the first resin layer and the second resin layer (Fig. 2F, col. 4, lines 9-55; the layer 115 serves as an insulating layer that covers the outer end face and is continuous with the first resin layer and the second resin layer).
It would have been obvious to a person having ordinary skill in the art, before the effective filing date of the claimed invention, to have constructed Imayoshi’s glass board with Sunohara’s insulating layer in order to reduce the occurrence of delamination in a wiring pattern, as suggested by Sunohara at col. 4, lines 50-55.
Regarding claim 2, Imayoshi in view of Sunohara discloses the claimed invention as applied to claim 1, above.
Imayoshi does not disclose the limitations of claim 2.
Sunohara discloses 2. The glass circuit board according to claim 1, wherein the first resin layer, the second resin layer, the third resin layer, and the fourth resin layer are made of the same insulating resin material (Fig. 2F, col. 4, lines 9-55; the layer 115 includes the top, bottom, and both end sides and is made of the same insulating material).
Regarding claim 8, Imayoshi in view of Sunohara discloses the claimed invention as applied to claim 1, above.
Imayoshi discloses 8. The glass circuit board according to claim 1, wherein the through hole is filled with the feed-through wiring (Figs. 2, 4, [0056]-[0057], [0060]; the through hole 13 is filled with the through electrode 3 which is a feed-through wiring).
Regarding claim 9, Imayoshi in view of Sunohara discloses the claimed invention as applied to claim 1, above.
Imayoshi discloses 9. The glass circuit board according to claim 1, further comprising a frame that accommodates the glass substrate (Fig. 2, [0056]-[0057], [0060], [0123]; the solder resist 12 is a frame that accommodates the glass substrate 1).
Imayoshi does not disclose the fourth resin layer fills a clearance between the frame and the outer end face of the glass substrate.
Sunohara discloses the fourth resin layer fills a clearance between the frame and the outer end face of the glass substrate (Fig. 7, col. 11, line 27; the layer 115 serves as an insulating layer that fills a clearance between the dielectric layer 316 and the outer end face of the glass substrate).
Claims 3-5 and 7 are rejected under 35 U.S.C. 103 as being unpatentable over Imayoshi in view of Sunohara and “Abe” (US 2009/0308651).
Regarding claim 3, Imayoshi in view of Sunohara discloses the claimed invention as applied to claim 1, above.
Imayoshi does not disclose the limitations of claim 1.
Abe discloses an embedded resin in the through hole, wherein the feed-through wiring is located between the third resin layer and the embedded resin (Fig. 6B, [0096]-[0097]; an embedded resin layer 86 in the through hole inside of the feed-through wiring).
It would have been obvious to a person having ordinary skill in the art, before the effective filing date of the claimed invention, to have constructed Imayoshi’s glass board, as modified by Sunohara, with Abe’s embedded resin layer in order to facilitate the miniaturization and a pitch reduction of not only the wiring but also of through holes formed in a core substrate, as suggested by Abe at [0015].
Regarding claim 4, Imayoshi in view of Sunohara and Abe discloses the claimed invention as applied to claim 3, above.
Imayoshi discloses 4. The glass circuit board according to claim 3, further comprising a first interlayer insulating film that is provided near the first side of the glass substrate and covers the first core wiring (Figs. 2, 4, [0056]-[0057], [0060]; the upper insulative resin layer 7 is a first interlayer insulating film that is provided near the first side of the glass substrate and covers the first core wiring. Examiner’s note: see the 112 rejection above for the construction the word “near”.);
and a second interlayer insulating film that is provided near the second side of the glass substrate and covers the second core wiring (Figs. 2, 4, [0056]-[0057], [0060]; the lower insulative resin layer 7 is a first interlayer insulating film that is provided near the second side of the glass substrate and covers the second core wiring. Examiner’s note: see the 112 rejection above for the construction the word “near”.).
Imayoshi does not disclose wherein the first interlayer insulating film and the second interlayer insulating film are made of the same insulating resin material as the embedded resin.
It would have been obvious to one having ordinary skill in the art, before the effective filing date of the claimed invention, to have constructed Imayoshi’s glass board, as modified by Sunohara and Abe, with the embedded resin made of the same insulating material as the first and second interlayer insulating films, since it has been held to be within the general skill of a worker in the art to select a known material on the basis of its suitability for the intended use as a matter of obvious design choice. In re Leshin, 125 USPQ 416. Doing so would have predictably simplified the construction process by reducing the number of choices for the insulating resin material.
Regarding claim 5, Imayoshi in view of Sunohara and Abe discloses the claimed invention as applied to claim 3, above.
Imayoshi does not disclose wherein the embedded resin is made of the same insulating resin material as the third resin layer.
It would have been obvious to one having ordinary skill in the art, before the effective filing date of the claimed invention, to have constructed Imayoshi’s glass board, as modified by Sunohara and Abe, with the embedded resin made of the same insulating material as the third resin layer, since it has been held to be within the general skill of a worker in the art to select a known material on the basis of its suitability for the intended use as a matter of obvious design choice. In re Leshin, 125 USPQ 416. Doing so would have predictably simplified the construction process by reducing the number of choices for the insulating resin material.
Regarding claim 7, Imayoshi in view of Sunohara and Abe discloses the claimed invention as applied to claim 3, above.
Imayoshi does not disclose the limitations of claim 7.
Abe discloses 7. The glass circuit board according to claim 3, further comprising a conductive lid portion that is disposed on an opening end of the through hole and covers the embedded resin (Fig. 6E, [0096]-[0097]; the copper layer 87 is a conductive lid portion that is disposed on an opening end of the through hole and covers the embedded resin).
Claim 6 is rejected under 35 U.S.C. 103 as being unpatentable over Imayoshi in view of Sunohara, Abe and “Ogino” (US 2004/0195567).
Regarding claim 6, Imayoshi in view of Sunohara and Abe discloses the claimed invention as applied to claim 3, above.
Imayoshi does not disclose the limitations of claim 6.
Abe discloses the embedded resin is made of a resin material (Fig. 6B, [0096]-[0097]; an embedded resin layer 86 in the through hole inside of the feed-through wiring).
It would have been obvious to a person having ordinary skill in the art, before the effective filing date of the claimed invention, to have constructed Imayoshi’s glass board, as modified by Sunohara, with Abe’s embedded resin layer to be made from conductive resin material since Abe, Fig. 5L and [0095] teaches that the embedded material or the copper layer 69 which is a conductive material. Doing so would facilitate the miniaturization and a pitch reduction of not only the wiring but also of through holes formed in a core substrate, as suggested by Abe at [0015].
Ogino discloses via holes are filled with conductive resin ([0016]; the via holes are formed on a glass substrate and are filled with conductive resin).
It would have been obvious to a person having ordinary skill in the art, before the effective filing date of the claimed invention, to have constructed Imayoshi’s glass board, as modified by Sunohara and Abe, with Ogino’s conductive resin in order to form a conductive member inside the via holes provided in the glass substrate, as suggested by Ogino at [0016].
Claim 11 is rejected under 35 U.S.C. 103 as being unpatentable over Imayoshi in view of Sunohara and “Fukuda” (US 2019/0067350).
Regarding claim 11, Imayoshi discloses 11. An imaging device comprising: a glass circuit board; the glass circuit board including: a glass substrate serving as a core material including a first side, a second side located opposite from the first side, an outer end face located between the first side and the second side, and a through hole penetrating between the first side and the second side (Figs. 2, 4, [0056]-[0057], [0060]; the glass substrate 1 serving as a core material including a top or first side, a bottom or second side located opposite from the top or first side, an outer end face located between the first side and the second side, and a through hole 13 penetrating between the top or first side and the bottom or second side);
an insulating first resin layer covering the first side (Figs. 2, 4, [0056]-[0057], [0060]; the insulative resin layer 7 covering the top or first side);
an insulating second resin layer covering the second side (Figs. 2, 4, [0056]-[0057], [0060]; the insulative resin layer 7 covering the bottom or second side);
a third resin layer that covers an inner surface of the through hole and is continuous with the first resin layer and the second resin layer (Figs. 2, 4, [0056]-[0057], [0060]; the insulative resin layer 7 covering an inner surface of the through hole 13 and is continuous with the first resin layer and the second resin layer);
a first core wiring provided on the first side with the first resin layer interposed between the first core wiring and the first side (Figs. 2, 4, [0056]-[0057], [0060]; the upper wiring layer 8 is a first core wiring provided on the first side with the first resin layer interposed between the first core wiring and the first side);
a second core wiring provided on the second side with the second resin layer interposed between the second core wiring and the second side (Figs. 2, 4, [0056]-[0057], [0060]; the lower wiring layer 8 is a second core wiring provided on the first side with the first resin layer interposed between the first core wiring and the first side);
and a feed-through wiring provided on the inner surface of the through hole with the third resin layer interposed between the feed-through wiring and the inner surface (Figs. 2, 4, [0056]-[0057], [0060]; the through electrode 3 is a feed-through wiring provided on the inner surface of the through hole with the third resin layer interposed between the feed-through wiring and the inner surface).
Imayoshi does not disclose an imaging element attached to the circuit board, and a fourth resin layer that covers the outer end face and is continuous with the first resin layer and the second resin layer.
Sunohara discloses a fourth resin layer that covers the outer end face and is continuous with the first resin layer and the second resin layer (Fig. 2F, col. 4, lines 9-55; the layer 115 serves as an insulating layer is that covers the outer end face and is continuous with the first resin layer and the second resin layer).
It would have been obvious to a person having ordinary skill in the art, before the effective filing date of the claimed invention, to have constructed Imayoshi’s glass board with Sunohara’s insulating layer in order to reduce the occurrence of delamination in a wiring pattern, as suggested by Sunohara at col. 4, lines 50-55.
Fukuda discloses an imaging element attached to the circuit board (Fig. 1, [0042]; the image pickup element 10 is attached to the circuit board 20).
It would have been obvious to a person having ordinary skill in the art, before the effective filing date of the claimed invention, to have constructed Imayoshi’s glass board, as modified by Sunohara, with Fukuda’s imaging element configuration in order to be capable of dissipating inside heat to the lens holder via a metal plate provided in the frame, as suggested by Fukuda at [0003].
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to STANLEY TSO whose telephone number is (571)270-0723. The examiner can normally be reached Tu-Thurs 6am-6pm, alt M 6am-2pm.
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/STANLEY TSO/Primary Examiner, Art Unit 2847
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