DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
This is a NON-FINAL OFFICE ACTION in response to the present Application filed 09/23/2024. Claim 3 is cancelled. Claims 1-2 and 4-21 are pending in the Application, of which Claim 1 is independent.
Continuity/ Priority Information
The present Application 18849579 filed 09/23/2024 is a National Stage entry of PCT/IL2023/050236, filed 03/07/2023, which Claims Priority from Provisional Application 63269828, filed 03/23/2022.
Information Disclosure Statement
The information disclosure statement (IDS) submitted on 09/23/2024 is in compliance with the provisions of 37 CFR 1.97. Accordingly, the IDS has been considered by the examiner.
Claim Rejections - 35 USC § 101
35 U.S.C. 101 reads as follows:
Whoever invents or discovers any new and useful process, machine, manufacture, or composition of matter, or any new and useful improvement thereof, may obtain a patent therefor, subject to the conditions and requirements of this title.
Claims 1-2 and 4-21 are rejected under 35 U.S.C. 101 because the claimed invention is directed to an abstract idea without significantly more.
Independent Claim 1 recite an abstract idea directed to a group of mathematical concepts, under Step 2A Prong 1, according to the 2019 Revised Patent Subject Matter Eligibility Guidance, comprising the limitations:
defining a noisy evolution operator, K, associated with a noisy evolution of said quantum circuit, said noisy evolution operator, K, being configured to execute a Hamiltonian drive H(t) which generates said noise-free evolution U in the absence of noise;
defining a corresponding inverse noisy evolution operator, K I, being a pulse inverse operator configured to execute a corresponding inverse Hamiltonian drive Hr(t) =-H(T- t) where T is total execution time of K;
creating an operator KIK, which is an approximate square of a noise channel associated with K, said operator KX1C representing execution of said Hamiltonian drive H(t) followed by execution of said corresponding inverse Hamiltonian drive Hi(t) thereby enabling error mitigation of noise in said quantum system.
The limitations recited in the Claims, which as drafted, are directed to a group of mathematical concepts. According to the 2019 Revised Patent Subject Matter Eligibility Guidance (“2019 PEG”), under their broadest reasonable interpretation, the limitations cover performance of mathematical concepts, such as, mathematical relationships, mathematical formulas or equations, and mathematical calculations. If a claim limitation, under its broadest reasonable interpretation, covers performance of mathematical calculations, then it falls within the “Mathematical Concepts” of abstract ideas.
For example, the above limitations as drafted, is a process that, under its broadest reasonable interpretation, covers performance of mathematical relationships but for the recitation of a “processor” (as recited in Claim 17, and processor 116A, shown in Fig. 1) for carrying out the process.
The limitations as recited in the Claims “defining a noisy evolution operator, K” and defining a corresponding inverse noisy evolution operator, KI” are both mathematical concepts, which are judicially excepted mathematical subject matter, as also evident by Applicant’s specification.
Also, defining a corresponding inverse noisy evolution operator, KI, to execute a corresponding inverse Hamiltonian drive Hr(t) =-H(T- t), is a concept as evident by the equation for calculating an inverse Hamiltonian drive.
This judicial exception is not integrated into a practical application, under Step 2A Prong 2, of the 2019 Revised Patent Subject Matter Eligibility Guidance. In particular, the claim recites additional elements using a “processor” to perform operations. In this case, the processor in all steps is recited at a high-level of generality (i.e., as a generic processor performing a generic computer function) such that it amounts no more than mere software instructions to apply the exception using a generic computer component. Accordingly, this additional element does not integrate the abstract idea into a practical application because it does not impose any meaningful limits on practicing the abstract idea. The claim is directed to an abstract idea.
The claim does not include additional elements that are sufficient to amount to significantly more than the judicial exception. As discussed above with respect to integration of the abstract idea into a practical application, the additional element of using a processor to perform instructions amounts to no more than mere software instructions to apply the exception using a generic computer component. Mere instructions to apply an exception using a generic computer component cannot provide an inventive concept. The claim is not patent eligible.
Additionally, the software instructions must produce a useful, concrete and tangible result otherwise the claims fail the 35 U.S.C. 101 statutory requirement. The software constitutes an abstract idea without any tangible results, and without further reciting any practical applications, for achieving such results.
Dependent Claims 2 and 4-21 recite no additional limitations that would amount to significantly more than the abstract idea defined by the respective independent claims. For example, dependent Claims 4 and 5, recite a series of mathematical equations for defining a noise mitigated evolution operator which is an abstract idea directed to a group of mathematical concepts.
The claimed invention does not include significantly more than the judicial exception and thus does not satisfy the requirements of subject matter eligibility under 35 USC 101. Accordingly, for the reasons provided above, claims 1-2 and 4-21 are directed to an abstract idea, hence, not patent eligible under 35 USC 101.
Prior Art References Cited
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. See References Cited on PTO-892 form.
Sitdikov et al. US 20250086492 [0151] Furthermore, in one embodiment, the noisy expectation values of the training data are generated by sampling parameters of parameterized circuits using Hamiltonian time evolution, such as Trotterized spin dynamics. In one embodiment, Hamiltonians are hermitian operators that are a sum of a large number of individual Hamiltonians Hj.
SAXENA et al. US 20250278663 [0151] In more detail, the quantum computing device can perform a method of error mitigation by restricted evolution (EMRE) by decomposing each quantum gate within the quantum circuit, in which each quantum gate is approximated and replaced with a corresponding convex combination of noisy implementable gates to generate an updated quantum circuit configuration, which is a close approximation of the original quantum circuit.
ZHANG et al. US 20230121176 [0059] As the expectation value of the target function can be a result of performing quantum error mitigation (QEM) on noise of the pqc through the neural network, steps 220 through 250 can be executed to perform quantum error mitigation (QEM) on noise of the pqc.
Mitchell et al. US 20250384325 See Abstract, The noise models for each of the sub-layers are then learned on the reduced set of learning layers. Such learned noise models are combined to form a complete set of noise models for the target layers of the quantum circuit and used to perform quantum error mitigation on the quantum circuit.
Montanaro et al. US 20220245500 [0016] One notable advantage is that error mitigation can be performed post-hoc—that is the noisy values can be corrected after the algorithm is performed using the quantum information processor. Another notable advantage is that the error mitigation can be performed without changing the quantum circuit executed as at least a part of the algorithm.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to JAMES C KERVEROS whose telephone number is (571)272-3824. The examiner can normally be reached 9-5.
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/JAMES C KERVEROS/Primary Examiner, Art Unit 2111
Date: February 20, 2026
Non-Final Rejection 20260211
JAMES C. KERVEROS
Primary Examiner, Art Unit 2111
James.Kerveros@USPTO.GOV
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