DETAILED ACTION
1. Claims 1-16 are pending in this application filed on October 22, 2024. Claim 10 was subject to restriction and is withdrawn from consideration in this examination. Claims 1-9 and 11-16 are subject to examination.
Notice of Pre-AIA or AIA Status
2. The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
IDS
3. The examiner notes that the copy of the non-patent literature document authored by Pal et. al. supplied with the IDS is a version published in Nature on August 15, 2022, not the pre-publication version available earlier on the Internet cited in the IDS. A copy of the article cited in the IDS is included in this Office action and listed again on PTO-892.
Claim Rejections - 35 USC § 112
4. The following is a quotation of the first paragraph of 35 U.S.C. 112(a):
(a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention.
The following is a quotation of the first paragraph of pre-AIA 35 U.S.C. 112:
The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor of carrying out his invention.
5. Claims 7-9, 11-12, and 14-16 rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the written description requirement. The claim(s) contains subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, or for applications subject to pre-AIA 35 U.S.C. 112, the inventor(s), at the time the application was filed, had possession of the claimed invention.
6. Claims 7-9 and 14-16 claims a racetrack memory device comprising a reading element according to claim 1. However, the specification does not describe a racetrack memory device with sufficient detail that one skilled in the art can reasonably conclude that the inventor had possession of the claimed racetrack memory with the claimed reading element for a racetrack memory. The only disclosure of the claimed racetrack memory device is FIG. 1.
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In paragraph [0009], the specification discloses that “FIG.1 is an illustration of a complete racetrack memory device including a racetrack layer (1), a write element (2), a readhead (3) and a shift element (4) to move magnetic bits along the racetrack.” There’s no other description of this racetrack memory “device.” While the specification discloses “elements” that can be used in a memory device, there’s no disclosure of any physical and logical control structures and circuits necessary in a memory device to store data and access data stored in the device. There’s not even a functional description of any of the “elements” of this device.
7. With respect to claim 11, there’s no disclosure of any electronic switch comprising a read element according to claim 1. In the absence of any disclosure, one skilled in the art would not be able to reasonably conclude that the inventor had possession of the claimed switch with the claimed reading element for a racetrack memory.
8. With respect to claim 12, there’s no disclosure of any quantum computer comprising a read element according to claim 1. In the absence of any disclosure, one skilled in the art would not be able to reasonably conclude that the inventor had possession of the claimed quantum computer with the claimed reading element for a racetrack memory.
9. Claim 7-9, 11-12, and 14-16 are rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the enablement requirement. The claim(s) contains subject matter which was not described in the specification in such a way as to enable one skilled in the art to which it pertains, or with which it is most nearly connected, to make and/or use the invention.
Regarding claims 7-9 and 14-16, the specification merely discloses “elements” that may be used in a racetrack memory device, but there’s no actual description of a functional memory device. Description of individual elements that potentially may be used in an actual racetrack memory is insufficient to allow one of ordinary skill in the art to make and use the claimed racetrack memory device with read elements as claimed in claim 1.
Regarding claims 11 and 12, there’s no description of a switch or a quantum computer comprising a read element for a racetrack memory, much less an enabling disclosure sufficient for one skilled in the art to make and use the claimed switch or the quantum computer.
Claim Rejections - 35 USC § 102
10. In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
11. Claims 1-6 and 13 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Pal et. al., “Josephson diode effect from Cooper pair momentum in a topological semimetal,” 21 December 2021 (hereinafter “Pal”).
12. With respect to claim 1, Pal discloses a reading element for a racetrack memory (RTM) comprising two superconducting electrodes (S) made of a superconducting material, which electrodes are separated by a topological metal (N) with a spin-polarized surface state, which exhibits a band inversion (Figures a-c).
13. With respect to claim 2, Pal discloses the reading element according to claim 1, wherein the topological metal is a two-dimensional, centrosymmetric, type-II, Dirac semi-metal.
14. With respect to claim 3, Pal discloses the reading element according to claim 1, wherein the topological metal is NiTe2 (see p.1, 1st paragraph), PdTe2 or PtTe2.
15. With respect to claim 4, Pal discloses the reading element according to claim 3, wherein the topological metal is NiTe2 (see p.1, 1st paragraph).
16. With respect to claim 5, Pal discloses the reading element according to claim 1, wherein the superconducting material of the superconducting electrodes(S) are selected from: Al, Be, Bi, Ga, Hf, α-La, β-La, Mo, Nb (see p. 2, 1st paragraph), Os, Pb, Re, Rh, Ru, Sn, Ta, α-Th, Ti, V, α-W, β-W, Zn, Zr, FeB4, InN, In2O3, LaB6, MgB2, Nb13Al, NbC1-xNx, Nb3Ge, NbO, NbN, Nb3Sn, NbTi, TiN, V3Si, YB6, ZrN, ZrB12, Yttrium barium copper oxide (YBCO), Bismuth strontium calcium copper oxide (BSCCO), or Mercury bismuth calcium copper oxide (HBCCO).
17. With respect to claim 6, Pal discloses the reading element according to claim 1, wherein the lateral spacing between the superconducting electrodes is from about 10 nm to about 1 micron (see Figure a).
18. With respect to claim 13, Pal the reading element according to claim 5, wherein the superconducting material of the superconducting electrodes(S) is Nb or NbN (see the rejection of claim 5 above).
19. Claim 1 is rejected under 35 U.S.C. 102(a)(1) as being anticipated by Tanaka et. al,, “Manipulation of the Majorana Fermion, Adreev Reflection, and Josephson Current on Topological Insulators,” Sepember 4, 2021 (hereinafter “Tanaka”).
Tanaka discloses a reading element for a racetrack memory (RTM) comprising two superconducting electrodes (S) made of a superconducting (see FIG. 1(b)).
20. Claim 1 is rejected under 35 U.S.C. 102(a)(1) as being anticipated by Matthias Eschrig, “Sping-polarized supercurrents for spintronics: a review of current progress,” Sepember 23, 2015 (hereinafter “Eschrig”).
Eschrig discloses a reading element for a racetrack memory (RTM) comprising two superconducting electrodes (S) made of a superconducting (see p. 38, left column, last paragraph, “This connects to the current hot topic of topological materials, in particular topological insulators and superconductors, both systems with strong spin-orbit coupling. As an example of the extremely rich plethora of effects involving topological materials we mention here the possibility to observe chiral Majorana modes in one-dimensional channels build at a superconductor/ferromagnetic-insulator/superconductor junction on top of a topological insulator. …”).
Claim Rejections - 35 USC § 103
21. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
22. Claims 7 are rejected under 35 U.S.C. 103 as being obvious over Pal, Tanaka, or Eschrig in view of US Pub. 2020/0294565 (“Apalkov”).
With respect to claim 7, Pal discloses a reading element according to claim 1 as discussed above. However, Pal does not specifically disclose a racetrack memory. On the other hand, Apalkov discloses a racetrack memory (see FIGs, 1-8). It would have been obvious to use Pal’s discovery in the racetrack memory system of Apalkov. Pal discloses that “[t]he observed giant magnitude of the asymmetry in critical current and the clear exposition of its underlying mechanism paves the way to building novel superconducting computing devices using the Josephson diode effect.” Tanaka discloses that “chiral Majorana mode generated in N/FI/S and S.FI/S junctions is very sensitively controlled by the direction of the magnetism m in the FI region,” which would make the device suitable for detecting data recorded on magnetic racetrack memory device.
Conclusion
23. Any inquiry concerning this communication or earlier communications from the examiner should be directed to Woo H Choi whose telephone number is (571)272-4179. The examiner can normally be reached 9 am - 5 pm.
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/Woo H Choi/
Primary Examiner,
Art Unit 3992
Prosecution Insights