Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
Information Disclosure Statement
The information disclosure statement (IDS) submitted on 10/23/2024 has been considered by the examiner.
Oath/Declaration
Oath/Declaration as file 10/23/2024 is noted by the Examiner.
Claim Objections
Claims 1, 21 and 26 objected to because of the following informalities:
Independent Claims 1, 21 and 26 each recite an “AC filter” without disclosing what “AC” stands for. Please disclose what “AC” stands for, regardless of how obvious it may seem.
Appropriate correction is required.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 1-29 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 1 recites the limitation “…generate a first flag indicative of failure, degradation, or malfunction of a first capacitor or capacitor bank based on the first harmonic current …” in lines 10-12 of Claim 1. It is not clear if the underlined limitation in question refers to the same “first harmonic current based on the first current flowing through the first circuit coupled to the line node” disclosed earlier in Claim 1 or if it refers to a different “first harmonic current”. If this is the case, then please change the limitation in question to “the first harmonic current based on the first current flowing through the first circuit coupled to the line node”.
Claim 1 recites the limitation “…generate a first flag indicative of failure, degradation, or malfunction of a first capacitor or capacitor bank based on the first harmonic current and the filter harmonic current …” in lines 10-12 of Claim 1. It is not clear if the underlined limitation in question refers to the same “filter harmonic current based on the filter current flowing through the AC filter coupled to the line node” disclosed earlier in Claim 1 or if it refers to a different “first harmonic current”. If this is the case, then please change the limitation in question to “the filter harmonic current based on the filter current flowing through the AC filter coupled to the line node”.
Claim 2 recites the limitation “…wherein the controller is configured to generate the first flag when the filter harmonic current is within…” in lines 1-3 of Claim 2. It is not clear if the underlined limitation in question refers to the same “filter harmonic current based on the filter current flowing through the AC filter coupled to the line node” disclosed earlier in Claim 1 or if it refers to a different “first harmonic current”. If this is the case, then please change the limitation in question to “the filter harmonic current based on the filter current flowing through the AC filter coupled to the line node”.
Claim 2 recites the limitation “…wherein the controller is configured to generate the first flag when the filter harmonic current is within a predetermined tolerance of the first harmonic current.” in lines 1-3 of Claim 2. It is not clear if the underlined limitation in question refers to the same “first harmonic current based on the first current flowing through the first circuit coupled to the line node” disclosed earlier in Claim 1 or if it refers to a different “first harmonic current”. If this is the case, then please change the limitation in question to “the first harmonic current based on the first current flowing through the first circuit coupled to the line node”.
Claim 3 recites the limitation “…wherein
I
F
n
t
h
represents the filter harmonic current …” in lines 4-5 of Claim 3. It is not clear if the underlined limitation in question refers to the same “filter harmonic current based on the filter current flowing through the AC filter coupled to the line node” disclosed earlier in Claim 1 or if it refers to a different “first harmonic current”. If this is the case, then please change the limitation in question to “the filter harmonic current based on the filter current flowing through the AC filter coupled to the line node”.
Claim 3 recites the limitation "… wherein
I
1
s
t
n
t
h
represents the first circuit harmonic current …" in lines 4-5 of Claim 3. There is insufficient antecedent basis for this limitation in the claim. There is no prior disclosure of a “first circuit harmonic current” before this moment.
Claim 4 recites the limitation “…wherein the first harmonic current corresponds to the
n
t
h
harmonic of the fundamental frequency…” in lines 3-4 of Claim 4. It is not clear if the underlined limitation in question refers to the same “first harmonic current based on the first current flowing through the first circuit coupled to the line node” disclosed earlier in Claim 1 or if it refers to a different “first harmonic current”. If this is the case, then please change the limitation in question to “the first harmonic current based on the first current flowing through the first circuit coupled to the line node”.
Claim 4 recites the limitation “…wherein the filter harmonic current corresponds to the
n
t
h
harmonic of a fundamental frequency…” in lines 4-5 of Claim 4. It is not clear if the underlined limitation in question refers to the same “filter harmonic current based on the filter current flowing through the AC filter coupled to the line node” disclosed earlier in Claim 1 or if it refers to a different “first harmonic current”. If this is the case, then please change the limitation in question to “the filter harmonic current based on the filter current flowing through the AC filter coupled to the line node”.
Claim 6 recites the limitation “…wherein the controller is configured to continuously determine the first harmonic current and…” in lines 1-2 of Claim 6. It is not clear if the underlined limitation in question refers to the same “first harmonic current based on the first current flowing through the first circuit coupled to the line node” disclosed earlier in Claim 1 or if it refers to a different “first harmonic current”. If this is the case, then please change the limitation in question to “the first harmonic current based on the first current flowing through the first circuit coupled to the line node”.
Claim 6 recites the limitation “…wherein the controller is configured to continuously determine the first harmonic current and the filter harmonic current.” in lines 1-2 of Claim 6. It is not clear if the underlined limitation in question refers to the same “filter harmonic current based on the filter current flowing through the AC filter coupled to the line node” disclosed earlier in Claim 1 or if it refers to a different “first harmonic current”. If this is the case, then please change the limitation in question to “the filter harmonic current based on the filter current flowing through the AC filter coupled to the line node”.
Claim 19 recites the limitation “…, wherein the first circuit is a thyristor-controlled reactor (TCR) circuit…” in lines 1-2 of Claim 19. It is not clear if the underlined limitation in question refers to the same “first circuit coupled to the line node” disclosed earlier in Claim 1 or if it refers to a different “first circuit”. If this is the case, then please change the limitation in question to “the first circuit coupled to the line node”.
Claim 20 recites the limitation “…wherein the controller is configured to: determine the first harmonic current by performing a Fourier transform …” in lines 3-4 of Claim 20. It is not clear if the underlined limitation in question refers to the same “first harmonic current based on the first current flowing through the first circuit coupled to the line node” disclosed earlier in Claim 1 or if it refers to a different “first harmonic current”. If this is the case, then please change the limitation in question to “the first harmonic current based on the first current flowing through the first circuit coupled to the line node”.
Claim 20 recites the limitation “…and determine the filter harmonic current by performing a Fourier transform on the filter current data.” in lines 5-6 of Claim 20. It is not clear if the underlined limitation in question refers to the same “filter harmonic current based on the filter current flowing through the AC filter coupled to the line node” disclosed earlier in Claim 1 or if it refers to a different “first harmonic current”. If this is the case, then please change the limitation in question to “the filter harmonic current based on the filter current flowing through the AC filter coupled to the line node”.
Claim 21 recites the limitation “…generating a first flag indicative of failure, degradation, or malfunction of a first capacitor or capacitor bank based on the first harmonic current …” in lines 6-8 of Claim 21. It is not clear if the underlined limitation in question refers to the same “first harmonic current based on the first current flowing through the first circuit coupled to the line node” disclosed earlier in Claim 21 or if it refers to a different “first harmonic current”. If this is the case, then please change the limitation in question to “the first harmonic current based on the first current flowing through the first circuit coupled to the line node”.
Claim 21 recites the limitation “…and the filter harmonic current, wherein the AC filter comprises the first capacitor or capacitor bank.” in lines 6-8 of Claim 21. It is not clear if the underlined limitation in question refers to the same “filter harmonic current based on the filter current flowing through the AC filter coupled to the line node” disclosed earlier in Claim 21 or if it refers to a different “first harmonic current”. If this is the case, then please change the limitation in question to “the filter harmonic current based on the filter current flowing through the AC filter coupled to the line node”.
Claim 27 recites the limitation “…and generate a second flag indicative of failure, degradation, or malfunction of a first capacitor or capacitor bank based on the first harmonic current and…” in lines 8-10 of Claim 27. It is not clear if the underlined limitation in question refers to the same “first harmonic current based on the first current flowing through the first circuit coupled to the line node” disclosed earlier in Claim 27 or if it refers to a different “first harmonic current”. If this is the case, then please change the limitation in question to “the first harmonic current based on the first current flowing through the first circuit coupled to the line node”.
Claim 27 recites the limitation “…and the filter harmonic current, wherein the controller is configured to determine the M capacitance values in response to the second flag…” in lines 8-10 of Claim 27. It is not clear if the underlined limitation in question refers to the same “filter harmonic current (based on a filter current flowing through the AC filter” disclosed earlier in Claim 27 or if it refers to a different “first harmonic current”. If this is the case, then please change the limitation in question to “the filter harmonic current (based on a filter current flowing through the AC filter”.
Claims 2-20 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph as they further limit Claim 1.
Claims 22-25 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph as they further limit Claim 21.
Please make the proper corrections.
Claim Rejections - 35 USC § 102
27. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
28. Claim(s) 1-3, 6 and 19-21 are rejected under 35 U.S.C. 102(a)(1)/102(a)(2) as being anticipated by Patel et al. US 2013/0286692 (Provided by Applicant; Hereinafter Patel).
Regarding claim 1, Patel teaches an electronic circuit (Figs. 1, 3) comprising:
one or more input terminals (Figs. 1, 3; inputs into controller 60) configured to receive measurement data (Figs. 1, 3; inputs into controller 60); and
a controller (Figs. 1, 3; controller, 60) configured to:
determine a first harmonic current (Figs. 1, 3; [0031-0034]) based on a first current flowing through a first circuit (Figs. 1, 3; [0031-0034]) coupled to a line node (Figs. 1, 3; [0031-0034]), wherein the measurement data comprises first current data (Figs. 1, 3; [0031-0034]) indicative of the first current (Figs. 1, 3; [0031-0034]),
determine a filter harmonic current (Figs. 1, 3; [0033]; “In certain embodiments, the low pass filter 61 has a cutoff frequency FCUTOFF set to approximately 200 Hz, which is between second and third harmonics of the fundamental frequency of the AC input source 4 (e.g., for a source frequency of 50 Hz or 60 Hz)”) based on a filter current (Figs. 1, 3; Ica, Icb, Icc) flowing through an AC filter (Figs. 1, 3; filter capacitors, CF) coupled to the line node (Figs. 1, 3; filter capacitors, CF), wherein the measurement data comprises filter current data indicative of the filter current (Figs. 1, 3; inputs into controller 60 from current sensor attached to CF), and
generate a first flag (Figs. 1, 3; 66) indicative of failure, degradation, or malfunction of a first capacitor or capacitor bank (Figs. 1, 3; filter capacitors, CF) based on the first harmonic current (Figs. 1, 3; [0031-0034]; 66) and the filter harmonic current (Figs. 1, 3; [0031-0034]; 66), wherein the AC filter (Figs. 1, 3; filter capacitors, CF) comprises the first capacitor or capacitor bank (Figs. 1, 3; filter capacitors, CF).
Regarding claim 2, Patel further teaches the electronic circuit of claim 1, wherein the controller (Figs. 1, 3; controller, 60) is configured to generate the first flag (Figs. 1, 3; 66) when the filter harmonic current is within a predetermined tolerance of the first harmonic current (Figs. 1, 3; 66).
Regarding claim 3, Patel further teaches the electronic circuit of claim 1, wherein the controller (Figs. 1, 3; controller, 60) is configured to generate the first flag (Figs. 1, 3; 66) when
PNG
media_image1.png
84
177
media_image1.png
Greyscale
wherein
I
F
n
t
h
represents the filter harmonic current (Figs. 1, 3; [0031-0034]), wherein
I
1
s
t
n
t
h
represents the first circuit harmonic current (Figs. 1, 3; [0031-0034]), and wherein
I
t
h
r
e
s
n
t
h
is higher than 90% (Figs. 1, 3; [0031-0034]; 60, 66).
Regarding claim 6, Patel further teaches the electronic circuit of claim 1, wherein the controller (Figs. 1, 3; controller, 60) is configured to continuously determine the first harmonic current (Figs. 1, 3; [0031-0034]) and the filter harmonic current (Figs. 1, 3; [0031-0034]).
Regarding claim 19, Patel further teaches the electronic circuit of claim 1, wherein the first circuit is a thyristor-controlled reactor (TCR) circuit, a voltage-source converter (VSC), or a high-voltage direct current (HVDC) converter (Figs. 1, 3; [0031-0034]).
Regarding claim 20, Patel further teaches the electronic circuit of claim 1, wherein the controller (Figs. 1, 3; [0031-0034]; controller, 60) is configured to: determine the first harmonic current by performing a Fourier transform on the first current data (Figs. 1, 3; [0031-0034]; controller, 60); and determine the filter harmonic current by performing a Fourier transform on the filter current data (Figs. 1, 3; [0031-0034]; controller, 60).
Regarding claim 21, Patel teaches a method (Figs. 1, 3) comprising:
determining a first harmonic current (Figs. 1, 3; [0031-0034]) based on a first current (Figs. 1, 3; [0031-0034]) flowing through a first circuit (Figs. 1, 3; [0031-0034]) coupled to a line node (Figs. 1, 3; [0031-0034]);
determining a filter harmonic current Figs. 1, 3; [0033]; “In certain embodiments, the low pass filter 61 has a cutoff frequency FCUTOFF set to approximately 200 Hz, which is between second and third harmonics of the fundamental frequency of the AC input source 4 (e.g., for a source frequency of 50 Hz or 60 Hz)”) based on a filter current (Figs. 1, 3; Ica, Icb, Icc) flowing through an AC filter (Figs. 1, 3; filter capacitors, CF) coupled to the line node (Figs. 1, 3; filter capacitors, CF);
and generating a first flag (Figs. 1, 3; 66) indicative of failure, degradation, or malfunction (Figs. 1, 3; 66) of a first capacitor or capacitor bank (Figs. 1, 3; filter capacitors, CF) based on the first harmonic current (Figs. 1, 3; [0031-0034]; 66) and the filter harmonic current (Figs. 1, 3; [0031-0034]; 66), wherein the AC filter (Figs. 1, 3; filter capacitors, CF) comprises the first capacitor or capacitor bank (Figs. 1, 3; filter capacitors, CF).
Allowable Subject Matter
29. Claims 4, 6, 19, 20 and 27 would be allowable if rewritten to overcome the rejection(s) under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), 2nd paragraph, set forth in this Office action and to include all of the limitations of the base claim and any intervening claims.
30. The following is an examiner’s statement of reasons for allowance:
31. Regarding claim 4, the prior art does not teach or suggest, in combination with the rest of the limitations of claim 1,
“…wherein the AC filter is designed to filter an
n
t
h
harmonic of a fundamental frequency, wherein the first harmonic current corresponds to the
n
t
h
harmonic of the fundamental frequency, wherein the filter harmonic current corresponds to the
n
t
h
harmonic of a fundamental frequency, and wherein generating the first flag comprises identifying the first capacitor or capacitor bank of the AC filter designed to filter the
n
t
h
harmonic of the fundamental frequency as the failed, degraded, or malfunctioned capacitor or capacitor bank.”
32. Claim 5 is also allowed as it further limits objected claim 4.
33. Regarding claim 7, the prior art does not teach or suggest, in combination with the rest of the limitations of claims 1 and 6,
“…wherein the controller is further configured to determine a first capacitance of the first capacitor or capacitor bank, compare the first capacitance with a reference capacitance, and generate a second flag when the first capacitance differs from the reference capacitance by more than a predetermined tolerance, wherein the second flag is indicative of a failure, degradation, or malfunction of the first capacitor or capacitor bank.”
35. Claims 8-18 are also allowed as they further limit objected claim 7.
36. Regarding claim 22, the prior art does not teach or suggest, in combination with the rest of the limitations of claim 21,
“…determining a first capacitance of the first capacitor or capacitor bank; comparing the first capacitance with a reference capacitance; and generating a second flag when the first capacitance differs from the reference capacitance by more than a predetermined tolerance, wherein the second flag is indicative of a failure, degradation, or malfunction of the first capacitor or capacitor bank.”
37. Claims 23-25 are also allowed as they further limit objected claim 22.
38. The following is an examiner’s statement of reasons for allowance:
39. Regarding claim 26, the prior art does not teach or suggest, in combination with the rest of the limitations of claim 26,
“…determine M capacitance values of a first capacitor or capacitor bank of an AC filter coupled to a line node based on the measurement data, wherein M is a positive integer greater than 1, associate each of the M determined capacitance values to a cluster of k clusters, wherein k is a positive integer greater than 1 and smaller than M, determine a dominant cluster from the k clusters, determine a first capacitance based on the capacitance values of the dominant cluster…”
40. Claims 27-29 are also allowed as they further limit allowed claim 26 (As long as Applicant is able to overcome the 112 issue on Claim 27 disclosed earlier in the Office Action).
Conclusion
41. The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Hart et al. US 2012/0004876 - A portable package of testing equipment that enables real-time analysis in order to determine the correct amount of capacitance required to add to a motor to achieve optimal performance and power factor correction is provided; the system admits to the monitoring of key power quality measurements such as harmonics while capacitance is temporarily added to the system.
A et al. US 2021/0210950 - Methods and systems include identifying an abnormal condition in a PFC circuit comprising an input configured to be coupled to a 3-phase power source and to receive input 3-phase power from the 3-phase power source, a bus having a plurality of bus lines, each bus line configured to be coupled to the input and to carry one phase of the input 3-phase power, a PFC leg including a contactor configured to selectively couple a capacitor bank included in the PFC leg to the bus. In response to identifying the abnormal condition, the contactor is controlled to decouple the capacitor bank from the bus, and after a reset button has been activated.
Mehndiratta et al. US 2024/0072533 - Fault detection in a shunt capacitor bank connected to a power system is described. Voltage and current measurements are obtained at a terminal of the shunt capacitor bank. An electrical parameter is calculated based on the voltage and current measurements, where the electrical parameter is an impedance angle or an active power. A difference between a first and a second value of the electrical parameter is calculated, based on which a fault is detected.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to RAUL J RIOS RUSSO whose telephone number is (571)270-3459. The examiner can normally be reached Monday-Friday: 10am-6pm, EST.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Huy Phan can be reached at 571-272-7924. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/RAUL J RIOS RUSSO/Examiner, Art Unit 2858
Prosecution Insights