Prosecution Insights
Last updated: October 01, 2026
Application No. 18/860,537

INSULATION RESISTANCE DETECTION DEVICE AND INSULATION RESISTANCE DETECTION METHOD

Non-Final OA §102§103
Filed
Oct 25, 2024
Priority
May 20, 2022 — JP 2022-083426 +1 more
Examiner
VELEZ, ROBERTO
Art Unit
Tech Center
Assignee
Panasonic Holdings Corporation
OA Round
1 (Non-Final)
68%
Grant Probability
Favorable
1-2
OA Rounds
9m
Est. Remaining
89%
With Interview

Examiner Intelligence

Grants 68% — above average
68%
Career Allowance Rate
188 granted / 278 resolved
+7.6% vs TC avg
Strong +21% interview lift
Without
With
+21.4%
Interview Lift
resolved cases with interview
Typical timeline
2y 8m
Avg Prosecution
32 currently pending
Career history
302
Total Applications
across all art units

Statute-Specific Performance

§101
2.7%
-37.3% vs TC avg
§103
52.5%
+12.5% vs TC avg
§102
28.1%
-11.9% vs TC avg
§112
13.9%
-26.1% vs TC avg
Black line = Tech Center average estimate • Based on career data from 278 resolved cases

Office Action

§102 §103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Priority Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55. Information Disclosure Statement The information disclosure statement (IDS) submitted on 01/27/2025 is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner. Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claims 1, 6 and 10 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by XU (CN 105527535 A). Regarding claims 1 and 10, XU teaches an insulation resistance detection device and method comprising: a voltage measurer (4) that measures a voltage at a first node among a plurality of nodes between a plurality of voltage dividing resistors (6 and 7) connected between a positive terminal and a negative terminal of a battery (1) (as shown in fig. 1), the plurality of voltage dividing resistors (6 and 7) being included in an insulation detection circuit (3) for detecting insulation resistance in a path through which a current from the battery (1) flows (as shown in fig. 2); a determiner (4) that determines whether the voltage at the first node measured by the voltage measurer (4) is lower than or equal to a predetermined voltage (step S2, as shown in fig. 2); and a switcher (5) that switches a state of a switch (S1) connected to a second node among the plurality of nodes to cause the voltage measured by the voltage measurer (4) to exceed the predetermined voltage (step S3, as shown in fig. 2), when the voltage at the first node measured by the voltage measurer (4) is determined to be lower than or equal to the predetermined voltage (as shown in fig. 1-2). Regarding claim 6, XU teaches the limitations of claim 1, in addition, XU teaches wherein the switch (S1) is connected to the second node and any one of the plurality of voltage dividing resistors (6 and 7) (as shown in fig. 1), and the switcher (5) switches the state of the switch (S1) to cause the voltage at the first node measured by the voltage measurer (4) to exceed the predetermined voltage (as shown in fig. 2), when the voltage at the first node measured by the voltage measurer (4) is determined to be lower than or equal to the predetermined voltage (as shown in fig. 2). Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. The text of those sections of Title 35, U.S. Code not included in this action can be found in a prior Office action. The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows: 1. Determining the scope and contents of the prior art. 2. Ascertaining the differences between the prior art and the claims at issue. 3. Resolving the level of ordinary skill in the pertinent art. 4. Considering objective evidence present in the application indicating obviousness or nonobviousness. This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention. Claims 7-8 are rejected under 35 U.S.C. 103 as being unpatentable over XU (CN 105527535 A) in view of Lee (US PGPUB 2022/0003823). Regarding claim 7, XU teaches the limitations of claim 6, in addition, XU teaches wherein the positive terminal is connected to ground (GND) via at least one of the plurality of voltage dividing resistors (6 or 7) (as shown in fig. 1), the negative terminal is connected to the ground (GND) via at least an other one of the plurality of voltage dividing resistors (6 or 7) (as shown in fig. 1). XU fails to specifically teach wherein the voltage measurer measures the voltage at the first node using a potential of the ground as a reference. However, Lee teaches wherein the voltage measurer (40) measures the voltage at the first node using a potential of the ground as a reference (as disclosed in para. 0058). It would have been obvious, before the effective filing date of the claimed invention, to one of ordinary skill in the art to combine and have the voltage measurer measure the voltage at the first node using a potential of the ground as a reference as taught by Lee with the invention of XU in order to use a stable voltage reference value as a baseline. Regarding claim 8, XU teaches the limitations of claim 6. XU fails to specifically teach wherein the voltage measurer measures the voltage at the first node using a potential of the negative terminal as a reference. However, Lee teaches wherein the voltage measurer (40) measures the voltage at the first node using a potential of the negative terminal (cathode) as a reference (as disclosed in para. 0058). It would have been obvious, before the effective filing date of the claimed invention, to one of ordinary skill in the art to combine and have the voltage measurer measure the voltage at the first node using a potential of the negative terminal as a reference as taught by Lee with the invention of XU in order to ensure safety and prevent unwanted leakage currents. Allowable Subject Matter Claims 2-5 and 9 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. The following is a statement of reasons for the indication of allowable subject matter: Regarding claims 2-5, the prior art fails to specifically teach an insulation resistance detection device comprising: wherein the second node is a node to which a voltage higher than the voltage at the first node is applied, the switch is connected between the second node and the voltage measurer, the switcher switches the state of the switch to connect the second node and the voltage measurer, when the voltage at the first node measured by the voltage measurer is determined to be lower than or equal to the predetermined voltage, and the voltage measurer measures a voltage at the second node, in combination with all the limitations of the claims. Regarding claim 9, the prior art fails to specifically teach an insulation resistance detection device comprising: a fault diagnoser that diagnoses a fault in the insulation detection circuit or the voltage measurer by comparing the voltage at the first node measured by the voltage measurer before the state of the switch is switched and the voltage at the first node measured by the voltage measurer after the state of the switch is switched, in combination with all the limitations of the claims. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to ROBERTO VELEZ whose telephone number is (571)272-8597. The examiner can normally be reached Mon-Fri 5:30am-3:30pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Huy Phan can be reached at (571)272-7924. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /ROBERTO VELEZ/Primary Examiner, Art Unit 2858
Read full office action

Prosecution Timeline

Oct 25, 2024
Application Filed
Aug 12, 2026
Non-Final Rejection mailed — §102, §103 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
68%
Grant Probability
89%
With Interview (+21.4%)
2y 8m (~9m remaining)
Median Time to Grant
Low
PTA Risk
Based on 278 resolved cases by this examiner. Grant probability derived from career allowance rate.

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