DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Drawings
The drawings are objected to under 37 CFR 1.83(a). The drawings must show every feature of the invention specified in the claims. Therefore, the “the first solder pad and the first common solder pad are configured to be simultaneously connected to the first component, and the second solder pad and the first common solder pad are configured to be simultaneously connected to the second component, claim 1, when the first solder pad and the first common solder pad are configured to be simultaneously connected to the first component, the second solder pad is vacant, and when the second solder pad and the first common solder pad are configured to be simultaneously connected to the second component, the first solder pad is vacant, claim 2, the main board comprises a positive electrode circuit and a negative electrode circuit, the first common solder pad is electrically connected to the positive electrode circuit, and both the first solder pad and the second solder pad are insulated from the main board; or the first common solder pad is electrically connected to the negative electrode circuit, and both the first solder pad and the second solder pad are insulated from the main board, claim 10, the main board comprises a positive electrode circuit and a negative electrode circuit, the first solder pad is electrically connected to the positive electrode circuit, the second solder pad is electrically connected to the negative electrode circuit, and the first common solder pad is insulated from the main board; or the first solder pad is electrically connected to the negative electrode circuit, the second solder pad is electrically connected to the positive electrode circuit, and the first common solder pad is insulated from the main board, claim 11, and the electronic device further comprises a first elastic piece and a second elastic piece; the first elastic piece is soldered onto the first solder pad and the first common solder pad, the second elastic piece is soldered onto the second solder pad and the first common solder pad, claim 18” must be shown or the feature(s) canceled from the claim(s). No new matter should be entered.
None of the figures shows that limitations as above. Please, revise or clarify.
Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. The figure or figure number of an amended drawing should not be labeled as “amended.” If a drawing figure is to be canceled, the appropriate figure must be removed from the replacement sheet, and where necessary, the remaining figures must be renumbered and appropriate changes made to the brief description of the several views of the drawings for consistency. Additional replacement sheets may be necessary to show the renumbering of the remaining figures. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance.
Claim Objections
Claims 1-2, 10-11, and 18 objected to because of the following informalities:
Regarding claim 1, the limitations of “the first solder pad and the first common solder pad are configured to be simultaneously connected to the first component, and the second solder pad and the first common solder pad are configured to be simultaneously connected to the second component” is unclear, none of the figures that show that limitation. Please, clarify.
Regarding claim 2, the phrase of “when the first solder pad and the first common solder pad are configured to be simultaneously connected to the first component, the second solder pad is vacant, and when the second solder pad and the first common solder pad are configured to be simultaneously connected to the second component, the first solder pad is vacant” is not understood because there is/are none of figures that show that phrase as above. Please, clarify.
Regarding claims 10-11, the phrase of “the main board comprises a positive electrode circuit and a negative electrode circuit” is unclear because there is/are none of figures that show that phrase as above. Please, clarify.
Regarding claim 18, line 3, please, change “electronic device” to - - the electronic device - - for proper reading.
Regarding claim 18, the phrase of “wherein electronic device further comprises a first elastic piece and a second elastic piece; the first elastic piece is soldered onto the first solder pad and the first common solder pad, the second elastic piece is soldered onto the second solder pad and the first common solder pad” is unclear because there is/are none of figures that show that phrase as above. Please, clarify.
Appropriate correction is required.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1-3, 9-11 is/are rejected under 35 U.S.C. 102a(1) as being anticipated by Yokoyama (U.S. Patent 8,300,421).
As best understood to claim 1, Yokoyama discloses an electronic device (10x) as shown in figures 1A-1C, comprising:
a first component (30), a second component (40), and a circuit board (11);
wherein the circuit board (11) comprises a main board (the body of the substrate 11), a first type of solder pad (12x, 15), and a second type of solder pad (18x, 15);
both the first and second type of solder pads (12x-15-18x) are formed on a surface of the main board (11), and are electrically connected to the main board;
the first type of solder pad comprises a first solder pad (12x) and a first common solder pad (15), and the second type of solder pad comprises a second solder pad (18x) and the first common solder pad (15); and the first common solder pad (15) comprises first and second sides, and the first and second solder pads (12x, 18x) are respectively located on the first side and the second side, and are spaced apart from the first common solder pad (15); and
the first solder pad (12x) and the first common solder pad (15) are configured to be simultaneously connected to the first component (30), and the second solder pad (18x) and the first common solder pad (15) are configured to be simultaneously connected to the second component (40).
As best understood to claim 2, Yokoyama discloses in figures 1A-1C that
when:
the first solder pad (12x) and the first common solder pad (15) are configured to be simultaneously connected to the first component (30), the second solder pad (18x) is vacant (the second component 40 is not connected to the pads), and
when:
the second solder pad (18x) and the first common solder pad (15) are configured to be simultaneously connected to the second component (40), the first solder pad (12x) is vacant (the first component 30 is not connected to the pads).
As to claim 3, Yokoyama discloses in figures 1C or 2C that a first gap (50 or 52x) is provided between the first solder pad (12x) and the first common solder pad (15), and an area of the first gap (52x) is less than or equal to 20% of a total area of the first solder pad (12x, figure 2C), the first gap (52x), and the first common solder pad (15).
As to claim 9, Yokoyama discloses a length direction of the first type of solder pad (12x, 15) is parallel to a length direction of the second type of solder pad (18x, 15); and the first solder pad (12x), the first common solder pad (15), and the second solder pad (18x) are arranged side by side and spaced apart in the length direction of the first type of solder pad, and the first common solder pad (15) is located between the first and second solder pads (12x, 18x).
As best understood to claim 10, Yokoyama disclose the main board (11) comprises positive and negative electrode circuits (the positive and negative electrodes 34, 36, and 44, 46 of the chip components 30, 40), the first common solder pad (15) is electrically connected to the positive electrode circuit, and both the first and second solder pads (12x, 18x) are insulated (separate from the gap 52x) from the main board; or the first common solder pad is electrically connected to the negative electrode circuit, and both the first solder pad and the second solder pad are insulated from the main board.
As best understood to claim 11, Yokoyama discloses the main board (11) comprises positive and negative electrode circuits (the positive and negative electrodes 34, 36, and 44, 46 of the chip components 30, 40), the first solder pad (12x) is electrically connected to the positive electrode circuit, the second solder pad (18x) is electrically connected to the negative electrode circuit, and the first common solder pad (15) is insulated from the main board; or the first solder pad is electrically connected to the negative electrode circuit, the second solder pad is electrically connected to the positive electrode circuit, and the first common solder pad is insulated from the main board.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 4 is/are rejected under 35 U.S.C. 103 as being unpatentable over Yokoyama in view of Dummer (U.S. 2016/0029485).
Regarding claim 4, Yokoyama discloses a width of the first gap ranges from 10um to 30um, column 6, line 41, but not specifically in a range from 0.15 mm to 0.25 mm.
Dummer teaches solder pads, system, and method for circuitry components as shown in figures 1A-1D comprising a width of the first gap ranges from 0.15 mm to 0.25 mm.
It would have been obvious to one having ordinary skill in the art before the effective filling date to have a teaching of Dummer employed in the electronic device of Yokoyama in order to increase a number of edges available to align at least one part to be soldered.
Claim(s) 6 is/are rejected under 35 U.S.C. 103 as being unpatentable over Yokoyama in view of Youngquist et al. (U.S. 20010022564).
Regarding claim 6, Yokoyama as modified by Dummer discloses all of the limitation of claimed invention except a length direction of the first type of solder pad intersects with a length direction of the second type of solder pad.
Youngquist teaches a LED display assembly as shown in figures 3-4 comprising a circuit board (22) having a length direction of the first type of solder pad (40) intersects with a length direction of the second type of solder pad (42).
It would have been obvious to one having ordinary skill in the art before the effective filling date to have a teaching of Youngquist employed in the electronic device of Yokoyama in order to reduce the size of the bonding pads for mounting components on the circuit board.
Claim(s) 5 is/are rejected under 35 U.S.C. 103 as being unpatentable over Yokoyama in view of Dummer (U.S. 2016/0029485), and further in view of Tanabe et al. (U.S. Patent 4,883,920).
Regarding claim 5, Yokoyama as modified by Dummer discloses all of the limitation of claimed invention except for a solder resist is arranged on the surface of the main board, and the solder resist is located in the first gap.
Tanabe teaches a chip type component installation structure as shown in figures 16-17 comprising a solder resist (7) is arranged on the surface of the main board (1), and the solder resist (7) is located in the first gap.
It would have been obvious to one having ordinary skill in the art before the effective filling date to have a teaching of Dummer employed in the electronic device of Yokoyama in order to achieve excellent isolation and reduce heat structure.
Allowable Subject Matter
Claims 7-8, 12-19 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Claim 18 would be allowable if rewritten to overcome the Objection of Drawings and Claim of Objections, set forth in this Office action and to include all of the limitations of the base claim and any intervening claims.
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/TUAN T DINH/Primary Examiner, Art Unit 2847
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