DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Priority
Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55.
Information Disclosure Statement
The information disclosure statements (IDS) submitted on 02 December 2024 and 11 December 2024 are in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statements are being considered by the examiner.
Specification
The title of the invention is not descriptive. A new title is required that is clearly indicative of the invention to which the claims are directed.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claims 1, 3-4, 10, and 12 are rejected under 35 U.S.C. 102(a)(1) and (a)(2) as being anticipated by Pyo et al. (USPGPub 20190181166 A1).
Regarding claim 1, Pyo teaches a photodetector, comprising: a semiconductor substrate (100) in which a photoelectric conversion section (110) is provided (see figure 7A, semiconductor substrate 100 with photoelectric conversion regions 110 disposed therein); an inter-pixel light-shielding section (101) that is provided over the semiconductor substrate (100) and defines a light incident region (110) of a pixel (P) corresponding to the photoelectric conversion section (110) (see figures 6 and 7A, isolation structure 101; and ¶63, The first isolation structure 101 may be a device isolation layer defining the unit pixel regions PG1, PG2, PR, and PB); and an on-chip lens (307) that is provided on the light incident region (110) of the semiconductor substrate (100) (see figure 7A, micro lenses 307), wherein at least edge sections of the on-chip lens (307) in a diagonal direction of the pixel fall (P) onto the light incident region (110) (see figure 6, diagonal edges of micro lenses 307 falling onto light incident regions 110).
Regarding claim 3, Pyo teaches the photodetector according to claim 1, wherein the edge sections of the on-chip lens (307) in an opposite side direction of the pixel (P) fall onto the light incident region (110) (see figures 6 and 7A, edge of micro lenses 370 falling on photoelectric conversion regions 110 (i.e. light incident region)).
Regarding claim 4, Pyo teaches the photodetector according to claim 1, wherein the pixel (P) including the on-chip lens (307) which has the edge sections falling onto the light incident region (110) is provided at least in a peripheral section of a pixel array (1) in which a plurality of the pixels (P) is planarly arranged in a matrix (see figure 8, edge of micro lenses 307 in the diagonal pixel direction overlapping the photoelectric conversion regions 110 (i.e. light incident region); and ¶57, FIG. 8 is an enlarged plan view of the second region R2 of FIG. 5A).
Regarding claim 10, Pyo teaches the photodetector according to claim 1, wherein in the photoelectric conversion section (110), an infrared ray is subjected to photoelectric conversion (¶51, The infrared filter Z of the depth pixel may transmit infrared light, and the photoelectric conversion element of the depth pixel may generate photoelectrons corresponding to the infrared light).
Regarding claim 12, Pyo teaches a photodetection device, comprising: a photodetector (110); and a processing circuitry that performs signal processing on an output from the photodetector (100) (¶60, The electrical signals converted in the first and second photoelectric conversion regions 110a and 110b may be signal-processed in the interconnection layer 20), wherein the photodetector (110) includes a semiconductor substrate (100) in which a photoelectric conversion section (110) is provided (see figure 7A, semiconductor substrate 100 with photoelectric conversion regions 110 disposed therein), an inter-pixel light-shielding section (101) that is provided over the semiconductor substrate (100) and defines a light incident region of a pixel (P) corresponding to the photoelectric conversion section (110) (see figures 6 and 7A, isolation structure 101; and ¶63, The first isolation structure 101 may be a device isolation layer defining the unit pixel regions PG1, PG2, PR, and PB), and an on-chip lens (307) that is provided on the light incident region (110) of the semiconductor substrate (100) (see figure 7A, micro lenses 307), and at least edge sections of the on-chip lens (307) in a diagonal direction of the pixel (P) fall onto the light incident region (110) (see figure 6, diagonal edges of micro lenses 307 falling onto light incident regions 110).
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claim 2 is rejected under 35 U.S.C. 103 as being unpatentable over Pyo et al. (USPGPub 20190181166 A1) in view of Moriya (WO 2022091576 A1) (using US 20240030252 A1 as a translation).
Regarding claim 2, Pyo teaches the on-chip lens (307) and the inter-pixel light-shielding section (101) (see figures 6 and 7A). However, Pyo fails to explicitly teach wherein the edge sections of the on-chip lens in an opposite side direction of the pixel fall onto the inter-pixel light-shielding section.
However, Moriya teaches wherein the edge sections of the on-chip lens (30) in an opposite side direction of the pixel (3) fall onto the inter-pixel light-shielding section (28/25) (see figures 2 and 4, microlens 30 overlapping partitions walls 28 and trenches 25 (i.e. light-shielding section)).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Pyo to incorporate the teachings of Moriya to have the microlenses overlapping the light-shielding section because a mere carrying forward of an original patented conception involving only change of form, proportions, or degree, or the substitution of equivalents doing the same thing as the original invention, by substantially the same means, is not such an invention as will sustain a patent, even though the changes of the kind may produce better results than prior inventions (MPEP 2144.05 II A).
Claim 5 is rejected under 35 U.S.C. 103 as being unpatentable over Pyo et al. (USPGPub 20190181166 A1) in view of Kurose et al. (USPGPub 20220173150 A1).
Regarding claim 5, Pyo teaches the light incident region (110) provided in the semiconductor substrate (100) (see figures 6 and 7A). However, Pyo fails to explicitly teach wherein the light incident region is provided with an irregular section in which irregularities are arranged in an array-shape over a surface of the semiconductor substrate.
However, Kurose teaches wherein the light incident region (42) is provided with an irregular section (48) in which irregularities are arranged in an array-shape over a surface of the semiconductor substrate (12) (see figure 2, recessed regions 48 (i.e. irregular section) disposed in an array shape over semiconductor substrate 12).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Pyo to incorporate the teachings of Kurose to further include an irregular section in order to prevent the reflection of incident light to improve sensitivity (Kurose, ¶5).
Claim 6 is rejected under 35 U.S.C. 103 as being unpatentable over Pyo et al. (USPGPub 20190181166 A1) in view of Kurose et al. (USPGPub 20220173150 A1) as applied to claim 5 above, and further in view of Chou et al. (USPGPub 20210183922 A1).
Regarding claim 6, Pyo as modified by Kurose teaches the irregularities (Kurose 48) (Kurose, see figure 2). However, the combination fails to explicitly teach wherein the irregularities include square pyramid-shaped recesses.
However, Chou teaches wherein the irregularities (142) include square pyramid-shaped recesses (¶83, the first EMR diffuser 142 has an inverted pyramid-like shape (e.g., an inverted square pyramid, an inverted rectangular pyramid, an inverted triangular pyramid, etc.), as shown in the simplified top view 300 of FIG. 3).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the combination of Pyo and Kurose to incorporate the teachings of Chou to have the shape of the irregularities include a square pyramid because changing the shape of the element is an obvious matter of choice that would not alter the function of the device (see MPEP 2144.04 IV B).
Claims 7-8 are rejected under 35 U.S.C. 103 as being unpatentable over Pyo et al. (USPGPub 20190181166 A1) in view of Kurose et al. (USPGPub 20220173150 A1) as applied to claim 5 above, and further in view of Murase et al. (TW 202117637 A) (using US 20220397651 A1 as a translation).
Regarding claim 7, Pyo as modified by Kurose teaches the on-chip lens (Pyo 307 | Kurose 52) and the irregularities (Kurose 48) (Kurose, see figure 2). However, the combination fails to explicitly teach wherein at least the edge sections of the on-chip lens in the diagonal direction fall onto the irregular section.
However, Murase teaches wherein at least the edge sections of the on-chip lens (30) in the diagonal direction fall onto the irregular section (SF) (see figures 39, 41, 42, and 44, on-chip lens 30 falling on scattering structures SF in the diagonal pixel direction).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the combination of Pyo and Kurose to incorporate the teachings of Murase to have the on-chip lenses falling onto the irregularities because a mere carrying forward of an original patented conception involving only change of form, proportions, or degree, or the substitution of equivalents doing the same thing as the original invention, by substantially the same means, is not such an invention as will sustain a patent, even though the changes of the kind may produce better results than prior inventions (MPEP 2144.05 II A).
Regarding claim 8, Pyo as modified by Kurose teaches the on-chip lens (Pyo 307 | Kurose 52) and the irregularities (Kurose 48) (Kurose, see figure 2). However, the combination fails to explicitly teach wherein at least the edge sections of the on-chip lens in the diagonal direction fall onto the light incident region outside the irregular section.
However, Murase teaches wherein at least the edge sections of the on-chip lens (30) in the diagonal direction fall onto the light incident region (PX) outside the irregular section (SF) (see figures 38, 40, 43, 45, and 46, on-chip lens 30 falling on the pixel PX (i.e. light incident region) outside of the scattering structures SF in the diagonal pixel direction).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the combination of Pyo and Kurose to incorporate the teachings of Murase to have the on-chip lenses falling onto the light incident region outside of the irregularities because a mere carrying forward of an original patented conception involving only change of form, proportions, or degree, or the substitution of equivalents doing the same thing as the original invention, by substantially the same means, is not such an invention as will sustain a patent, even though the changes of the kind may produce better results than prior inventions (MPEP 2144.05 II A).
Claim 11 is rejected under 35 U.S.C. 103 as being unpatentable over Pyo et al. (USPGPub 20190181166 A1) in view of Takatsuka (CN 110291635 A) (using US 20210183930 A1 as a translation).
Regarding claim 11, Pyo teaches the photoelectric conversion section (110) (see figures 6 and 7A). However, Pyo fails to explicitly teach wherein the photoelectric conversion section includes a single photon avalanche diode.
However, Takatsuka teaches wherein the photoelectric conversion section includes a single photon avalanche diode (¶52, The pixel 100 is a pixel including an APD (Avalanche Photodiode) as a light detection unit (photoelectric conversion unit) for detecting a light signal; and ¶53, The APD is used in a linear mode in which a reverse bias voltage is operated with a breakdown voltage or less or a Geiger mode in which the reverse bias voltage is operated with the breakdown voltage or more. In the Geiger mode, an avalanche phenomenon can occur even with the incidence of a single photon. Such a photodiode is called a SPAD).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Pyo to incorporate the teachings of Takatsuka to have the photoelectric conversion section include a SPAD because of their high sensitivity.
Allowable Subject Matter
Claim 9 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Regarding claim 9, the prior art of record individually or combined fails to teach the photodetector according to claims 5 and 1 as claimed, more specifically in combination with wherein the pixel including the on-chip lens which has the edge sections falling onto the irregular section is provided in a peripheral section of a pixel array in which a plurality of the pixels is planarly arranged in a matrix, and the pixel including the on-chip lens which has the edge sections falling onto the light incident region outside the irregular section is provided in a center section of the pixel array.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to ERIN R GARBER whose telephone number is (571)272-4663. The examiner can normally be reached M-F 0730-1730.
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/ERIN R GARBER/Examiner, Art Unit 2878
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