Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Information Disclosure Statement
The information disclosure statement (IDS) submitted on 02/12/2026 and 10/16/2025 were being considered by the examiner.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1 - 7 is/are rejected under 35 U.S.C. 103 as being unpatentable over Murakami et al. (JP Pub. No. 2021-150246 A) in view of Hatai et al. (US Patent 6,794,805 B1).
With regard to claim 1, Murakami teaches a field emission / electron emission device having a laminated thin-film structure. Murakami teaches a lower electrode 1 made of a conductive silicon semiconductor substrate, a thin insulating film 6 functioning as an electron acceleration layer, an electron-transmitting electrode 3 also identified as a surface electrode / upper electrode / second electrode, and a contact electrode 4 provided on a portion of the electron-transmitting electrode 3 for applying voltage [0036]-[0039], [0046]-[0050], [0053]; Figs. 1-3.
Murakami further teaches that, when voltage is applied between the lower electrode 1 and contact electrode 4, electrons tunnel through the insulating film 6, pass through the electron-transmitting electrode 3, and are emitted [0036]-[0039], [0046]-[0050], [0053]; Figs. 1-3.
However, Murakami does not expressly teach a separate bottom electrode disposed below the semiconductor substrate as recited in claim 1.
Hatai teaches a field emission electron source with a back electrode 2 made of aluminum film formed on the back surface of a silicon substrate, and thus teaches the claimed bottom-electrode placement. Hatai also teaches a two-layer electrode stack in which a thin metal film 7a, for example a 10 nm gold film, is formed on the porous polycrystal silicon layer / strong electric field drift layer 6, and a thicker thin metal film 7b, for example an aluminum film about 1.5 micrometers thick, is formed on the surface of thin metal film 7a in a region of the polycrystal silicon layer 3. Hatai explains that 7a and 7b together constitute surface electrode 7, that 7a is kept thin for electron emission, and that 7b is made thicker to reduce breakage and electrical resistance (col. 25, line 63-col. 28, line 31; col. 29, line 63-col. 30, line 24; Figs. 25A-26C, 30A-30C, 32A-32F).
In view of the utility of Hatai’s back electrode and two-layer conductive electrode arrangement for biasing a semiconductor field emission source, reducing resistance, reducing heat, and stabilizing electron emission, it would have been obvious to provide the Murakami emission device with Hatai’s back/bottom electrode and stacked conductive electrode arrangement. The combination uses known semiconductor field-emission source features for the same purpose: applying an electric field across a semiconductor/insulator/electron-transmitting electrode structure to emit electrons.
With regard to claim 2, Murakami modified teach the base field emission device for the reasons stated with respect to claim 1, but fails to expressly disclose the claim-2 numerical threshold that the work function is 5.5 eV or less.
Hatai teaches selecting the thin metal film 7a using low-work-function material considerations. Hatai also teaches that the emitted electron energy is the applied voltage minus the work function of the thin metal film 7a, so it is desirable to make the work function of thin metal film 7a as small as possible. Hatai further teaches gold for the thin metal film 7a and alternatives such as platinum, iridium, rhodium, ruthenium, or alloys that are low-work-function and oxidation resistant (col. 27, line 59-col. 28, line 31; col. 29, line 63-col. 30, line 24; Figs. 30A-30C).
In view of the utility of a low-work-function gate/electron-transmitting electrode for increasing electron emission efficiency, it would have been obvious to a person of ordinary skill in the art at the time the invention was made to modify Murakami to include include the teachings such as that taught by Hatai to select a gate/electron-transmitting electrode material satisfying the claimed work-function condition.
Notice that common electrode materials such as Au have work-function values at or below about 5.5 eV depending on surface condition and crystal face.
With regard to claim 3, Murakami modified discloses the claimed invention according to claim 1, but fails to expressly teach the exact claim wording that the gate electrode material satisfies a plurality of the claimed material conditions among work function, Gibbs free energy, sublimation energy, and electron mean free path.
Hatai teaches selecting the thin metal film 7a based on low work function and oxidation resistance, and teaches gold and other noble or oxidation-resistant metals for that thin film (col. 27, line 59-col. 28, line 31).
Murakami teaches that precious metals such as gold, platinum, and iridium were used for electron-transmitting electrode layers to prevent work-function increase due to oxidation [0003]-[0004], [0032]-[0035].
In view of the utility of selecting an electron-transmitting/gate material based on multiple material properties affecting emission efficiency and reliability, it would have been obvious to a person of ordinary skill in the art at the time the invention was made to modify Murakami with the screen of Hatai with the known candidate electrode materials of Hatai and Murakami for more than one result-effective material property. The claimed plurality-of-conditions selection is a predictable material-selection optimization for the same electrode function.
With regard to claim 4, Murakami modified teach the base field emission device and the material-selection considerations discussed with respect to claims 1-3. Murakami also teaches selecting electrode/coating materials to maintain electron emission efficiency and protect the electron-emitting surface against oxygen-related degradation [0018]-[0022], [0034]-[0035].
However, Murakami does not expressly teach selecting a material by a “condition with a higher priority” based on a “preset priority.”
Hatai teaches that low work function and oxidation resistance are desirable electrode-material properties because they affect emitted-electron energy and emission efficiency (col. 27, line 59-col. 28, line 31; col. 29, line 63-col. 30, line 24; Figs. 30A-30C).
In view of the utility of ranking known material properties when selecting an electron-transmitting/gate electrode material, it would have been obvious to prioritize one known result-effective material condition over another when choosing from Hatai’s and Murakami’s candidate materials.
With regard to claim 5, Murakami modify teaches the claimed invention according to claim 1 and further Murakami teaches electron-transmitting electrode structures including graphene or graphite and teaches example graphite thicknesses of about 2 nm to 7 nm [0032], [0040], [0047]-[0049].
Hatai teaches a thin metal film 7a / gold electrode about 10 nm thick (col. 13, lines 17-27; col. 25, line 63-col. 26, line 20; col. 29, line 63-col. 30, line 24; Figs. 30A-30C).
Each disclosed thickness that falls within the claimed 0.1 nm to 100 nm range.
With regard to claim 6, Murakami teaches that the electron-transmitting electrode 3 is formed on the surface of the electron-accelerating insulating film 6, and Hatai teaches thin metal film 7a formed on the porous polycrystal silicon layer / strong electric field drift layer 6. Thus, the mapped gate/electron-transmitting electrode is in contact with the insulating/electron-accelerating layer. See Murakami, [0036], [0046]-[0049]; Hatai, col. 25, line 63-col. 28, line 31; Figs. 1-3 and 30A-30C.
With regard to claim 7, Murakami modified teach the claimed limitations according to claim 6, and further Murakami teaches that a conventional electron emission element has an insulating layer thickness of 5 nm to 20 nm in the electron-emitting portion, and further teaches that an insulating film functioning as an electron-accelerating layer desirably has a thickness of about 4 nm to 20 nm for higher electron emission efficiency [0004], [0028]-[0029], (Fig. 11).
Claim(s) 8 - 10 is/are rejected under 35 U.S.C. 103 as being unpatentable over Murakami et al. (JP Pub. No. 2021-150246 A) and Hatai et al. (US Patent 6,794,805 B1) in view of Sheng et al. (US Pub. No. 2003/0071555 A1).
With regard to claim 8, Murakami modified teach the claimed invention according to claim 8, but fails to further expressly disclose that the semiconductor substrate includes a first semiconductor layer having a first doping concentration and a second semiconductor layer formed on the first semiconductor layer and having a second doping concentration lower than the first doping concentration. Notice that where the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the optimum or workable ranges by routine experimentation.
Sheng teaches the same MIS/MIM electron-emitter field and discloses conductive substrate 110 and optional electron supply layer 120 formed above conductive substrate 110. Sheng teaches that conductive substrate 110 may be doped silicon or doped polysilicon, while electron supply layer 120 may be an undoped semiconductor or a doped semiconductor [0021], [0024] (Figure 1A).
Sheng further teaches an undoped semiconductor layer necessarily has a lower intentionally introduced dopant concentration than the disclosed doped semiconductor substrate [0035] – [0037], (Figure 4A). Sheng therefore teaches the claimed first semiconductor layer and a second semiconductor layer formed thereon with a lower doping concentration. See Sheng, [0021], [0024]-[0026], [0035]-[0038], claims 2-5 and 20-22; Figs. 1A and 4A-4C.
Sheng further explains that the doping level of electron supply layer 120 is selected to tailor electron transport. Thus, Sheng teaches both the more highly doped conductive semiconductor substrate and the undoped or lower-doped semiconductor layer formed above it in the same MIS/MIM electron-emitter structure. See Sheng, [0021], [0024]-[0026], [0035]-[0038], claims 2-5 and 20-22; Figs. 1A and 4A-4C.
In view of Sheng’s express teaching that the electron-supply-layer doping level is selected to tailor electron transport, it would have been obvious to a person of ordinary skill in the art at the time the invention was made to modify Murakami to include the teachings such as that taught by Sheng to use Sheng’s disclosed doped-substrate/undoped-or-lower-doped-layer arrangement in the Murakami modified field emission device. The modification uses a known MIS semiconductor stack for its disclosed function and yields the first and second doping concentrations recited in claim 8.
With regard to claim 9, Murakami modified teach the claimed invention according to claim 8, but Murakami modified does not expressly describe the claimed lower-surface and upper-surface relationships for the lower-doped second semiconductor layer.
Sheng expressly teaches forming electron supply layer 120 above conductive substrate 110 and then forming insulator 140 above electron supply layer 120. Sheng teaches that electron supply layer 120 may be deposited as a single polysilicon layer, for example by LPCVD, with a disclosed thickness of about 0.05 micrometer to 1 micrometer. Figures 1A and 4A-4B show the lower surface of that single electron supply layer contacting the conductive substrate and the upper surface contacting the insulator. See Sheng, [0024], [0026]-[0030], [0035]-[0038], claims 3-5 and 20-22; Figs. 1A and 4A-4B.
Thus, under the interpretation in which “formed of a single layer” means one semiconductor electron-supply layer rather than a plurality of separately formed doping sublayers, Sheng expressly teaches the recited stack.
It would have been obvious to retain that disclosed substrate/electron-supply-layer/insulator order when incorporating the claim-8 doping relationship because the order is the ordinary MIS electron-emitter arrangement and is required for electrons to travel from the supply layer through the insulator.
With regard to claim 10, Murakami modified teach the claimed invention according to claim 9, but fails to expressly disclose wherein the second semiconductor layer is partially formed only in the electron beam emitting region of the semiconductor substrate.
Sheng teaches that doping of electron supply layer 120 may be confined to given areas by masks and claims selected-area doping of the semiconductor [0024], [0037], claims 6 and 23; Figs. 1A and 4A-4C. Sheng teaches the first semiconductor layer as conductive substate 110, which may comprise doped silicon or doped polysilicon and teaches the second semiconductor layer as electron supply layer 120 formed above conductive substrate 110 [0021], [0022], [0035]-[0038] (Figures 1A and 4A).
Hatai additionally teaches patterned semiconductor supply regions for selected emission and the claimed “partially formed” feature by covering portions corresponding to strong electric field drift layers 6 with a mask and etching away the polycrystal semiconductor layer outside those portions, thereby leaving discrete semiconductor regions rather than a continuous layer over the substrate (col. 9, lines 5 – 23; col. 10, lines 5 – 15)
Hatai forms n-type regions 8 as patterned stripes on the semiconductor substrate, forms strong electric-field drift layers 6 on those regions, and uses crossing surface electrodes to define individual electron-source regions while suppressing emission and leakage outside selected regions (Abstract; col. 2, line 31-col. 5, line 43; col. 13, lines 5-54; Figs. 7, 23, and 30A-30C).
In view of the utility, to localize carrier supply, reduces parasitic current and cross-talk outside the emitting region, it would have been obvious to a person of ordinary skill in the art at the time the invention was made to modify Murakami with the teachings such as that taught by Hatai and Sheng to apply Hatai’s selective masking and etching technique to Sheng’s electron suppl layer 120 for localized portions only at the electron beam emitting regions as needed.
The modification predictably, and uses conventional masking without changing the MIS emission principle.
Claim(s) 11-13 is/are rejected under 35 U.S.C. 103 as being unpatentable over Murakami et al. (JP Pub. No. 2021-150246 A) and Hatai et al. (US Patent 6,794,805 B1) in view of Sheng et al. (US Pub. No. 2003/0071555 A1) in view of Tsukamoto et al. (JP 2001-189126 A).
With regard to claim 11, Murakami modified teach the claimed invention according to claim 8, Murakami fails to expressly teach that ordered plurality of doping layers within the second semiconductor layer.
Sheng teaches that the dopant concentration of electron supply layer 120 may be changed during deposition so that different depth levels have different dopant levels. Sheng also teaches uniform or graded dopant incorporation by ion implantation and annealing, and expressly claims a doping level that varies in the depth direction [0024], [0037], claims 7 and 24; Figs. 1A and 4A-4C.
Tsukamoto supplies the direction of the concentration relationship. Tsukamoto semiconductor electron-emitting embodiments use a higher-concentration carrier-supply region on the deeper substrate side and a lower-concentration semiconductor region on the surface/insulator side [0031]-[0044], [0069]-[0080]; (Figs. 1 and 9).
For example, Tsukamoto identifies region 103 at approximately 8 x 10^17 cm^-3 and an overlying low-concentration region 104 at approximately 1 x 10^16 cm^-3 or less, with insulating film 108 formed above the semiconductor structure. The reference explains that the higher-concentration region reduces series resistance while the lower-concentration region controls the electric field and emission behavior [0031]-[0044], [0069]-[0080]; (Figs. 1 and 9).
It would have been obvious to a person of ordinary skill in the art at the time the invention was made to modify Murakami to apply Sheng’s time-varying or graded doping process in order to begin the deposited electron-supply layer at the higher concentration taught for carrier supply and then reduce the dopant level toward the subsequently formed insulating layer, thereby obtaining the exact higher-bottom/lower-top order. This combines known dopant-profile control with the known goals of low series resistance and controlled surface injection improving the device.
With regard to claim 12, Murakami modified teach the claimed invention according to claim 11, but Murakami modified fails to expressly disclose the second semiconductor layer is partially formed only in the electron beam emitting region of the semiconductor substrate.
Sheng nevertheless teaches both components of the limitation in the same electron-supply layer: selected-area doping by masks and a doping level that varies in the depth direction [0024], [0037], claims 6-7 and 23-24; Figs. 1A and 4A-4C.
Hatai further teaches patterned semiconductor/drift regions that define selected electron-emission sites (Abstract); col. 2, line 31-col. 5, line 43; col. 10, lines 55 – 62; col. 19, lie 65 – col. 20, line 2; Figs. 7 and 23.
It would have been obvious to use the same mask and etching design while forming or implanting Sheng’s depth-varying profile so that the plural doping layers are produced only in the selected active emission areas taught by Sheng and Hatai. Notice that masking a graded deposition or implantation does not require a new operating principle; it predictably combines depth control with lateral localization to suppress non-emitting-area leakage.
With regard to claim 13, Murakami modified teach the claimed invention according to claim 11, but fail to expressly disclose the profile in which doping concentration increases toward the first semiconductor layer and decreases toward the insulating layer.
Sheng expressly teaches modifying dopant concentration over deposition time so that different depth levels have different dopant levels, and alternatively teaches graded dopant incorporation by implantation and annealing [0024], [0037], claims 7 and 24; Figs. 1A and 4A-4C.
Notice that because the electron supply layer 120 is deposited on the first semiconductor layer and the insulator is formed afterward on the opposite surface, beginning deposition at a higher dopant level and decreasing the level as growth proceeds produces a concentration that increases toward the first semiconductor layer and decreases toward the insulating layer.
Tsukamoto discloses that to choose an orientation rather than the reverse: a higher-concentration deeper region lowers series resistance and supplies carriers, while a lower-concentration surface-side region controls the electric field adjacent the emission interface [0012]-[0014], [0031]-[0044], [0069]-[0080]; Figs. 1 and 9.
In view of those teachings, it would have been obvious to a person of ordinary skill in the art at the time the invention was made to modify Tsukamoto to include the teachings such as that taught by Sheng and Tsukamoto to select the claimed gradient direction when implementing Sheng’s and Tsukamoto’s expressly disclosed graded doping. The choice is one of a finite number of profile directions, and the cited art identifies the predictable benefits of the higher-bottom/lower-top orientation.
Claim(s) 14 - 15 is/are rejected under 35 U.S.C. 103 as being unpatentable over Shoji et al. (JP 2005-056592 A) in view of Hatai et al. (US Patent 6,794,805 B1) and Murakami et al. (JP Pub. No. 2021-150246 A).
With regard to claim 14, Shoji teaches an X-ray tube having a silicon electron source, a collector/target assembly, and a target that generates X-rays when struck by electrons emitted from the silicon electron source (Shoji, machine-English, claim 1; [0013], [0020]-[0022], [0031]-[0041], [0050]; Figs. 1, 2(c), and 9).
Shoji teaches that the silicon electron source includes a silicon substrate, an insulating layer containing silicon as a constituent element, and a metal thin-film electrode, and that applying an electric field between the silicon substrate and metal thin-film electrode causes electron emission (Shoji, machine-English, claims 1 and 9; [0013], [0015], [0020]-[0022], [0031]-[0034]; Figs. 1 and 9).
Shoji further teaches using a planar semiconductor electron source to eliminate a heater, reduce tube size, and distribute target heating over a broader area (Shoji, machine-English, [0012]-[0016]; Figs. 1 and 9).
However, Shoji does not expressly teach the full claim-14 field-emission-device stack, a plurality of arranged electron-beam-emitting regions, or the claimed gate-electrode material condition (Shoji, machine-English, claims 1-13; [0013]-[0016], [0020]-[0050]; Figs. 1-9).
Hatai teaches a plurality of electron sources arranged at predetermined intervals by crossing plural conductive lower-electrode regions with plural surface-electrode stripes through a strong-electric-field drift layer (Hatai Abstract; col. 2, l. 31-col. 3, l. 12; col. 13, ll. 5-54; Figs. 7 and 23).
Hatai teaches selecting lower-electrode and surface-electrode lines so that electrons are emitted from selected crossing regions, thereby teaching a field-emission device having a plurality of arranged electron-beam-emitting regions (Hatai col. 3, ll. 1-14; col. 18, ll. 55-64; Figs. 7, 15, and 23).
Hatai also teaches back electrode 2 below silicon substrate 1 and a stacked surface-electrode structure having thin metal film 7a and thicker conductive film 7b disposed on film 7a. (Hatai col. 25, l. 63-col. 28, l. 31; col. 29, l. 63-col. 30, l. 24; Figs. 25A-26C, 30A-30C, and 32A-32F).
Murakami teaches a thin-film electron emitter having lower electrode 1, thin insulating electron-acceleration film 6, electron-transmitting electrode 3 on film 6, and contact electrode 4 on electrode 3 (Murakami [0003]-[0004], [0043]-[0049], [0052]-[0053]; Figs. 1-3 and 11).
Murakami teaches that the electron-transmitting/surface electrode may be gold, platinum, iridium, graphene, or graphite and explains that low-work-function and oxidation-resistant materials are desirable for electron emission (Murakami [0004], [0027]-[0030], [0047]-[0049]; Figs. 1 and 11).
Hatai likewise teaches selecting thin metal film 7a for low work function and oxidation resistance and identifies gold and other low-work-function metals, thereby satisfying at least the claim-14 work-function material condition under the broad wording of claim 14 (Hatai col. 27, l. 59-col. 28, l. 31; col. 29, l. 63-col. 30, l. 24; Figs. 30A-30C).
It would have been obvious to use Hatai’s selectable planar electron-source array and the Murakami /Hatai layered emission-electrode structure as the semiconductor electron source in Shoji‘s X-ray tube, because Shoji expressly seeks a compact planar semiconductor source and identifies distributed target heating as a benefit (Shoji [0012]-[0016], Figs. 1 and 9; Hatai Abstract, col. 2, l. 31-col. 3, l. 12, Figs. 7 and 23; Murakami [0003]-[0004], [0043]-[0049], Figs. 1-3).
The proposed combination preserves each reference’s intended operation because each reference uses a semiconductor thin-film or ballistic field-emission source to deliver electrons through an insulating/emission-electrode structure, while Shoji uses those electrons for the known purpose of striking an X-ray target (Shoji [0013]-[0016], [0031]-[0041]; Hatai col. 13, ll. 5-54; Murakami [0027]-[0030], [0046]-[0053].)
Accordingly, the combination accounts for the X-ray apparatus, the plurality of arranged electron-beam-emitting regions, the semiconductor/bottom-electrode/insulator/gate/top-electrode stack, and the gate-electrode material condition recited in claim 14 (Shoji claim 1, [0013], [0020]-[0022], [0031]-[0050], Figs. 1 and 9; Hatai Abstract, col. 2, l. 31-col. 3, l. 12, col. 25, l. 63-col. 30, l. 24, Figs. 7, 23, 25A-26C, and 30A-32F; Murakami [0003]-[0004], [0043]-[0053], Figs. 1-3 and 11).
With regard to claim 15, the X-ray generating apparatus of claim 14 is taught or rendered obvious for the reasons stated above (Shoji claim 1, [0013]-[0016], [0020]-[0050], Figs. 1 and 9; Hatai Abstract, col. 2, l. 31-col. 3, l. 12, col. 25, l. 63-col. 30, l. 24, Figs. 7, 23, and 25A-32F; Murakami [0003]-[0004], [0043]-[0053], Figs. 1-3 and 11).
Claim 15 additionally requires a transmission window disposed above the anode and transmitting the X-rays.
Shoji teaches a collector electrode having an opening, a beryllium plate sealing the opening, and an X-ray target attached to the inward side of the beryllium plate facing the silicon electron source (Shoji, machine-English, claim 1; [0013], [0021], [0031]-[0041], [0050]; Figs. 1 and 9).
Because the target/anode lies on the inward side of the beryllium plate and the generated X-rays exit through the plate, the beryllium plate is disposed on the X-ray-exit side above the target/anode and functions as the claimed transmission window (Shoji, machine-English, claim 1; [0013], [0021], [0050], [0059]; Figs. 1, 9, and 12).
Shoji identifies the beryllium plate as the X-ray-transmitting closure for the sealed tube, thereby teaching the claimed function of transmitting generated X-rays while maintaining the tube enclosure (Shoji, machine-English, [0021], [0050], [0059]; Figs. 1, 9, and 12).
No additional reference beyond the claim-14 combination is necessary for claim 15 because Shoji directly supplies the added transmission-window limitation (Shoji claim 1; [0013], [0021], [0050], [0059]; Figs. 1, 9, and 12).
Conclusion
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/DJURA MALEVIC/Examiner, Art Unit 2884
/UZMA ALAM/Supervisory Patent Examiner, Art Unit 2884
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