DETAILED ACTION
Priority
Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55.
Information Disclosure Statement
The information disclosure statements (IDS) submitted on 12/31/2024, 2/21/2025, and 11/3/2025 were considered by the examiner.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1-2 and 5 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by JP 2015-152505 (Miyazaki, see translation provided with IDS filed 12/31/2024).
Claim 1, Miyazaki teaches a magnetic detector (magnetic detector device 10; see Fig. 1, 6) comprising:
a magneto-impedance sensor element including a magnetosensitive body configured to cause a magnetization change in response to a strength of a magnetic field when an excitation current is supplied thereto, and a detection coil wound around the magnetosensitive body and configured to output an induced voltage generated by the magnetization change in the magnetosensitive body (magnetic sensor 12 is a magnetic impedance (MI) sensor comprising an amorphous wire 14 and a coil 13,13a wound around the amorphous wire 14 which is known in the art to operate in accordance to the functional limitations as claimed by detecting a volage Vout across the coils in response to a current Iin through the wire; see Figs. 1, 6; see [0013]-[0016]);
a sample hold circuit connected to one end of the detection coil and configured to hold an output voltage of the detection coil during turning on a sampling switch (sample and hold circuit 26 is connected to the detection coil 13 to hold voltage Vout in response to a switch; see [0019]; see Fig. 6);
an amplifier circuit connected to an output side of the sample hold circuit (amplifier 38 is arranged at an output side of S&H 26; see Fig. 6); and
a post-stage high-pass filter connected to an output side of the amplifier circuit (a notch filter 42 is arranged at the output side of the amplifier circuit 38, wherein notch filters are known in the art to comprise a high-pass and low-pass filter while attenuating an intermediate frequency band; see Fig. 6; see [0035]).
Claim 2, Miyazaki teaches further comprising a pre-stage high-pass filter connected to an output side of the sample hold circuit, wherein the amplifier circuit is connected to an output side of the pre-stage high-pass filter (HPF 36; see Fig. 6).
Claim 5, Miyazaki teaches wherein an output side of the amplifier circuit and one end of the detection coil are not connected, and no feedback circuit is provided therebetween (see Fig. 6).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 6-7 is/are rejected under 35 U.S.C. 103 as being unpatentable over JP 2015-152505 (Miyazaki, see translation provided with IDS filed 12/31/2024) in view of US 2015/0219731 (Yamamoto).
Claims 6-7, Miyazaki fails to teach further comprising a feedback circuit connecting an output side of the amplifier circuit and one end of the detection coil and including a low-pass filter; and wherein the feedback circuit is configured such that an external magnetic field applied to the magneto-impedance sensor element is partially cancelled out by a feedback magnetic field caused by a feedback current in a predetermined frequency band passing through the low-pass filter, and that the sample hold circuit is caused to hold a total voltage that is a sum of the induced voltage and a feedback voltage generated by the feedback current, and the post-stage high-pass filter is configured to remove a component of the feedback voltage that is generated by the feedback current and is included in an output of the amplifier circuit.
Yamamoto teaches comprising a feedback circuit connecting an output side of the amplifier circuit and one end of the detection coil and including a low-pass filter; and wherein the feedback circuit is configured such that an external magnetic field applied to the magneto-impedance sensor element is partially cancelled out by a feedback magnetic field caused by a feedback current in a predetermined frequency band passing through the low-pass filter, and that the sample hold circuit is caused to hold a total voltage that is a sum of the induced voltage and a feedback voltage generated by the feedback current, and the post-stage high-pass filter is configured to remove a component of the feedback voltage that is generated by the feedback current and is included in an output of the amplifier circuit (a feedback circuit comprising a LPF comprising C3, R5, and frequency selective circuit 6 connects an output side of amplifier 5 and one end of the detection coil 11; see Fig. 8; see [0090]-[0096]).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the features of Yamamoto into Miyazaki in order to gain the advantage of a direct current portion from the amplifier to the coil as a magnetically-negative feedback to remove select portions of the magnetic signal such as a direct current component from geomagnetism or other low frequency magnetic components.
Claim(s) 8 is/are rejected under 35 U.S.C. 103 as being unpatentable over JP 2015-152505 (Miyazaki, see translation provided with IDS filed 12/31/2024) in view of US 2006/0111872 (Papadimitriou).
Claim 8, Miyazaki fails to teach wherein the post-stage high-pass filter comprises any one of: a circuit comprising at least two components of LCR; a high-pass filter circuit including an operational amplifier; a signal processing unit configured to perform digital signal processing after digital conversion; a processing unit configured to subtract a component obtained through a low-pass filter on an output of the amplifier circuit from an output of the amplifier circuit; and a reference voltage correction unit configured to apply a DC component out of an output of the amplifier circuit as a reference voltage to the amplifier circuit, however, the limitations as claimed lists different types of known/conventional HPFs used for attenuating low-frequency and DC signals. For example, Papadimitriou teaches wherein a simple high-pass filer comprises a capacitor and resistor. See [0011].
Allowable Subject Matter
Claims 3-4 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter:
Claim 3, the prior art of record fails to teach or suggest wherein the sample hold circuit is configured to hold output voltage variation of the detection coil during turning on the sampling switch, the amplifier circuit is configured to perform integral processing and amplification processing on an output of the pre-stage high-pass filter, and to convert the output voltage variation into an offset component through the integral processing, and the post-stage high-pass filter is configured to remove the offset component, in combination with all other limitations of parent claims 1 and 2.
Claim 4, the prior art of record fails to teach or suggest wherein the sample hold circuit is configured to hold output voltage variation at at least one of an acquisition time or a settling time caused by on-off operation of the sampling switch, the amplifier circuit is configured to perform integral processing and amplification processing on an output of the pre-stage high-pass filter, and to convert the output voltage variation into an offset component through the integral processing, and the post-stage high-pass filter is configured to remove the offset component, in combination with all other limitations of parent claims 1 and 2.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. See PTO-892.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to STEVEN LEE YENINAS whose telephone number is (571)270-0372. The examiner can normally be reached M - F 10 - 6.
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/STEVEN L YENINAS/Primary Examiner, Art Unit 2858
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