Prosecution Insights
Last updated: October 02, 2026
Application No. 18/881,996

POWER SEMICONDUCTOR DEVICE HAVING GATE ELECTRODE COVERS AT MOST A PORTION OF THE DRIFT REGION

Non-Final OA §102§103
Filed
Jan 07, 2025
Priority
Jul 11, 2022 — nonprovisional of PCTEP2022069273
Examiner
MAI, ANH D
Art Unit
2893
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Hitachi Ltd.
OA Round
5 (Non-Final)
38%
Grant Probability
At Risk
5-6
OA Rounds
1y 11m
Est. Remaining
47%
With Interview

Examiner Intelligence

Grants only 38% of cases
38%
Career Allowance Rate
267 granted / 709 resolved
-30.3% vs TC avg
Moderate +10% lift
Without
With
+9.6%
Interview Lift
resolved cases with interview
Typical timeline
3y 8m
Avg Prosecution
39 currently pending
Career history
765
Total Applications
across all art units

Statute-Specific Performance

§101
1.9%
-38.1% vs TC avg
§103
45.1%
+5.1% vs TC avg
§102
21.8%
-18.2% vs TC avg
§112
30.0%
-10.0% vs TC avg
Black line = Tech Center average estimate • Based on career data from 709 resolved cases

Office Action

§102 §103
DETAILED ACTION The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Continued Examination Under 37 CFR 1.114 A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on July 14, 2026 has been entered. Status of the Claims Group I was elected. Amendment filed July 14, 2026 is acknowledged. Claims 19-20 have been cancelled. Claims 1, 8-9, 18 and 21 have been amended. Non-elected Invention, Group II, Claims 10-15 have been withdrawn from consideration. Claims 1-15, 17-18 and 21 are pending. Action on merits of Elected Invention, Group I, claims 1-9, 17-18 and 21 follows. Claim Objections Applicant is advised that should claim 17 be found allowable, claim 21 will be objected to under 37 CFR 1.75 as being a substantial duplicate thereof. When two claims in an application are duplicates or else are so close in content that they both cover the same thing, despite a slight difference in wording, it is proper after allowing one claim to object to the other as being a substantial duplicate of the allowed claim. See MPEP § 608.01(m). Amended claim 17 recites: A power semiconductor device according to claim 1, wherein, at the top side, the contact region also projects beyond the base region in vertical direction. Amended claim 21 recites: A power semiconductor device according to claim 1, wherein the contact region projects beyond the base region at the top side”. As a structure, claim 17 and claim 21 cover the same thing “the contact region projects beyond the base region in vertical direction or at the top side”. Therefore, the scope of claim 17 is the same as that of claim 21. Claim Rejections - 35 USC § 102 The text of those sections of Title 35, U.S. Code not included in this action can be found in a prior Office action. Claims 1-7 and 18 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by HSHIEH et al. (US. Patent No. 5,907,169) of record. With respect to claim 1, As best understood by the Examiner, HSHIEH ‘169 teaches a power semiconductor device as claimed including: - a semiconductor body with a top side, - a main electrode (source electrode) on the top side and - a gate electrode (230) on the top side and arranged next to the main electrode in a first lateral direction, the gate electrode (230) is electrically isolated from the semiconductor body by an electrically isolating material (132), wherein - the semiconductor body comprises - a drift layer (210) of a first conductivity type (N), - a base region (240) of a second conductivity type (P) arranged vertically between the drift layer (210) and the top side, - a contact region (225) of the first conductivity type arranged vertically between the drift layer (210) and the top side, wherein the contact region (225) adjoins the base region (240) and the top side, - a drift region (212) of the first conductivity type (N) arranged next to the base region (240) in the first lateral direction and adjoining the base region (240), - the main electrode is in electrical contact with the contact region (225), - in plan view of the top side, the gate electrode (230) at least partially covers a channel portion of the base region (240) which lies, in the first lateral direction, between the contact region (225) and the drift region (212), - at the top side, the drift region (212) projects beyond the base region (240) in vertical direction, - in plan view of the top side, an entirety of the gate electrode (230) is disposed outside of the drift region (212), wherein the drift region (212) adjoins an electrically isolating material (132) covering lateral surfaces of the gate electrode (230), and wherein the gate electrode (230) and the drift region (212) projecting beyond the base region (240) at least partially overlap with each other when viewed along the first lateral direction. (See FIGs. 5A, 7) Note: FIG. 5A below was renumbered consistent with the specification. PNG media_image1.png 321 582 media_image1.png Greyscale With respect to claim 2, at least one of the contact region (225) and the drift region (212) of HSHIEH is grown epitaxially. With respect to claim 3, at least one of the epitaxially grown regions of HSHIEH has - an inverted doping profile with a doping concentration decreasing in a direction pointing from an interior of the semiconductor body towards the top side or - a homogenous doping profile. With respect to claim 4, the contact region (225) and the channel portion of HSHIEH at least partially overlap with each other when viewed along the first lateral direction. With respect to claim 5, the drift region (212) of HSHIEH has a greater doping concentration than the drift layer (210). With respect to claim 6, in plan view of the top side, the gate electrode (230) of HSHIEH partially covers the contact region (225). With respect to claim 7, the power semiconductor device of HSHIEH is a MOSFET or an IGBT or a MISFET. With respect to claim 18, As best understood by the Examiner, the contact region (125’) of HSHIEH adjoins another the electrically isolating material (220) covering lateral surfaces of the gate electrode (230). Claim Rejections - 35 USC § 103 The text of those sections of Title 35, U.S. Code not included in this action can be found in a prior Office action. Claim 8 is rejected under 35 U.S.C. 103 as being unpatentable over HSHIEH ‘169 as applied to claim 1 above, and further in view of HUANG (CN pub. No. 109244119) of record. HSHIEH teaches the power semiconductor device as described in claim 1 above including the semiconductor body is based on Si having a bandgap, and the drift region (212) projects beyond the base region (240) by at least 50 nm to reduce parasitic gate/drain capacitance, and the drift region (212) is epitaxially grown. Thus, HSHIEH is shown to teach all the features of the claim with the exception of explicitly disclosing the semiconductor body being based on SiC. However, HUANG teaches a power semiconductor device utilizing a semiconductor body based on SiC having a bandgap wider than silicon. Therefore, it would have been obvious to one having ordinary skill in the art at the time of invention was made to form the power semiconductor device of HSHIEH utilizing the wide-bandgap semiconductor as taught by HUANG to provide for a MOS device having higher avalanche resistance. Moreover, given a finite number of materials and their compounds, it is obvious to try without undue experimentation. Further, it has been held to be within the general skill of a worker in the art to select a known material on the basis of it suitability for the intended use as a matter of obvious design choice. In re Leshin, 125 USPQ 416., 125 USPQ 416. Claim 9, 17 and 21 are rejected under 35 U.S.C. 103 as being unpatentable over HSHIEH ‘169 as applied to claim 1 above, and further in view of KOJIMA et al. (US. Pub. No. 2005/0230686). HSHIEH teaches the power semiconductor device as described in claim 1 above including the gate electrode (230) projecting beyond the base region (240) at least partially overlap with each other when viewed along the first lateral direction; and the contact region (225) being above the base region (240). Thus, HSHIEH is shown to teach all the features of the claim with the exception of explicitly disclosing the contact region projecting beyond the base region. However, KOJIMA teaches a power semiconductor device including gate electrode (8) and the contact region (4b) projecting beyond the base region (3b) at least partially overlap with each other when viewed along the first lateral direction. (See FIG. 1). Therefore, it would have been obvious to one having ordinary skill in the art at the time of invention was made to form the semiconductor device of HSHIEH having the gate electrode and the contact region projecting beyond the base region as taught by KOJIMA to improve channel mobility. With respect to claim 17, in view of KOJIMA, at the top side, the contact region (4b) also projects beyond the base region (3b) in vertical direction. With respect to claim 21, in view of KOJIMA, the contact region (4b) is projects beyond the base region (3b) at the top side. Response to Arguments Applicant's arguments filed July 14, 2026 have been fully considered but they are not persuasive. Rejection Under 35 USC § 102 Applicant argues: In HSHIEH '169, gate electrode 60 is formed on oxide layer 50 over top surface 12 of layer 10 and top surface 24 of base region 22, and gate electrode 60 extends onto the step-like portion of gate oxide layer 50 over oxide spacer 42. See HSHIEH '169, paragraph [0029]. In HSHIEH '169, the p-type silicon carbide layer remaining within the trench constitutes a p-type base region 22, and the n-type silicon carbide layer remaining within the trench constitutes an n+-type source region 36. See HSHIEH '169, paragraph [0026]. Layer 10 in HSHIEH '169 has n-type conductivity and may be characterized as a drift layer. See HSHIEH '169, paragraph [0020]. Critically, the drift layer 10 in HSHIEH '169 is the original semiconductor layer into which the trench is formed, not a separately formed drift region that projects beyond the base region and adjoins the electrically isolating material covering lateral surfaces of the gate electrode. However, none of the elements cited above can be found in HSHIEH ‘169. Applicant appears to cite elements of reference to HARRIS et al. (US. Pub. No. 2008/020398) instead of the reference to HSHIEH et al. (US. Patent No. 5,907,169). Note that, claim 1 is being anticipated (Rejection Under 35 USC § 102) by HSHIEH ‘169, not HARRIS ‘398. Applicant argues: HSHIEH '169 does not disclose or teach "wherein the drift region adjoins an electrically isolating material covering lateral surfaces of the gate electrode" as recited by claim 1 as amended. However, as shown in FIG. 5A, the drift region 212 clearly adjoins an electrically isolating material (gate insulating 132) covering lateral surfaces of the gate electrode 230. PNG media_image1.png 321 582 media_image1.png Greyscale The limitations are met. The rejection is maintained. The dependent claims 2-7 and 18 are rejected for at least the same reasons as claim 1. Rejection Under 35 USC § 103 The dependent claims 8, 9, 17 and 21 are rejected for at least the same reasons as claim 1. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to ANH D MAI whose telephone number is (571)272-1710 (Email: Anh.Mai2@uspto.gov). The examiner can normally be reached 10:00-4:00PM. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Sue A Purvis can be reached at 571-272-1236. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /ANH D MAI/ Primary Examiner, Art Unit 2893
Read full office action

Prosecution Timeline

Show 8 earlier events
Feb 23, 2026
Response after Non-Final Action
Feb 26, 2026
Non-Final Rejection mailed — §102, §103
May 04, 2026
Response Filed
May 15, 2026
Final Rejection mailed — §102, §103
Jul 14, 2026
Response after Non-Final Action
Aug 04, 2026
Request for Continued Examination
Aug 05, 2026
Response after Non-Final Action
Aug 12, 2026
Non-Final Rejection mailed — §102, §103 (current)

Precedent Cases

Applications granted by this same examiner with similar technology

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6y 6m to grant Granted Sep 01, 2026
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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

5-6
Expected OA Rounds
38%
Grant Probability
47%
With Interview (+9.6%)
3y 8m (~1y 11m remaining)
Median Time to Grant
High
PTA Risk
Based on 709 resolved cases by this examiner. Grant probability derived from career allowance rate.

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