DETAILED ACTION
Status of Application
Claims 26-45 are pending in the present application.
The Preliminary Amendment filed 02/27/2025 has been entered.
Information Disclosure Statement
The information disclosure statement (IDS) submitted on 08/27/2025, 05/29/2025, 12/19/2024 is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner.
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Double Patenting
The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969).
A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b).
The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13.
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Claims 26, 33, and 40 are rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1, 8, and 14, respectively, of U.S. Patent No. 12,141,689 B2, in view of Dickie, US 20160226512 A1.
Although the claims at issue are not identical, they are not patentably distinct from each other because every claim limitation in the application under examination is recited in the conflicting reference patent claims. The differences between the claims are highlighted below by italicizing all limitations that differ and bolding limitations that conflict.
Instant Application
U.S. Patent No. 12,141,689 B2
Claim 26. One or more processors, comprising:
processing circuitry to cause a plurality of compressed numbers to be
decompressed based, at least in part, on one or more relationships between a first number common to each of the plurality of compressed numbers and one or more second numbers common to each number within a subset of the plurality of compressed numbers.
Claim 1. A processor, comprising:
one or more circuits to compress information, wherein the one or more circuits are to:
identify a first common value within each value of a first set of values;
identify a second common value within each value of one or more subsets of values of the first set of values; and
store compressed information comprising a third value corresponding to a mathematical relationship between the first and second common values and each value within the one or more subsets of values.
‘689 does not explicitly disclose to cause a plurality of compressed numbers to be decompressed.
However, Dickie discloses a plurality of compressed numbers to be decompressed based [claim 1, method for decompressing compressed data, the compressed data including data indicating a common divisor…the data indicating the common divisor includes exponents for a predetermined set of numbers].
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to utilize the teachings of Dickie, in ‘689 to implement to cause a plurality of compressed numbers to be decompressed, in order to facilitate decompression and enabling efficient implementation of decompression operations in hardware [Dickie, paragraph 18].
Claim 38 is rejected on the ground of nonstatutory double patenting as being unpatentable over claim 11 of U.S. Patent No. 12,141,689 B2, in view of Dickie, US 20160226512 A1.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 26-29, 31, 33-36, 38, 40-43, and 45 is/are rejected under 35 U.S.C. 103 as being unpatentable over Bittner et al (hereinafter Bittner), US 20180157465 A1, in view of Dickie, US 20160226512 A1.
Referring to claims 26, 33, and 40, taking claim 26 as exemplary, Bittner discloses one or more processors, comprising:
processing circuitry [fig. 13, paragraph 113], one or more relationships between a first number common to each of the plurality of numbers [paragraph 104, “In some examples, the common exponent applies to all of the values stored in a respective matrix or vector”] and one or more second numbers common to each number within a subset of the plurality of numbers [claim 7, “In other examples, a common exponent can be applied for a set of a number of rows of a respective matrix or vector” (where a set of a number of rows can be a subset); claim 7, “adding a first common exponent for a first matrix or vector of the plurality of matrices or vectors to a second common exponent”, hence, an addition relationship between common exponents].
Bittner does not explicitly disclose a plurality of compressed numbers to be decompressed based.
However, Dickie discloses a plurality of compressed numbers to be decompressed based [claim 1, method for decompressing compressed data, the compressed data including data indicating a common divisor…the data indicating the common divisor includes exponents for a predetermined set of numbers].
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to utilize the teachings of Dickie, in the one or more processors of Bittner to implement, a plurality of compressed numbers to be decompressed based, in order to facilitate decompression and enabling efficient implementation of decompression operations in hardware [Dickie, paragraph 18].
Referring to claims 27, 34, and 41, taking claim 27 as exemplary, the modified Bittner discloses the one or more processors of claim 26, wherein the first number comprises an exponent value common to a block of floating point values [Bittner, paragraph 2, “Methods, apparatus, and computer-readable storage devices are disclosed for block floating-point (BFP) implementations”].
Referring to claims 28, 35, and 42, taking claim 28 as exemplary, the modified Bittner discloses the one or more processors of claim 27, wherein the one or more second numbers comprises a value common to one or more non-overlapping sub-tiles within the block of floating point values [Bittner, figs. 3A-3B, see non-overlapping sub-tiles such as 370; paragraph 30].
Referring to claims 29, 36, and 43, taking claim 29 as exemplary, the modified Bittner discloses the one or more processors of claim 26, wherein the plurality of compressed numbers are to be decompressed by calculating a difference value between the first number and the one or more second numbers [Bittner, claim 7, “subtracting a first common exponent for a first matrix or vector of the plurality of matrices or vectors from a second common exponent”].
Referring to claims 31, 38, and 45, taking claim 31 as exemplary, the modified Bittner discloses the one or more processors of claim 26, wherein the first number and the one or more second numbers comprise a data set of elements of a matrix of floating point numbers, wherein bits of each of the floating point numbers represent an exponent value [Bittner, claim 7, paragraph 30].
Allowable Subject Matter
Claims 30, 32, 37, 39, and 44 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter: The prior art of record taken alone or in combination fails to teach and/or fairly suggest wherein the plurality of compressed numbers are stored in a data store based on one or more indicators of the one or more relationships between the first number and the one or more second numbers, in combination with other recited limitations in claim 30.
The prior art of record taken alone or in combination fails to teach and/or fairly suggest wherein the plurality of compressed numbers are to be decompressed using a block floating point (BFP) encoder to determine the one or more relationships between the first number and the one or more second numbers, in combination with other recited limitations in claim 32.
The prior art of record taken alone or in combination fails to teach and/or fairly
suggest wherein the plurality of compressed numbers are stored in a data store based
on one or more indicators of the one or more relationships between the first number and
the one or more second numbers, in combination with other recited limitations in claim 37.
The prior art of record taken alone or in combination fails to teach and/or fairly suggest wherein the plurality of compressed numbers are to be decompressed using a block floating point (BFP) encoder to determine the one or more relationships between the first number and the one or more second numbers, in combination with other recited limitations in claim 39.
The prior art of record taken alone or in combination fails to teach and/or fairly suggest wherein the plurality of compressed numbers are stored in a data store based on one or more indicators of the one or more relationships between the first number and the one or more second numbers, in combination with other recited limitations in claim 44.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure:
Lo et al, US 12045724 B2, discloses an example method of generating outlier values [fig. 12].
Lo et al, US 20190347072 A1, discloses operations of a computing device for performing multi-tiered shared exponent block floating point computations according to various embodiments [fig. 7].
Any inquiry concerning this communication or earlier communications from the examiner should be directed to FARLEY J ABAD whose telephone number is (571)270-3425. The examiner can normally be reached Mon-Fri 8:30 AM - 7 PM.
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/Farley Abad/Primary Examiner, Art Unit 2181