DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 10-12 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 10 recites limitation “the inorganic film” (line 11). There is insufficient antecedent basis for this limitation in the claim because it is unclear whether “the inorganic film” relates back to “a first inorganic film” (line 3 of claim 1), “a second inorganic film” (line 5 of claim 1), or to set forth an additional inorganic film.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1-2, 9, 13-16, 18, and 20 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by US 2021/0066150 to Nakata (the reference US 2020/0243641 by Nakagawa et al. is presented as evidence (hereinafter Nakagawa)).
With respect to claim 1, Nakata discloses a semiconductor device (e.g., SiC semiconductor device including semiconductor elements) (Nakata, Figs. 2-5, ¶0001, ¶0005-¶0006, ¶0023-¶0046, ¶0072-¶0077), comprising:
a chip (e.g., semiconductor device 1 including semiconductor elements 11) (Nakata, Figs. 2-5, ¶0023, ¶0027, ¶0032-¶0033) having a main surface (e.g., an upper surface of the semiconductor element 11);
first inorganic film (e.g., an interlayer insulating film 12 including silicon oxide) (Nakata, Figs. 3-4, ¶0031, ¶0037, ¶0042) including an insulator (e.g., silicon oxide) and covering the main surface;
a second inorganic film (13) (e.g., an anchor insulating film 13 including silicon nitride) (Nakata, Figs. 3-4, ¶0029, ¶0039, ¶0041) including an insulator (e.g., silicon nitride) and covering the first inorganic film (12);
at least one through hole (e.g., a plurality of openings 13a) formed in the second inorganic film (13) (Nakata, Figs. 3-4, ¶0041-¶0044); and
an organic film (e.g., the protective film 14 including an organic insulator, such as, polyimide or polyamide) (Nakata, Figs. 3-4, ¶0031, ¶0035, ¶0044) embedded (e.g., the protective layer 14 is hooked on the openings 13 that is interpreted as curved in a shape of a hook defined by the portions of the anchor film 13 between the openings 13a and thus filling the openings 13a) in the through hole (13a) and covering the second inorganic film (13).
Regarding claim 2, Nakata discloses the semiconductor device according to claim 1. Further, Nakata discloses the semiconductor device, wherein the at least one through hole (13a) (Nakata, Figs. 3-4, ¶0031, ¶0035, ¶0042, ¶0044) includes a film- side through hole that exposes (e.g., removable of the first insulating film 12 during etching the second insulating film 13 is suppressed, thus the first insulating film 12 is exposed after forming openings 13a) (Nakata, Figs. 3-4, ¶0042 )the first inorganic film (12) in a cross-sectional view, and the organic film (14) includes a portion in contact with the first inorganic film (12) within the film-side through hole (13a).
Regarding claim 9, Nakata discloses the semiconductor device according to claim 1. Further, Nakata discloses the semiconductor device, further comprising: an electrode (e.g., the source electrode 11c) (Nakata, Figs. 2-3, ¶0027, ¶0029, ¶0031, ¶0038-¶0041) arranged on an inner portion of the main surface; wherein the at least one through hole (13a) is formed around the electrode (11c).
Regarding claim 13, Nakata discloses the semiconductor device according to claim 1. Further, Nakata discloses the semiconductor device, wherein the second inorganic film (13) (Nakata, Figs. 2-3, ¶0042) includes an insulator (silicon nitride) different from that (silicon oxide) of the first inorganic film (12).
Regarding claim 14, Nakata discloses the semiconductor device according to claim 1. Further, Nakata discloses the semiconductor device, wherein the first inorganic film (12) (Nakata, Figs. 2-3, ¶0042) includes an oxide film.
Regarding claim 15, Nakata discloses the semiconductor device according to claim 1. Further, Nakata discloses the semiconductor device, wherein the second inorganic film (13) (Nakata, Figs. 2-3, ¶0042) includes a nitride film.
Regarding claim 16, Nakata discloses the semiconductor device according to claim 1. Further, Nakata discloses the semiconductor device, wherein the organic film (14) (Nakata, Figs. 2-3, ¶0035) includes a photosensitive resin film (e.g., polyimide is known as a photosensitive resin, as evidenced by Nakagawa, ¶0783).
With respect to claim 18, Nakata discloses a semiconductor device (e.g., SiC semiconductor device including semiconductor elements) (Nakata, Figs. 2-5, ¶0001, ¶0005-¶0006, ¶0023-¶0046, ¶0072-¶0077) comprising:
a chip (e.g., semiconductor device 1 including semiconductor elements 11) (Nakata, Figs. 2-5, ¶0023, ¶0027, ¶0032-¶0033) having a main surface (e.g., an upper surface of the semiconductor element 11);
an inorganic film (e.g., an anchor insulating film 13 including silicon nitride) (Nakata, Figs. 3-4, ¶0029, ¶0039, ¶0041) including an insulator (e.g., silicon nitride) and covering the main surface (e.g., the upper surface of the semiconductor element 11);
at least one through hole (e.g., a plurality of openings 13a) formed in the inorganic film (13) (Nakata, Figs. 3-4, ¶0041-¶0044); and
an organic film (e.g., the protective film 14 including an organic insulator, such as, polyimide or polyamide) (Nakata, Figs. 3-4, ¶0031, ¶0035, ¶0044) embedded (e.g., the protective layer 14 is hooked on the openings 13 that is interpreted as curved in a shape of a hook defined by the portions of the anchor film 13 between the openings 13a and thus filling the openings 13a) in the through hole (13a) and covering the inorganic film (13).
Regarding claim 20, Nakata discloses the semiconductor device according to claim 18. Further, Nakata discloses the semiconductor device, wherein the inorganic film (13) (Nakata, Figs. 3-4, ¶0029, ¶0039, ¶0041-¶0042) is formed of a nitride film.
Claims 18-20 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by US 2017/0110545 to Nagao et al. (hereinafter Nagao).
With respect to claim 18, Nagao discloses a semiconductor device (e.g., SiC semiconductor device) (Nagao, Figs. 1-2, 6, 11, ¶0001, ¶0010-¶0013, ¶0058-¶0079, ¶0105-¶0106, ¶0131-¶0139, ¶0149-¶0150) comprising:
a chip (1) (Nagao, Figs. 1-2, 6, 11, ¶0059-¶0061, ¶0089-¶0090) having a main surface (e.g., an outermost surface of the chip including a top surface of the SIC epitaxial layer 28);
an inorganic film (e.g., an insulating film 47 including an insulating film under metal 61/62 in the outer peripheral region 3) (Nagao, Figs. 6, 11, ¶0060, ¶0105, ¶0131) including an insulator (e.g., silicon oxide or silicon nitride) and covering the main surface (e.g., the top surface of the SIC epitaxial layer 28 in the outer peripheral region 3);
at least one through hole (e.g., opening 68) formed in the inorganic film (61/62) (Nagao, Figs. 6, 11, ¶0134, ¶0149); and
an organic film (e.g., the passivation film 40 including an organic insulator, such as, polyimide-based material or acrylic-based material) (Nagao, Figs. 6, 11, ¶0136-¶0137) embedded in the through hole (68) and covering the inorganic film (e.g., the insulating film 47 including the insulating film under metal 61/62 in the outer peripheral region 3).
Regarding claim 19, Nagao discloses the semiconductor device according to claim 18. Further, Nagao discloses the semiconductor device, wherein the through hole (68) (Nagao, Figs. 6, 11, ¶0137) exposes the main surface (e.g., the top surface of the SIC epitaxial layer 28), and the organic film (40) contacts the main surface within the through hole (68).
Regarding claim 20, Nagao discloses the semiconductor device according to claim 18. Further, Nagao discloses the semiconductor device, wherein the inorganic film (61/62) (Nagao, Figs. 6, 11, ¶0105, ¶0131) is formed of an oxide film or a nitride film.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 3-8 and 19 are rejected under 35 U.S.C. 103 as being unpatentable over US 2021/0066150 to Nakata in view of Nagao (US 2017/0110545).
Regarding claim 3, Nakata discloses the semiconductor device according to claim 1. Further, Nakata does not specifically disclose that the at least one through hole includes a surface-side through hole that exposes the main surface in a cross-sectional view, and the organic film includes a portion in contact with the main surface within the surface-side through hole.
However, Nagao teaches forming a semiconductor device (Nagao, Figs. 1-2, 6, 11, ¶0059-¶0061, ¶0089-¶0090) including at least one through hole (68), wherein the at least one through hole (68) (Nagao, Figs. 6, 11, ¶0139, ¶0149) includes a surface-side through hole that exposes the main surface (e.g., the upper surface of the SiC epitaxial layer 28) in a cross-sectional view, and the organic film (40) includes a portion in contact with the main surface within the surface-side through hole (68), to provide a secured contact area between the organic film and the main surface of the semiconductor substrate (28) to improve adhesion of the organic passivation film (40) to the SiC semiconductor substrate, and to provide a semiconductor device with improved characteristics.
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the invention to modify the semiconductor device of Nakata by forming a contact hole exposing the main surface and having sufficient contact area as taught by Nagao to have the semiconductor device, wherein the at least one through hole includes a surface-side through hole that exposes the main surface in a cross-sectional view, and the organic film includes a portion in contact with the main surface within the surface-side through hole, in order to provide a secured contact area between the organic film and the main surface of the semiconductor substrate to improve adhesion of the organic passivation film to the SiC semiconductor substrate, and to provide a semiconductor device with improved characteristics (Nagao, ¶0001, ¶0037-¶0039, ¶0262-¶0263, ¶0139, ¶0149).
Regarding claim 4, Nakata in view of Nagao discloses the semiconductor device according to claim 3. Further, Nakata does not specifically disclose that the surface-side through hole exposes the main surface and the first inorganic film in a cross-sectional view, and the organic film is in contact with both the main surface and the first inorganic film within the surface- side through hole.
However, Nagao teaches forming at least one through hole (68) (Nagao, Figs. 6, 11, ¶0139, ¶0149) including the surface-side through hole that exposes the main surface (e.g., the upper surface of the SiC epitaxial layer 28) and the first inorganic film (e.g., side surfaces of the insulating film 61/62) in a cross-sectional view, and the organic film (40) is in contact with both the main surface and the first inorganic film (61/62) within the surface- side through hole.
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the invention to modify the semiconductor device of Nakata/Nagao by forming a contact hole exposing the main surface and side surfaces of the inorganic film and having sufficient contact area as taught by Nagao to have the semiconductor device, wherein the surface-side through hole exposes the main surface and the first inorganic film in a cross-sectional view, and the organic film is in contact with both the main surface and the first inorganic film within the surface- side through hole, in order to provide a secured contact area between the organic film and the main surface of the semiconductor substrate to improve adhesion of the organic passivation film to the SiC semiconductor substrate, and to provide a semiconductor device with improved characteristics (Nagao, ¶0001, ¶0037-¶0039, ¶0262-¶0263, ¶0139, ¶0149).
Regarding claim 5, Nakata discloses the semiconductor device according to claim 1. Further, Nakata does not specifically disclose that the first inorganic film includes a base through hole exposing the main surface, the second inorganic film includes a first portion covering the first inorganic film outside the base through hole and a second portion covering the main surface within the base through hole, and the organic film includes a portion covering the first portion and a portion covering the second portion.
However, Nagao teaches forming a semiconductor device (Nagao, Figs. 1-2, 6, 11, ¶0059-¶0061, ¶0089-¶0090) comprising the first inorganic film (35) that includes a base through hole (e.g., a hole 68 in the insulating layer 35 exposing the top surface of the substrate 28) exposing the main surface, the second inorganic film (47) (Nagao, Figs. 6, 11, ¶0105-¶0106, ¶0131, ¶0139, ¶0149) includes a first portion (36) covering the first inorganic film (35) outside the base through hole (58) and a second portion (61) covering the main surface within the base through hole, and the organic film (40) includes a portion covering the first portion (36) and a portion covering the second portion (61), to provide a secured contact area between the organic film and the main surface of the semiconductor substrate (28) to improve adhesion of the organic passivation film (40) to the SiC semiconductor substrate, and to provide a semiconductor device with improved characteristics.
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the invention to modify the semiconductor device of Nakata by forming the inorganic film having a first portion and second portion, and a contact hole exposing the main surface and having sufficient contact area as taught by Nagao to have the semiconductor device, wherein the first inorganic film includes a base through hole exposing the main surface, the second inorganic film includes a first portion covering the first inorganic film outside the base through hole and a second portion covering the main surface within the base through hole, and the organic film includes a portion covering the first portion and a portion covering the second portion, in order to provide a secured contact area between the organic film and the main surface of the semiconductor substrate to improve adhesion of the organic passivation film to the SiC semiconductor substrate, and to provide a semiconductor device with improved characteristics (Nagao, ¶0001, ¶0037-¶0039, ¶0262-¶0263, ¶0139, ¶0149).
Regarding claim 6, Nakata in view of Nagao discloses the semiconductor device according to claim 5. Further, Nakata does not specifically disclose that the second portion includes a front surface located on the main surface side with respect to a height position of a front surface of the first portion, and forms a stepped portion between the second portion and the first portion.
However, Nagao teaches that the second portion (61) (Nagao, Figs. 6, 11, ¶0105-¶0106, ¶0131, ¶0139, ¶0149) includes a front surface covering the main surface within the base through hole, and having a height smaller than that of the first portion (36) such that a stepped portion is formed between the second portion (61) and the first portion (36).
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the invention to modify the semiconductor device of Nakata/Nagao by forming the inorganic film having a first portion and second portion, and a contact hole having sufficient contact area as taught by Nagao to have the semiconductor device, wherein the second portion includes a front surface located on the main surface side with respect to a height position of a front surface of the first portion, and forms a stepped portion between the second portion and the first portion, in order to provide a secured contact area between the organic film and the main surface of the semiconductor substrate to improve adhesion of the organic passivation film to the SiC semiconductor substrate, and to provide a semiconductor device with improved characteristics (Nagao, ¶0001, ¶0037-¶0039, ¶0262-¶0263, ¶0139, ¶0149).
Regarding claim 7, Nakata in view of Nagao discloses the semiconductor device according to claim 5. Further, Nakata does not specifically disclose that the second inorganic film has a thickness less than half the width of the base through hole.
However, Nagao teaches forming the second inorganic film (47) (Nagao, Figs. 6, 11, ¶0105-¶0106, ¶0131, ¶0139, ¶0149) having a thickness of 1 mm to 5 mm and a contact hole having a distance A of 40 mm or greater to provide a sufficiently secured contact area between the second inorganic film (47) and the semiconductor substrate (28), and to improve adhesion between the organic film (40) and the second insulating film (47), wherein the thickness of the second inorganic film (47 is )less than half the width of the base through hole including a distance (A).
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the invention to modify the semiconductor device of Nakata/Nagao by forming the inorganic film having a specific thickness, and a contact hole having sufficient contact area as taught by Nagao to have the semiconductor device, wherein the second inorganic film has a thickness less than half the width of the base through hole, in order to provide a secured contact area between the organic film and the main surface of the semiconductor substrate to improve adhesion of the organic passivation film to the SiC semiconductor substrate, and to provide a semiconductor device with improved characteristics (Nagao, ¶0001, ¶0037-¶0039, ¶0262-¶0263, ¶0139, ¶0149).
Regarding claim 8, Nakata in view of Nagao discloses the semiconductor device according to claim 5. Further, Nakata does not specifically disclose that the at least one through hole includes a wall- side through hole that exposes a wall portion of the base through hole in a cross-sectional view, and the organic film includes a portion within the wall- side through hole that contacts the wall portion of the base through hole.
However, Nagao teaches forming the second inorganic film (47) (Nagao, Fig. 11, ¶0105-¶0106, ¶0131, ¶0139, ¶0149) having the at least one through hole (e.g., a hole including two holes 68 and a portion of the insulating film 79 within the at least one through hole) that includes a wall- side through hole (e.g., a hole between the portions 79 and 61 of the insulating film) and that exposes a wall portion of the base through hole (e.g., a wall of the hole 68) in a cross-sectional view, and the organic film (40) includes a portion within the wall- side through hole that contacts the wall portion of the base through hole.
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the invention to modify the semiconductor device of Nakata/Nagao by forming the inorganic film having a contact hole having sufficient contact area as taught by Nagao to have the semiconductor device, wherein the at least one through hole includes a wall- side through hole that exposes a wall portion of the base through hole in a cross-sectional view, and the organic film includes a portion within the wall- side through hole that contacts the wall portion of the base through hole, in order to provide a secured contact area between the organic film and the main surface of the semiconductor substrate to improve adhesion of the organic passivation film to the SiC semiconductor substrate, and to provide a semiconductor device with improved characteristics (Nagao, ¶0001, ¶0037-¶0039, ¶0262-¶0263, ¶0139, ¶0149).
Regarding claim 19, Nakata discloses the semiconductor device according to claim 18. Further, Nakata does not specifically disclose that the through hole exposes the main surface, and the organic film contacts the main surface within the through hole.
However, Nagao teaches forming at least one through hole (68) (Nagao, Figs. 6, 11, ¶0139, ¶0149) including the surface-side through hole that exposes the main surface (e.g., the upper surface of the SiC epitaxial layer 28) and the first inorganic film (e.g., side surfaces of the insulating film 61/62) in a cross-sectional view, and the organic film (40) is in contact with both the main surface and the first inorganic film (61/62) within the surface- side through hole.
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the invention to modify the semiconductor device of Nakata by forming a contact hole exposing the main surface and side surfaces of the inorganic film and having sufficient contact area as taught by Nagao to have the semiconductor device, wherein the through hole exposes the main surface, and the organic film contacts the main surface within the through hole, in order to provide a secured contact area between the organic film and the main surface of the semiconductor substrate to improve adhesion of the organic passivation film to the SiC semiconductor substrate, and to provide a semiconductor device with improved characteristics (Nagao, ¶0001, ¶0037-¶0039, ¶0262-¶0263, ¶0139, ¶0149).
Claims 10-12 are rejected under 35 U.S.C. 103 as being unpatentable over US 2021/0066150 to Nakata in view of Moriya (US 2024/0021723) and Nagao (US 2017/0110545).
Regarding claim 10, Nakata discloses the semiconductor device according to claim 5. Further, Nakata discloses the semiconductor device, further comprising: a first surface portion formed in the inner portion (AR) (Nakata, Figs. 2-3, ¶0023, ¶0027-¶0029) of the main surface, a second surface portion (e.g., a terminal region 11a including an upper surface of the semiconductor element 11) formed in a peripheral edge portion of the main surface, wherein the first inorganic film (12) covers the second surface portion (e.g., in the terminal region 11a), the second inorganic film (13) covers the first inorganic film (12) on the second surface portion side, the through hole (13a) (Nakata, Figs. 3-4, ¶0041-¶0044) is formed in the second inorganic film (13) on the second surface portion side, but does not specifically disclose (1) a mesa portion defined in the main surface by a first surface portion formed in the inner portion of the main surface, a second surface portion formed in a peripheral edge portion of the main surface so as to be recessed from the first surface portion in a thickness direction of the chip, and a connecting surface portion connecting the first surface portion and the second surface portion; (2) wherein the inorganic film is embedded in the through hole and covers the second inorganic film on the second surface portion side.
Regarding (1) and (2), Moriya teaches forming a semiconductor device (Moriya, Figs. 2-3, ¶0020, ¶0043-¶0048, ¶0053-¶0096) comprising a mesa portion (14) (Moriya, Figs. 2-3, ¶0055) defined in the main surface (10) by a first surface portion (10a) formed in the inner portion (e.g., active region 1) of the main surface (10), a second surface portion (10b) formed in a peripheral edge portion (e.g., termination region 2) of the main surface (10) so as to be recessed from the first surface portion (10a) in a thickness direction of the chip, and a connecting surface portion (10c) connecting the first surface portion (10a) and the second surface portion (10b), and the interlayer insulating film (40) (Moriya, Figs. 2-3, ¶0068) covers the second inorganic film (e.g., field oxide 61) on the second surface portion side (2), wherein the peripheral edge portion (e.g., termination region 2) surrounding the mesa-type active region is configured to enhance the breakdown voltage of the semiconductor device.
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the invention to modify the semiconductor device of Nakata by forming a semiconductor device comprising a mesa-type active region surrounded by the peripheral edge portion, and the interlayer insulating film in the peripheral edge portion as taught by Moriya, wherein the interlayer insulating film includes inorganic material to have the semiconductor device, wherein a mesa portion defined in the main surface by a first surface portion formed in the inner portion of the main surface, a second surface portion formed in a peripheral edge portion of the main surface so as to be recessed from the first surface portion in a thickness direction of the chip, and a connecting surface portion connecting the first surface portion and the second surface portion; wherein the inorganic film covers the second inorganic film on the second surface portion side, in order to provide a semiconductor device with enhanced breakdown voltage (Moriya, ¶0055, ¶0096, ¶0138-¶0139).
Regarding (2), Nagao teaches forming the inorganic film (79) (Nagao, Fig. 11, ¶0105-¶0106, ¶0131, ¶0149) embedded in the through hole (e.g., two openings 68 form a through hole) on the second surface portion side.
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the invention to modify the semiconductor device of Nakata/Moriya by forming the inorganic film embedded in the through hole as taught by Nagao to have the semiconductor device, wherein the inorganic film is embedded in the through hole on the second surface portion side, in order to provide a secured contact area between the organic film and the main surface of the semiconductor substrate to improve adhesion of the organic passivation film to the SiC semiconductor substrate, and to provide a semiconductor device with improved characteristics (Nagao, ¶0001, ¶0037-¶0039, ¶0262-¶0263, ¶0139, ¶0149).
Regarding claim 11, Nakata in view of Moriya and Nagao discloses the semiconductor device according to claim 10. Further, Nakata does not specifically disclose that the second inorganic film is formed at an interval from the first surface portion on the second surface side.
However, Nagao teaches forming the second inorganic film (e.g., a portion 79 of the inorganic film 47) (Nagao, Fig. 11, ¶0105-¶0106, ¶0131, ¶0149) embedded in the through hole (e.g., two openings 68 form a through hole) on the second surface portion side at an interval (e.g., distance A1) from the first surface portion in the active region (2), wherein the distance (A1) corresponds to the contact area between the organic passivation film (40) and the semiconductor substrate.
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the invention to modify the semiconductor device of Nakata/Moriya/Nagao by forming the inorganic film within a contact hole having sufficient contact area as taught by Nagao to have the semiconductor device, wherein the second inorganic film is formed at an interval from the first surface portion on the second surface side, in order to provide a secured contact area between the organic film and the main surface of the semiconductor substrate to improve adhesion of the organic passivation film to the SiC semiconductor substrate, and to provide a semiconductor device with improved characteristics (Nagao, ¶0001, ¶0037-¶0039, ¶0262-¶0263, ¶0139, ¶0149).
Regarding claim 12, Nakata in view of Moriya and Nagao discloses the semiconductor device according to claim 10. Further, Nakata discloses the semiconductor device, wherein the second inorganic film (13) (Nakata, Fig. 2-3, ¶0027, ¶0029) does not cover a metal (e.g., a gate wiring 11b) on the second surface side (e.g., terminal region 11a).
Claim 17 is rejected under 35 U.S.C. 103 as being unpatentable over US 2021/0066150 to Nakata in view of Nakagawa (US 2020/0243641).
Regarding claim 17, Nakata discloses the semiconductor device according to claim 1. Further, Nakata discloses the semiconductor device, wherein the chip includes a wide bandgap semiconductor (e.g., SiC) (Nakata, Figs. 2-3, ¶0032), but does not specifically disclose a single crystal of a wide bandgap semiconductor.
However, Nakagawa teaches forming a semiconductor device comprising SiC monocrystal (Nakagawa, ¶0262, ¶0263), to provide a semiconductor device with improved electrical characteristics (e.g., short circuit withstand capability) (Nakagawa, ¶0010, ¶0013, ¶0262-¶0263, ¶0337-¶0339).
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the invention to modify the semiconductor device of Nakata by forming a semiconductor device comprising SiC monocrystal as taught by Nakagawa to have the semiconductor device, wherein the chip includes a single crystal of a wide bandgap semiconductor, in order to provide a semiconductor device with improved electrical characteristics (e.g., short circuit withstand capability) (Nakagawa, ¶0010, ¶0013, ¶0262-¶0263, ¶0337-¶0339).
Conclusion
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/NATALIA A GONDARENKO/Primary Examiner, Art Unit 2891
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