DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Double Patenting
A rejection based on double patenting of the “same invention” type finds its support in the language of 35 U.S.C. 101 which states that “whoever invents or discovers any new and useful process... may obtain a patent therefor...” (Emphasis added). Thus, the term “same invention,” in this context, means an invention drawn to identical subject matter. See Miller v. Eagle Mfg. Co., 151 U.S. 186 (1894); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Ockert, 245 F.2d 467, 114 USPQ 330 (CCPA 1957).
A statutory type (35 U.S.C. 101) double patenting rejection can be overcome by canceling or amending the claims that are directed to the same invention so they are no longer coextensive in scope. The filing of a terminal disclaimer cannot overcome a double patenting rejection based upon 35 U.S.C. 101.
Claims 1-20 are rejected under 35 U.S.C. 101 as claiming the same invention as that of claims 1-20 of prior U.S. Patent No. US 12, 094, 087 B2. This is a statutory double patenting rejection.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Khemka et al. (US 11,582,431 B1) teaches an image sensor captures an image at a first bit-depth. The image sensor may be, for example, an HDR image sensor that captures images at a high bit-depth (e.g., a bit-depth of 24 bits). The image sensor may be an HDR sensor having a bit depth of, for example, 20 bits, 24 bits, 26 bits, 32 bits, and so on. At operation 204, the image sensor (e.g., a processing device at the image sensor) compresses the image from the first bit depth to a lower second bit depth (e.g., from a bit-depth of 24 bits to a bit-depth of 12 bits) (Col. 8, Paragraph II).
Frank et al. (US 2012/0206470 A1) teaches an image signal processor may include a first data path of a relatively high bit depth, front-end image processing logic, and a second data path of a relatively low bit depth. The first data path may receive HDR image data from an image sensor. The front-end image processing logic may convert the HDR image data into lower-bit-depth image data, while preserving highlight details and/or shadow details of the HDR image, by using at least two transfer functions that preserve different subsets of the high dynamic range. The second data path may output this lower-bit-depth image data to other image processing logic for additional image processing (¶0007).
Su et al. (US 2016/0021391 A1) teaches prediction operation from low bit depth BL image data to high bit depth VDR image data, contouring artifacts often occur in the high bit depth VDR image data as a result of one-to-many mappings in the prediction operation (¶0004).
Contacts
Any inquiry concerning this communication or earlier communications from the examiner should be directed to MEKONNEN D DAGNEW whose telephone number is (571)270-5092. The examiner can normally be reached on 8:00AM-5:00PM M-Th.
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/MEKONNEN D DAGNEW/Primary Examiner, Art Unit 2638