Prosecution Insights
Last updated: August 06, 2026
Application No. 18/886,630

Multiple-Input Power Supply and Control Method

Non-Final OA §102§103§DP
Filed
Sep 16, 2024
Priority
Jul 20, 2021 — provisional 63/223,670 +1 more
Examiner
TORRES-RIVERA, ALEX
Art Unit
2838
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Aa Power Inc.
OA Round
1 (Non-Final)
87%
Grant Probability
Favorable
1-2
OA Rounds
2m
Est. Remaining
98%
With Interview

Examiner Intelligence

Grants 87% — above average
87%
Career Allowance Rate
673 granted / 777 resolved
+18.6% vs TC avg
Moderate +11% lift
Without
With
+11.2%
Interview Lift
resolved cases with interview
Fast prosecutor
2y 1m
Avg Prosecution
29 currently pending
Career history
801
Total Applications
across all art units

Statute-Specific Performance

§101
0.3%
-39.7% vs TC avg
§103
54.7%
+14.7% vs TC avg
§102
24.7%
-15.3% vs TC avg
§112
17.2%
-22.8% vs TC avg
Black line = Tech Center average estimate • Based on career data from 777 resolved cases

Office Action

§102 §103 §DP
DETAILED ACTION This action is in response to the Application filed 09/16/2024. Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. Claim Objections Claim 1 recites “a second primary switch coupled in cascade the second ac power source and a second primary winding”. It appears that it should be “a second primary switch coupled in cascade between the second ac power source and a second primary winding”. Specification The lengthy specification has not been checked to the extent necessary to determine the presence of all possible minor errors. Applicant’s cooperation is requested in correcting any errors of which applicant may become aware in the specification. Drawings The drawings are objected to under 37 CFR 1.83(a). The drawings must show every feature of the invention specified in the claims. Therefore, the “an ac/dc converter configured to establish a bias voltage for the system controller” of claim 18 must be shown or the feature(s) canceled from the claim(s). No new matter should be entered. Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. The figure or figure number of an amended drawing should not be labeled as “amended.” If a drawing figure is to be canceled, the appropriate figure must be removed from the replacement sheet, and where necessary, the remaining figures must be renumbered and appropriate changes made to the brief description of the several views of the drawings for consistency. Additional replacement sheets may be necessary to show the renumbering of the remaining figures. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance. Double Patenting The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969). A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b). The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13. The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/patent/patents-forms. The actual filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA /25, or PTO/AIA /26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to www.uspto.gov/patents/apply/applying-online/eterminal-disclaimer. Claims 1 and 12 are rejected on the ground of nonstatutory double patenting as being unpatentable over claim 17 of U.S. Patent No. 12,126,250. Although the claims at issue are not identical, they are not patentably distinct from each other, see below. Instant Application US Patent No. 12,126,250 1. A method comprising: providing a power conversion system having a first input coupled to a first ac power source and a second input coupled to a second ac power source, wherein the power conversion system comprises a first primary side power network comprising a first power converter, a first hold-up capacitor and a first primary switch coupled in cascade between the first ac power source and a first primary winding of a transformer, and a second primary side power network comprising a second power converter, a second hold-up capacitor and a second primary switch coupled in cascade the second ac power source and a second primary winding of the transformer; when both the first ac power source and the second ac power source are available, disabling the second power converter; and configuring the first primary switch and the second primary switch to operate in a sync manner so that a voltage across the second hold-up capacitor is maintained by a reflected voltage. 12. A power conversion system comprising: a first power converter, a first hold-up capacitor and a first primary switch coupled in cascade between a first ac power source and a first primary winding of a transformer; a second power converter, a second hold-up capacitor and a second primary switch coupled between a second ac power source and a second primary winding of the transformer; and a system controller configured to disable the second power converter upon detecting two available ac power sources, and configure the first primary switch and the second primary switch to operate in a sync manner so that a voltage across the second hold-up capacitor is maintained by a reflected voltage. 17. A method comprising: providing a dual-input power conversion system having two inputs coupled to a first ac power source and a second ac power source, respectively, wherein the dual-input power conversion system comprises: a first primary side power network comprising a first power converter, a first hold-up capacitor and a first primary switch coupled between the first ac power source and a first primary winding of a transformer; a second primary side power network comprising a second power converter, a second hold-up capacitor and a second primary switch coupled between the second ac power source and a second primary winding of the transformer; and a secondary side power network coupled between a secondary side of the transformer and a load; detecting whether both the first ac power source and the second ac power source are available; in response to two available ac power sources, disabling the second power converter and configuring the first ac power source to provide power to the load, and configuring the first primary switch and the second primary switch to operate in a sync manner so that a voltage across one of the first hold-up capacitor and the second hold-up capacitor is maintained by a voltage reflected from the secondary side to a corresponding primary side; and in response to a fault occurred in the first ac power source, disabling the first power converter, configuring the first hold-up capacitor and the second hold-up capacitor to provide power to the load, and enabling the second power converter to replenish the first hold-up capacitor and the second hold-up capacitor, and provide power to the load. Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. (a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention. Claim(s) 1 – 2, 12 – 13 and 15 is/are rejected under 35 U.S.C. 102(a)(1) and 102(a)(2) as being anticipated by US Pub. No. 2017/0170733; (hereinafter Ferencz). Regarding claim 1, Ferencz [e.g. Fig. 4A-4B] discloses a method comprising: providing a power conversion system having a first input coupled to a first ac power source [e.g. AC1] and a second input coupled to a second ac power source [e.g. AC2], wherein the power conversion system comprises a first primary side power network comprising a first power converter [e.g. 311], a first hold-up capacitor [e.g. Fig. 4B; 31C] and a first primary switch [e.g. active high side switch of full bridge in 312] coupled in cascade between the first ac power source and a first primary winding of a transformer [e.g. upper primary winding of transformer 312, 322], and a second primary side power network comprising a second power converter [e.g. 321], a second hold-up capacitor [e.g. 32C] and a second primary switch [e.g. active high side switch of full bridge in 322] coupled in cascade the second ac power source and a second primary winding of the transformer [e.g. lower primary winding of 312, 322]; when both the first ac power source and the second ac power source are available, disabling the second power converter [e.g. paragraph 080 – 083 recite “either the first power supply unit 11 or the second power supply unit 12 may provide its output power for the load 50 by controlling an OR′ing switch thereof when both the first AC power source AC1 and the second AC power source AC2 are normal. The second power supply unit 12 is operated under a standby mode when the first power supply unit 11 is operated to output power, and vice versa. For example, semiconductor switches of the first bi-directional DC transformer 312 are controlled in a switching operation and semiconductor switches of the second bi-directional DC transformer 322 are controlled in a turn-off state, thereby completely supplying power to the load 50 by the first power supply unit 11”]; and configuring the first primary switch and the second primary switch to operate in a sync manner [e.g. paragraph 080 – 083 recite “either the first power supply unit 11 or the second power supply unit 12 may provide its output power for the load 50 by controlling an OR′ing switch thereof when both the first AC power source AC1 and the second AC power source AC2 are normal. The second power supply unit 12 is operated under a standby mode when the first power supply unit 11 is operated to output power, and vice versa. For example, semiconductor switches of the first bi-directional DC transformer 312 are controlled in a switching operation and semiconductor switches of the second bi-directional DC transformer 322 are controlled in a turn-off state, thereby completely supplying power to the load 50 by the first power supply unit 11. In contrast, the semiconductor switches of the second bi-directional DC transformer 322 are controlled in a switching operation and the semiconductor switches of the first bi-directional DC transformer 312 are controlled in a turn-off state, thereby completely supplying power to the load 50 by the second power supply unit 12. In addition, the semiconductor switches of the first bi-directional DC transformer 312 and the semiconductor switches of the second bi-directional DC transformer 322 are both controlled in the switching operations, thereby jointly supplying power to the load 50 by the first and second power supply units 11, 12”] so that a voltage across the second hold-up capacitor is maintained by a reflected voltage [e.g. paragraph 070 recites “the Bulk capacitor 31C of the first PFC Boost 311 may further store energy transmitted from the second power supply unit 12 via the first bi-directional DC transformer 312. Similarly, the Bulk capacitor 32C of the second PFC Boost 321 may further store energy transmitted from the first power supply unit 11 via the second bi-directional DC transformer 322. Therefore, the energy stored in the two Bulk capacitors may be shared to each other via the two bi-directional DC transformers 312, 322.” Paragraph 075 recites “The common capacitor 323 required provides interim energy storage for loss of input power either through transitions from one active line to another or due to that normal expected disturbances to the input power is reduced in total since the two bi-directional DC transformers 312, 322 effectively parallel the high-voltage Bulk capacitors 31C, 32C of either AC to DC supply”]. Regarding claim 12, Ferencz [e.g. Fig. 4A-4B] discloses a power conversion system comprising: a first power converter [e.g. 311], a first hold-up capacitor [e.g. Fig. 4B; 31C] and a first primary switch [e.g. active high side switch of full bridge in 312] coupled in cascade between a first ac power source [e.g. AC1] and a first primary winding of a transformer [e.g. upper primary winding of transformer 312, 322]; a second power converter [e.g. 321], a second hold-up capacitor [e.g. 32C] and a second primary switch [e.g. active high side switch of full bridge in 322] coupled between a second ac power source [e.g. AC2] and a second primary winding of the transformer [e.g. lower primary winding of transformer 312, 322]; and a system controller [e.g. Fig. 4A; 325] configured to disable the second power converter upon detecting two available ac power sources [e.g. paragraph 080 – 083 recite “either the first power supply unit 11 or the second power supply unit 12 may provide its output power for the load 50 by controlling an OR′ing switch thereof when both the first AC power source AC1 and the second AC power source AC2 are normal. The second power supply unit 12 is operated under a standby mode when the first power supply unit 11 is operated to output power, and vice versa. For example, semiconductor switches of the first bi-directional DC transformer 312 are controlled in a switching operation and semiconductor switches of the second bi-directional DC transformer 322 are controlled in a turn-off state, thereby completely supplying power to the load 50 by the first power supply unit 11”], and configure the first primary switch and the second primary switch to operate in a sync manner [e.g. paragraph 080 – 083 recite “either the first power supply unit 11 or the second power supply unit 12 may provide its output power for the load 50 by controlling an OR′ing switch thereof when both the first AC power source AC1 and the second AC power source AC2 are normal. The second power supply unit 12 is operated under a standby mode when the first power supply unit 11 is operated to output power, and vice versa. For example, semiconductor switches of the first bi-directional DC transformer 312 are controlled in a switching operation and semiconductor switches of the second bi-directional DC transformer 322 are controlled in a turn-off state, thereby completely supplying power to the load 50 by the first power supply unit 11. In contrast, the semiconductor switches of the second bi-directional DC transformer 322 are controlled in a switching operation and the semiconductor switches of the first bi-directional DC transformer 312 are controlled in a turn-off state, thereby completely supplying power to the load 50 by the second power supply unit 12. In addition, the semiconductor switches of the first bi-directional DC transformer 312 and the semiconductor switches of the second bi-directional DC transformer 322 are both controlled in the switching operations, thereby jointly supplying power to the load 50 by the first and second power supply units 11, 12”] so that a voltage across the second hold-up capacitor is maintained by a reflected voltage [e.g. paragraph 070 recites “the Bulk capacitor 31C of the first PFC Boost 311 may further store energy transmitted from the second power supply unit 12 via the first bi-directional DC transformer 312. Similarly, the Bulk capacitor 32C of the second PFC Boost 321 may further store energy transmitted from the first power supply unit 11 via the second bi-directional DC transformer 322. Therefore, the energy stored in the two Bulk capacitors may be shared to each other via the two bi-directional DC transformers 312, 322.” Paragraph 075 recites “The common capacitor 323 required provides interim energy storage for loss of input power either through transitions from one active line to another or due to that normal expected disturbances to the input power is reduced in total since the two bi-directional DC transformers 312, 322 effectively parallel the high-voltage Bulk capacitors 31C, 32C of either AC to DC supply”]. Regarding claim 2 and claim 13, Ferencz [e.g. Fig. 4A-4B] discloses wherein: the first power converter is a first boost converter [e.g. 311; paragraph 065], wherein the first hold-up capacitor is an output capacitor of the first boost converter [e.g. 31C is at the output of 311]; the first primary switch and the first primary winding of the transformer form a primary side circuit of a first forward converter [e.g. 312]; the second power converter is a second boost converter [e.g. 321; paragraph 065], wherein the second hold-up capacitor is an output capacitor of the second boost converter [e.g. 32C is at the output of 311]; and the second primary switch and the second primary winding of the transformer form a primary side circuit of a second forward converter [e.g. 322]. Regarding claim 15, Ferencz [e.g. Fig. 4A-4B] discloses further comprising: a second controller [e.g. Fig. 4A; 325] configured to generate a first forward control signal applied to the first primary switch [e.g. control signal to 312] and a second forward control signal applied to the second primary switch [e.g. control signal to 322]. Claim(s) 3, 14 and 20 is/are rejected under 35 U.S.C. 103 as being unpatentable over Ferencz in view of US Pub. No. 2014/0016367; (hereinafter Chandrasekaran). Regarding claim 3, Ferencz fails to disclose configuring a first inductor of the first boost converter and a second inductor of the second boost converter to be magnetically coupled to each other to form a coupled inductor; configuring a first controller to generate a first boost control signal applied to a switch of the first boost converter; and configuring the first controller to generate a second boost control signal applied to a switch of the second boost converter, wherein the first boost control signal is complementary with the second boost control signal. Chandrasekaran [e.g. Figs. 1, 4 and 6] teaches configuring a first inductor [e.g. Nsc1] of the first boost converter [e.g. Nsc1, S1, D1] and a second inductor [e.g. Nsc2] of the second boost converter [e.g. Nsc2, S2, D2] to be magnetically coupled to each other to form a coupled inductor [e.g. paragraph 025 recites “The coupled boost inductor Lboost includes a common winding Nic (coupled between nodes 1 and 2), a first winding Nsc1 (coupled between nodes 2 and 3), and a second winding Nsc2 (coupled between nodes 2 and 4)”]; configuring a first controller [e.g. Fig. 1; 110] to generate a first boost control signal [e.g. GDs1] applied to a switch [e.g. S1] of the first boost converter; and configuring the first controller to generate a second boost control signal [e.g. GDs2] applied to a switch [e.g. S2] of the second boost converter, wherein the first boost control signal is complementary with the second boost control signal [e.g. as shown in Fig. 6; paragraph 038 recites “The first and second switches S1, S2 are controlled by a drive control circuit of the controller in a complementary way”]. It would have been obvious to one having ordinary skill in the before the effective filing date to modify Ferencz by configuring a first inductor of the first boost converter and a second inductor of the second boost converter to be magnetically coupled to each other to form a coupled inductor; configuring a first controller to generate a first boost control signal applied to a switch of the first boost converter; and configuring the first controller to generate a second boost control signal applied to a switch of the second boost converter, wherein the first boost control signal is complementary with the second boost control signal as taught by Chandrasekaran in order of being able to maintain a regulated output voltage. Regarding claim 14, Ferencz fails to disclose further comprising: a first controller to generate a first boost control signal applied to a switch of the first boost converter and a second boost control signal applied to a switch of the second boost converter, wherein the first boost control signal is complementary with the second boost control signal. Chandrasekaran [e.g. Figs. 1, 4 and 6] teaches further comprising: a first controller [e.g. Fig. 1; 110] to generate a first boost control signal [e.g. GDs1] applied to a switch [e.g. S1] of the first boost converter [e.g. Nsc1, S1, D1] and a second boost control signal [e.g. GDs2] applied to a switch [e.g. S2] of the second boost converter [e.g. Nsc2, S2, D2], wherein the first boost control signal is complementary with the second boost control signal [e.g. as shown in Fig. 6; paragraph 038 recites “The first and second switches S1, S2 are controlled by a drive control circuit of the controller in a complementary way”]. It would have been obvious to one having ordinary skill in the before the effective filing date to modify Ferencz by further comprising: a first controller to generate a first boost control signal applied to a switch of the first boost converter and a second boost control signal applied to a switch of the second boost converter, wherein the first boost control signal is complementary with the second boost control signal as taught by Chandrasekaran in order of being able to maintain a regulated output voltage. Regarding claim 20, Ferencz fails to disclose further comprising: a first inductor of the first power converter and a second inductor of the second power converter are magnetically coupled to each other to form a coupled inductor. Chandrasekaran [e.g. Figs. 1, 4 and 6] teaches further comprising: a first inductor [e.g. Nsc1] of the first power converter [e.g. Nsc1, S1 D1] and a second inductor [e.g. Nsc2] of the second power converter [e.g. Nsc2, S2, D2] are magnetically coupled to each other to form a coupled inductor [e.g. paragraph 025 recites “The coupled boost inductor Lboost includes a common winding Nic (coupled between nodes 1 and 2), a first winding Nsc1 (coupled between nodes 2 and 3), and a second winding Nsc2 (coupled between nodes 2 and 4)”]. It would have been obvious to one having ordinary skill in the before the effective filing date to modify Ferencz by further comprising: a first inductor of the first power converter and a second inductor of the second power converter are magnetically coupled to each other to form a coupled inductor as taught by Chandrasekaran in order of being able to maintain a regulated output voltage. Claim(s) 9, 10 and 18 is/are rejected under 35 U.S.C. 103 as being unpatentable over Ferencz in view of US Pub. No. 2016/0352231; (hereinafter Quigley). Regarding claim 9, Ferencz discloses configuring the system controller to detect whether both the first ac power source and the second ac power source available; and after detecting that both the first ac power source and the second ac power source available, configuring the system controller to only enable one of the first power converter and the second power converter [e.g. paragraph 080 – 083 recite “either the first power supply unit 11 or the second power supply unit 12 may provide its output power for the load 50 by controlling an OR′ing switch thereof when both the first AC power source AC1 and the second AC power source AC2 are normal. The second power supply unit 12 is operated under a standby mode when the first power supply unit 11 is operated to output power, and vice versa. For example, semiconductor switches of the first bi-directional DC transformer 312 are controlled in a switching operation and semiconductor switches of the second bi-directional DC transformer 322 are controlled in a turn-off state, thereby completely supplying power to the load 50 by the first power supply unit 11. In contrast, the semiconductor switches of the second bi-directional DC transformer 322 are controlled in a switching operation and the semiconductor switches of the first bi-directional DC transformer 312 are controlled in a turn-off state, thereby completely supplying power to the load 50 by the second power supply unit 12. In addition, the semiconductor switches of the first bi-directional DC transformer 312 and the semiconductor switches of the second bi-directional DC transformer 322 are both controlled in the switching operations, thereby jointly supplying power to the load 50 by the first and second power supply units 11, 12”]. Ferencz fails to disclose further comprising: during a startup process of the power conversion system, establishing a bias voltage for a system controller, wherein the bias voltage is generated by an independent power converter. Quigley [e.g. Fig. 2] teaches comprising: during a startup process of the power conversion system, establishing a bias voltage [e.g. VDD] for a system controller [e.g. 106], wherein the bias voltage is generated by an independent power converter [e.g. 250; paragraph 049 recites “The voltage on the tertiary winding is rectified by bridge rectifier 250 to provide bias to the start-up controller 106 at its VDD port…The start-up controller 106 is an open-loop method of starting up a series-parallel converter and depends on the secondary-side controller 238 becoming active during start-up”]. It would have been obvious to one having ordinary skill in the before the effective filing date to modify Ferencz by further comprising: during a startup process of the power conversion system, establishing a bias voltage for a system controller, wherein the bias voltage is generated by an independent power converteras taught by Quigley in order of being able to provide required power for proper operation of the controller. Regarding claim 10, Ferencz fails to disclose wherein: the independent power converter is an ac/dc converter. Quigley [e.g. Fig. 2] teaches wherein: the independent power converter is an ac/dc converter [e.g. paragraph 049 recites “The voltage on the tertiary winding is rectified by bridge rectifier 250 to provide bias to the start-up controller 106 at its VDD port”]. It would have been obvious to one having ordinary skill in the before the effective filing date to modify Ferencz by wherein: the independent power converter is an ac/dc converter as taught by Quigley in order of being able to provide required power for proper operation of the controller. Regarding claim 18, Ferencz fails to disclose further comprising: an ac/dc converter configured to establish a bias voltage for the system controller. Quigley [e.g. Fig. 2] teaches further comprising: an ac/dc converter [e.g. 250] configured to establish a bias voltage [e.g. VDD] for the system controller [e.g. 106; paragraph 049 recites “The voltage on the tertiary winding is rectified by bridge rectifier 250 to provide bias to the start-up controller 106 at its VDD port”]. It would have been obvious to one having ordinary skill in the before the effective filing date to modify Ferencz by further comprising: an ac/dc converter configured to establish a bias voltage for the system controller as taught by Quigley in order of being able to provide required power for proper operation of the controller. Examiner's Note Examiner has cited particular columns and line numbers in the references applied to the claims above for the convenience of the applicant. Although the specified citations are representative of the teachings of the art and are applied to specific limitations within the individual claim, other passages and figures may apply as well. It is respectfully requested from the applicant in preparing responses, to fully consider the references in their entirety as potentially teaching all or part of the claimed invention, as well as the context of the passage as taught by the prior art or disclosed by the Examiner. In the case of amending the claimed invention, Applicant is respectfully requested to indicate the portion(s) of the specification which dictate(s) the structure relied on for proper interpretation and also to verify and ascertain the metes and bounds of the claimed invention. Allowable Subject Matter Claims 4 – 8, 11, 16 – 17 and 19 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. The following is a statement of reasons for the indication of allowable subject matter: The primary reason for the indication of the allowability of claim 4 is the inclusion therein, in combination as currently claimed as a whole, of the limitation of “further comprising: configuring a second controller to generate a first forward control signal applied to the first primary switch; and configuring the second controller to generate a second forward control signal applied to the second primary switch, wherein: a leading edge of the first forward control signal is aligned with a leading edge of the second forward control signal; and a falling edge of the first forward control signal is aligned with a falling edge of the second forward control signal”. The primary reason for the indication of the allowability of claim 7 is the inclusion therein, in combination as currently claimed as a whole, of the limitation of “further comprising: during a startup process of the power conversion system, enabling both the first power converter and the second power converter to establish a bias voltage for a system controller; configuring the system controller to detect whether both the first ac power source and the second ac power source available; and after detecting that both the first ac power source and the second ac power source available, configuring the system controller to disable the second power converter”. The primary reason for the indication of the allowability of claim 16 is the inclusion therein, in combination as currently claimed as a whole, of the limitation of “wherein: a leading edge of the first forward control signal is aligned with a leading edge of the second forward control signal; and a falling edge of the first forward control signal is aligned with a falling edge of the second forward control signal”. The primary reason for the indication of the allowability of claim 19 is the inclusion therein, in combination as currently claimed as a whole, of the limitation of “wherein: after the bias voltage has been established, the system controller is configured to disable the second power converter upon detecting the two available ac power sources, and configure the first primary switch and the second primary switch to operate in the sync manner so that the voltage across the second hold-up capacitor is maintained by the reflected voltage”. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to Alex Torres-Rivera whose telephone number is (571)272-5261. The examiner can normally be reached M-F 9:00-5:30 ET. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, MONICA LEWIS can be reached at (571) 272-1838. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /ALEX TORRES-RIVERA/Primary Examiner, Art Unit 2838
Read full office action

Prosecution Timeline

Sep 16, 2024
Application Filed
Jul 15, 2026
Non-Final Rejection mailed — §102, §103, §DP (current)

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APPARATUS FOR GENERATING A DIGITAL SIGNAL DEPENDENT ON A CURRENT SLOPE
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Patent 12700794
POWER SUPPLY DEVICE
2y 8m to grant Granted Aug 04, 2026
Patent 12695391
BIDIRECTIONAL ISOLATED HIGH VOLTAGE DC-DC CONVERTER
2y 0m to grant Granted Jul 28, 2026
Patent 12689282
VOLTAGE CLAMP CIRCUIT FOR A GATE DRIVER CIRCUIT
2y 11m to grant Granted Jul 21, 2026
Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
87%
Grant Probability
98%
With Interview (+11.2%)
2y 1m (~2m remaining)
Median Time to Grant
Low
PTA Risk
Based on 777 resolved cases by this examiner. Grant probability derived from career allowance rate.

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