DETAILED ACTION
Continued Examination Under 37 CFR 1.114
A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 11/20/2025 has been entered.
Claim Objections
Claims 1 and 15 are objected to because of the following informalities:
As per claims 1 and 15, the limitation “wherein a voltage level of the third power voltage in an emission period in which the light emitting element emits a light is different from a voltage level of the third power voltage in at least a portion of a non-emission period in which the light emitting element does not emit the light” should be “wherein a voltage level of the third power voltage in an emission period in which the light emitting element emits [[a]] light is different from a voltage level of the third power voltage in at least a portion of a non-emission period in which the light emitting element does not emit [[the]] light”.
Appropriate correction is required.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1-2, 10 and 14-16 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Kim (US 20190371232).
As per claim 1, Kim discloses a pixel (Fig. 6; [0099]) comprising:
a light emitting element (#200) including a first electrode (i.e., anode electrode), and a second electrode (i.e., cathode electrode) connected to a third power line (i.e., ground voltage line) which transmits a third power voltage (#322; [0102]; [0124]);
a pulse width modulator (#330) which controls an emission time duration of the light emitting element (#200) in a frame period based on a data voltage ([0070]; [0131]; [0156]; [0204]), wherein the pulse width modulator (Fig. 7, #330) is connected to a first power line (#VDD line) which transmit a first power voltage (#VDD; [0110]); and
a constant current generator (#320) which provides a driving current having a constant level to the light emitting element (#200) based on a constant current generation voltage applied thereto ([0102]; [0125]), wherein the constant current generator (#320) includes a second driving transistor (#325) including a gate electrode connected to a third node, a first electrode connected to a second power line (#VDD line) which transmits a second power voltage (Fig. 8, i.e., 0V at INITIALIZATION DURATION) different from the first power voltage (#VDD), and a second electrode connected to the first electrode of the light emitting element (#200; [0102]),
wherein (Fig. 8 discloses) a voltage level of the third power voltage (i.e., VSS = 0V) in an emission period (#Emission) in which the light emitting element emits a light is different from a voltage level of the third power voltage (i.e., VSS = 10V) in at least a portion of a non-emission period (#SENSING DURATION) in which the light emitting element does not emit the light ([0156]).
As per claims 2 and 16, Kim discloses the pixel (display device) of claim 1 (claim 15), wherein the third power voltage has a low voltage level (i.e. 0V) in the emission period ([0156]), and
(Fig. 8 discloses) the third power voltage has a third high voltage level (i.e., VSS = 10V), which is higher than the low voltage level (i.e. 0V), in at least the portion of the non-emission period (#SENSING DURATION).
As per claim 10, Kim discloses the pixel of claim 1, wherein the constant current generator (#320) further includes a second capacitor (#312) including a first electrode connected to the third node, and a second electrode connected to the second power line (#321).
As per claim 14, Kim discloses the pixel of claim 1, wherein the light emitting element (#200) is a micro-light emitting diode ([0064]).
As per claim 15, Kim discloses a display device (Fig. 12, #1200; [0197]) comprising:
a display panel (#1000) including a plurality of pixels ([0197]-[0198]);
a scan driver (#830) which sequentially provides scan signals to the plurality of pixels ([0074]-[0075]; [0200]); and
a data driver (#820) which provides a data voltage and a constant current generation voltage to each of the plurality of pixels ([0204]; [0206]),
wherein each of the plurality of pixels includes:
a light emitting element (#200) including a first electrode (i.e., anode electrode), and a second electrode (i.e., cathode electrode) connected to a third power line (i.e., ground voltage line) which transmits a third power voltage (#322; [0102]; [0124]);
a pulse width modulator (#330) which controls an emission time duration of the light emitting element (#200) in a frame period based on a data voltage ([0070]; [0131]; [0156]; [0204]), wherein the pulse width modulator (Fig. 7, #330) is connected to a first power line (#VDD line) which transmit a first power voltage (#VDD; [0110]); and
a constant current generator (#320) which provides a driving current having a constant level to the light emitting element (#200) based on the constant current generation voltage ([0102]; [0125]), wherein the constant current generator (#320) includes a second driving transistor (#325) including a gate electrode connected to a third node, a first electrode connected to a second power line (i.e., VDD line) which transmits a second power voltage (Fig. 8, i.e., 0 V at INITIALIZATION DURATION) different from the first power voltage (#VDD), and a second electrode connected to the first electrode of the light emitting element (#200; [0102]),
wherein (Fig. 8 discloses) a voltage level of the third power voltage (i.e., VSS = 0V) in an emission period (#Emission) in which the light emitting element emits a light is different from a voltage level of the third power voltage (i.e., VSS = 10V) in at least a portion of a non-emission period (#SENSING DURATION) in which the light emitting element does not emit the light ([0156]).
Allowable Subject Matter
Claims 3-9, 11-13 and 17-20 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter: The prior art of a pixel comprising a light emitting element; a pulse width modulator which controls an emission time duration of the light emitting element in a frame period based on a data voltage; and a constant current generator which provides a driving current having a constant level to the light emitting element does not teach or fairly suggest the second power voltage has a second high voltage level in the emission period, and the second power voltage has a medium voltage level which is higher than the low voltage level and lower than the second high voltage level in at least a portion of the non-emission period, wherein the pulse width modulator includes: a first driving transistor including a gate electrode connected to a first node, a first electrode connected to a fourth node, and a second electrode connected to a fifth node; a first write transistor including a gate electrode which receives a scan signal, a first electrode connected to a data line which transmits the data voltage, and a second electrode connected to the fourth node; a first compensation transistor including a gate electrode which receives the scan signal, a first electrode connected to the fifth node, and a second electrode connected to the first node; and a first capacitor including a first electrode which receives a sweep signal, and a second electrode connected to the first node, wherein the constant current generator further includes: a second write transistor including a gate electrode which receives a write gate signal, a first electrode connected to a data line which transmits the constant current generation voltage, and a second electrode connected to a second node; a second compensation transistor including a gate electrode which receives a compensation gate signal, a first electrode connected to the second electrode of the second driving transistor, and a second electrode connected to the third node; and a third capacitor including a first electrode connected to the second node, and a second electrode connected to the third node.
Response to Arguments
Applicant’s arguments with respect to claims 1 and 15 have been considered but are moot because of the new grounds of rejection as presented above.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Nelson Lam whose telephone number is (571)272-8044. The examiner can normally be reached 1pm-9pm.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Ke Xiao can be reached at 571 272-7776. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/Nelson Lam/Examiner, Art Unit 2627
/KE XIAO/Supervisory Patent Examiner, Art Unit 2627