DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1-5, 8-10, and 12-17 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by US 2011/0290536 A1 (Kaneko).
Kaneko discloses, referring primarily to figure 12, a circuit carrier for at least one electrical component ([0031], [0037]), comprising: a metal substrate layer (21, [0046]), a first electrical insulation layer (12) arranged on the metal substrate layer, a second contiguous electrical insulation layer (14) arranged on the first insulation layer, and an electrically conductive layer (15), arranged on the second contiguous electrical insulation layer, having at least one conductor track for electrically connecting the at least one electrical component, wherein at least one of the two electrical insulation layers is colored in such a way that the two electrical insulation layers have different colors ([0039], [0067]) [claim 1], wherein at least one of the two electrical insulation layers is colored in such a way that the two electrical insulation layers are recognizable as two distinct insulation layers at least in a cross section of the circuit carrier due to their different colors ([0039], [0067]) [claim 2], wherein at least one of the two insulation layers is colored in such a way that the two distinct insulation layers are recognizable with the naked eye ([0039], [0042], [0043], [0067]) [claim 3], wherein the electrical insulation layers (14, 16) are colored using varicolored particles ([0042]-[0043]) [claim 4]., wherein at least one of the two electrical insulation layers is colored in such a way that the color of the colored insulation layer is in a range visible to the human eye ([0039],[0042], [0043], [0067]) [claim 5], wherein the cross section of the circuit carrier is a micro section of the circuit carrier [claim 18].
Additionally, Kaneko discloses, a method for producing a circuit carrier for at least one electrical component ([0031], [0037]), comprising the following steps: providing a metal substrate layer (21, [0046]), applying a first electrical insulation layer (12) to the metal substrate layer, applying a second contiguous electrical insulation layer (14) to the first electrical insulation layer, and applying an electrically conductive layer (15) to the second contiguous electrical insulation layer, wherein the electrically conductive layer comprises at least one conductor track for electrically connecting the at least one electrical component, and wherein at least one of the two electrical insulation layers is colored in such a way that the two electrical insulation layers have different colors ([0039], [0067]) [claim 8], wherein the coloration takes place before the application, during the application, or after the application of the respective electrical insulation layer ([0039], [0042], [0043], [0067]) [claim 9], wherein the coloration takes place in such a way that the two insulation layers are recognizable as two distinct insulation layers at least in a cross section, in particular a micro section, of the circuit carrier due to their different colors ([0039],[0067]) [claims 10, 17], wherein the cross section of the circuit carrier is a micro section of the circuit carrier [claim 19].
Moreover, Kaneko discloses, a method for ascertaining a number of insulation layers in a circuit carrier, in particular in a circuit carrier as claimed in claim 1 (as described above), comprising the following steps: preparing a cross section, in particular a micro section, of the circuit carrier, and ascertaining the number of insulation layers in the circuit carrier on the basis of different colors of the insulation layers ([0039], [0042], [0043], [0067]) [claim 12], wherein the preparation of a micro section of the circuit carrier comprises the following steps: exposing a cross-sectional surface (figure 12), in particular a full cross section of the circuit carrier, and preparing the cross-sectional surface to ascertain the number of insulation layers [claim 13], wherein to ascertain the number of insulation layers in the circuit carrier, the circuit carrier or at least one insulation layer of the circuit carrier is colored ([0039], [0042], [0043], [0067]) [claims 14, 16], wherein the coloration takes place before or after the preparation of the cross section or micro section ([0039], [0042], [0043], [0067]) [claim 15], wherein the coloration takes place before or after the preparation of the micro section [claim 20].
Response to Arguments
Applicant's arguments filed 08/19/2026 have been fully considered but they are not persuasive. Regarding claim 1, Applicant alleges “As clearly shown, in Kaneko, the second insulation layer (identified in the Office Action as element 14) is a non-contiguous layer. Accordingly, Kaneko lacks at least the following features of applicant's claim 1: 1) a second contiguous electrical insulation layer arranged on the first insulation layer, and 2) an electrically conductive layer, arranged on the second contiguous electrical insulation layer.” The Examiner assumes Applicant’s allegation is based on there being via holes (14x) existing in the layer (14) in Kaneko. However, the mere existence of holes in the layer does not render the layer non-contiguous. As an example via an analogy, a single slice of Swiss cheese is a contiguous item even though there are holes throughout the slice. Only in the case where the layer is split into two or more structurally separate parts would render the layer non-contiguous. Therefore, Applicant’s traversal of the instant rejection is deemed unsuccessful.
Regarding claims 2-5, 8-10, and 12-20, Applicant relies on similar reasoning for allowability. However, this reasoning is also considered unpersuasive for the reasons stated above with respect to claim 1.
Allowable Subject Matter
Claims 6, 7, and 11 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter: Claims 6 and 7 state the limitation “a further, in particular fourth electrical insulation layer, which is arranged on the third insulation layer, and a further, in particular second electrically conductive layer, which is arranged on the fourth electrical insulation layer and comprises at least one further electrical conductor track for electrically connecting the at least one electrical component.” This limitation, in conjunction with the other claimed features, was neither found to be disclosed in, nor suggested by the prior art. Claim 11 states the limitation “applying a further, in particular second electrically conductive layer having a conductor track for electrically connecting the at least one electrical component to the fourth electrical insulation layer, and coloring the third and/or fourth insulation layer in such a way that the two electrical insulation layers have different colors.” This limitation, in conjunction with the other claimed features, was neither found to be disclosed in, nor suggested by the prior art.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to JEREMY C NORRIS whose telephone number is (571)272-1932. The examiner can normally be reached 7:15-15:15 M-F.
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JEREMY C. NORRIS
Examiner
Art Unit 2847
/JEREMY C NORRIS/Primary Examiner, Art Unit 2847
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