DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1-14 are rejected under 35 U.S.C. 102 (a) (1) as being anticipated by US20170305326 A1 by Kastura et al (Kastura).
Referring to claim 1 Kastura Fig 1-11 teaches a light-emitting element driving device (Fig 1 item and abstract) comprising:
an error amplifier (See Fig 1 item 4, 11 error amplifiers paragraph [0028]) configured to output a voltage ( item Vout and paragraph [0044]) corresponding to a difference between a voltage corresponding to a current flowing through a light-emitting element and a reference voltage (paragraph [0028] item 1) and to switch between an operating state and a non-operating state according to a control signal (see paragraph [0032] where transistor Q3 is controlled between ON and OFF states);
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a driver (item 100) configured to drive, based on an output voltage of the error amplifier (paragraph [0027]), a switching element (item Q3) in a voltage feeder configured to feed a voltage to the light-emitting element (paragraph [0032]); and
a suppressor configured, when the error amplifier switches from the non-operating state to the operating state, to suppress a rise in the output voltage of the error amplifier (See paragraphs [0044] [0045] where Kastura discloses the suppressor configured to suppress the raise in voltage of the error amplifiers).
Referring to claim 2 Kastura teaches the light-emitting element driving device according to claim 1, wherein the control signal is a PWM dimming signal (see paragraph [0037] where Kastura discloses the PWM light control signal is dimming signal or low level).
Referring to claim 3 Kastura teaches the light-emitting element driving device according to claim 1, wherein the suppressor is configured to switch the error amplifier from the non-operating state to the operating state with a delay from a switch of the control signal from a first level to a second level. (See Fig 1, 4 and paragraphs [0046] [0047]).
Referring to claim 4 Kastura teaches the light-emitting element driving device according to claim 3, but silent on wherein the delay is a fixed time. However, it is within the scope of ordinary skill to manage the delay time either fixed time or variable.
Referring to claim 5 Kastura teaches the light-emitting element driving device according to claim 3, wherein the suppressor keeps the delay until a voltage fed from the voltage feeder to the light-emitting element reaches a set value. (See paragraphs [0047] [0048] where Kastura teaches the delay function of the error amplifier).
Referring to claim 6 Kastura teaches the light-emitting element driving device according to claim 3, but silent on wherein the delay is a variable time. However, it is within the scope of ordinary skill to manage the delay time either fixed time or variable.
Referring to claim 7 Kastura teaches the light-emitting element driving device according to claim 3, wherein the suppressor is a logic circuit (See paragraph [0032] where Kastura discloses signal fed from a micro-computer).
Referring to claim 8 Kastura teaches the light-emitting element driving device according to claim 4, wherein the suppressor is a logic circuit. (See paragraph [0032] where Kastura discloses signal fed from a micro-computer).
Referring to claim 9 Kastura teaches the light-emitting element driving device according to claim 5, wherein the suppressor is a logic circuit. (See paragraph [0032] where Kastura discloses signal fed from a micro-computer).
Referring to claim 10 Kastura teaches the light-emitting element driving device according to claim 6, wherein the suppressor is a logic circuit. (See paragraph [0032] where Kastura discloses signal fed from a micro-computer).
Referring to claim 11 Kastura teaches a light-emitting device comprising: the light-emitting element driving device (Fig 1 item 100 paragraph [0027]) according to claim 1; and the light-emitting element. (See Fig 1, claim 10, 11).
Referring to claim 12 Kastura teaches the light-emitting device according to claim 11, further comprising: a sense resistor (Fig 1, 2 item Rs sense resistor) configured to detect a current flowing through the light-emitting element, wherein the light-emitting element and the sense resistor are connected directly in series (paragraph [0027]).
Referring to claim 13 Kastura teaches a vehicle (See Fig 8) comprising: the light-emitting device (See paragraph [0054] [0055]) according to claim 11.
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Referring to claim 14 Kastura teaches a vehicle (Fig 8)comprising: the light-emitting device (see Fig 9 x 11 paragraph [0055] according to claim 12.
Conclusion
Claims 1-14 are rejected over prior art.
The prior of art made of record and not relied upon is considered to pertinent to applicant’s disclosure.
Applicants are directed to consider additional pertinent prior art included on the notice of references cited PTOL 892 attached here with. The examiner has pointed out particular references contained in the prior art of record within the body of this action for the convenience of the Applicants. Although the specified citations are representative of the teachings in the art and are applied to the specific limitations within the individual claim other passages and figures may apply. Applicant, in preparing the response should consider fully the entire reference as potentially teaching all or part of the claimed invention as well as the context of the passage as taught by the prior art or disclosed by the examiner.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to SRINIVAS SATHIRAJU whose telephone number is (571)272-4250. The examiner can normally be reached 8:30AM-5.30 PM.
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/SRINIVAS SATHIRAJU/Examiner, Art Unit 2844 02/06/2026