Prosecution Insights
Last updated: August 15, 2026
Application No. 18/893,328

LIFETIME MIXED LEVEL NON-VOLATILE MEMORY SYSTEM

Non-Final OA §112§DP
Filed
Sep 23, 2024
Priority
Jul 19, 2011 — provisional 61/509,257 +8 more
Examiner
HIDALGO, FERNANDO N
Art Unit
2827
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Vervain LLC
OA Round
3 (Non-Final)
93%
Grant Probability
Favorable
3-4
OA Rounds
0m
Est. Remaining
95%
With Interview

Examiner Intelligence

Grants 93% — above average
93%
Career Allowance Rate
1145 granted / 1226 resolved
+25.4% vs TC avg
Minimal +1% lift
Without
With
+1.3%
Interview Lift
resolved cases with interview
Fast prosecutor
1y 8m
Avg Prosecution
21 currently pending
Career history
1237
Total Applications
across all art units

Statute-Specific Performance

§101
3.4%
-36.6% vs TC avg
§103
37.0%
-3.0% vs TC avg
§102
17.6%
-22.4% vs TC avg
§112
24.4%
-15.6% vs TC avg
Black line = Tech Center average estimate • Based on career data from 1226 resolved cases

Office Action

§112 §DP
DETAILED ACTION Examiner’s Note The examiner has cited particular passages including column and line numbers, paragraphs as designated numerically and/or figures as designated numerically in the references as applied to the claims below for the convenience of the applicant. Although the specified citations are representative of the teachings in the art and are applied to the specific limitations within the individual claims, other passages, paragraphs and figures of any and all cited prior art references may apply as well. It is respectfully requested from the applicant, in preparing an eventual response, to fully consider the context of the passages, paragraphs and figures as taught by the prior art and/or cited by the examiner while including in such consideration the cited prior art references in their entirety as potentially teaching all or part of the claimed invention. MPEP 2141.02 VI: “PRIOR ART MUST BE CONSIDERED IN ITS ENTIRETY, INCLUDING DISCLOSURES THAT TEACH AWAY FROM THE CLAIMS." MPEP 2123 (I): “PATENTS ARE RELEVANT AS PRIOR ART FOR ALL THEY CONTAIN.” Additionally, in an effort to provide a timely Office response to amendments the Applicant may file in response to this Office Action, it is respectfully requested that, on accompanying remarks/arguments papers, every effort be made to provide specific (page No., paragraph No., FIG. No., etc.) Specification/Drawings support for such amendments, particularly claim amendments. Notice of Pre-AIA or AIA Status The present application is being examined under the pre-AIA first to invent provisions. Claim Rejections - 35 USC § 112 The following is a quotation of the first paragraph of 35 U.S.C. 112(a): (a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention. The following is a quotation of the first paragraph of pre-AIA 35 U.S.C. 112: The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor of carrying out his invention. Claim(s) 1, 18 and 19 are rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, because the specification, while being enabling for: A system and/or method for storing data, comprising, in brief: MLC and SLC non-volatile memory, controller coupled to said MLC and SLC, adapted to maintain an address map, determine address similar to physical address, does not reasonably provide enablement for “perform a read operation on stored data from the MLC non-volatile memory module containing at least one non MLC non-volatile memory element.” The claim(s) first require a read operation from an MLC non-volatile memory. This is made exemplarily explicit. Yet, it is then claimed, altogether puzzling, baffling, that the MLC non-volatile contains “at least one non MLC non-volatile memory element” (emphasis added). Given that the claim limitation is directed to an MLC non-volatile memory, how could it contain a non MLC non-volatile memory element? There does not seem to be support for this puzzling structure in the specification/drawings of the present Application. Claim(s) 2-17 and 20 depend from claim 1 and as such are also rejected for at least the same reasons. Double Patenting The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969). A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b). The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13. The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/patent/patents-forms. The actual filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA /25, or PTO/AIA /26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to www.uspto.gov/patents/apply/applying-online/eterminal-disclaimer. Claim(s) 1-20 are rejected on the ground of nonstatutory double patenting as being unpatentable over claim(s) 1-18 of U.S. Patent No. 11967370; unpatentable over claim(s) 1-11 of U.S. Patent No. 8891298; unpatentable over claim(s) 1-13 of U.S. Patent No. 9196385; unpatentable over claim(s) 1-10 of U.S. Patent No. 9972240; unpatentable over claim(s) 1-12 of U.S. Patent No. 10950300; unpatentable over claim(s) 1-18 of U.S. Patent No. 12224005; unpatentable over claim(s) 1-20 of U.S. Patent No. 12119054; all in view of US 20090327591 to Moshayedi. Although the claims at issue are not identical, they are not patentably distinct from each other because the instant claims are obviated by the patented claims. A later patent claim is not patentably distinct from an earlier patent claim if the later claim is obvious over (in a non-statutory double patent rejection) the earlier claim. In re Lonqi, 759 F.2d at 896, 225 USPQ at 651 (affirming a holding of obviousness-type double patenting because the claims at issue were obvious over claims in four prior art patents); In re Bercl, 140 F.3d at 1437, 46 USPQ2d at 1233 (Fed. Cir. 1998) (affirming a holding of obviousness-type double patenting where a patent application claim to a genus is anticipated by a patent claim to a species within that genus). Ely Lilly and Co. v Bar Laboratories, Inc., United States Court of Appeals for the Federal Circuit, on petition for rehearing en banc (decided: May 30, 2001).The instant claims are obviated by the patented claims; the patent and the application claim obvious common subject matter: a system for storing data, and method thereof, comprising, in brief and saliently: an MLC non-volatile memory (also claimed as multiple-bit memory), an SLC non-volatile memory (also claimed as single-bit memory); a controller coupled to the MLC memory and the SLC memory; said controller adapted to, operable to (insert here any relevant and pertinent operational conditions) maintain an address map of the MLC and SLC memory, the address map comprising list of logical address ranges, such logical ranges map to physical MLC and SLC address ranges; said controller to determine if an MLC address range mapped to physical addresses fails a data integrity test; if such test fails, remap the entry to the next available equivalent range of physical addresses within the at least one SLC non-volatile memory, and the stored data is transferred from the at least one MLC non-volatile memory element to the at least one SLC non-volatile memory. Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. US 20070276988. Any inquiry concerning this communication or earlier communications from the examiner should be directed to FERNANDO N HIDALGO whose telephone number is (571)270-3306. The examiner can normally be reached M-F 9:00-7:30 ET. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Amir Zarabian can be reached on 5712721852. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. FERNANDO N. HIDALGO Primary Examiner Art Unit 2827 /Fernando Hidalgo/Primary Examiner, Art Unit 2827
Read full office action

Prosecution Timeline

Sep 23, 2024
Application Filed
Mar 19, 2026
Non-Final Rejection mailed — §112, §DP
Mar 27, 2026
Response Filed
Apr 08, 2026
Examiner Interview (Telephonic)
Apr 13, 2026
Final Rejection mailed — §112, §DP
Jul 13, 2026
Request for Continued Examination
Jul 17, 2026
Response after Non-Final Action
Jul 23, 2026
Non-Final Rejection mailed — §112, §DP (current)

Precedent Cases

Applications granted by this same examiner with similar technology

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

3-4
Expected OA Rounds
93%
Grant Probability
95%
With Interview (+1.3%)
1y 8m (~0m remaining)
Median Time to Grant
High
PTA Risk
Based on 1226 resolved cases by this examiner. Grant probability derived from career allowance rate.

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