DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Objections
Claim 24 is objected to because of the following informalities:
As to claim 24, the claim recites “the fabrication data”, which appears to be a typographical error. Examiner suggests changing “the fabrication data” to “a fabrication data” to maintain proper antecedent basis.
Appropriate correction is required.
Response to Arguments
Applicant's arguments filed 3/19/2026 have been fully considered but they are not persuasive.
Regarding the Applicant’s argument corresponding to the restriction requirement [Remarks: pg. 8, 3rd para. – pg. 9, 1st para], that the restriction requirement was improper.
The Office respectfully disagrees.
Since applicant has received an action on the merits for the originally presented invention, this invention has been constructively elected by original presentation for prosecution on the merits. Accordingly, claims 1-8, 10-12, & 14 are withdrawn from consideration as being directed to a non-elected invention. See 37 CFR 1.142(b) and MPEP § 821.03.
Further, withdrawn claim 1 recites “wherein the panel weight is generated based on fabrication data”, while newly amended claims 19 & 22 recite different language “the at least one characteristic of the display panel being based at least in part on fabrication data including a process variable of the display panel” [claim 19] & “the characteristic information of the display panel being based at least in part on fabrication data including a process variable of the display panel” [claim 22].
Paragraph 85-86 appears to support direct generation of panel weights, only “estimated”.
While in figure 8 [non-elected species III] shows supplying fab data and module data to generate panel weights via controller 220.
To preserve a right to petition, the reply to this action must distinctly and specifically point out supposed errors in the restriction requirement. Otherwise, the election shall be treated as a final election without traverse. Traversal must be timely. Failure to timely traverse the requirement will result in the loss of right to petition under 37 CFR 1.144. If claims are subsequently added, applicant must indicate which of the subsequently added claims are readable upon the elected invention.
Should applicant traverse on the ground that the inventions are not patentably distinct, applicant should submit evidence or identify such evidence now of record showing the inventions to be obvious variants or clearly admit on the record that this is the case. In either instance, if the examiner finds one of the inventions unpatentable over the prior art, the evidence or admission may be used in a rejection under 35 U.S.C. 103 or pre-AIA 35 U.S.C. 103(a) of the other invention.
Thus, the restriction requirement is proper.
Further, the Applicant’s arguments with respect to claim(s) 1 [Remarks: pg. 17, 2nd para. – 3rd to last para.] have been considered but are moot because claim 1 is withdrawn from consideration [see response to arguments restriction requirement above].
Applicant’s arguments with respect to claim(s) 15 & 24-25, [Remark: pg. 10, 1st para. – pg. 12, last para. & pg. 17, 2nd last para. – pg. 18, 2nd para.] have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
Regarding the rejection of claims 19 & 22 [Remarks: pg. 13, 1st para. – pg. 17, 1st para.], that Kishi fails to teach the amended claim limitations.
The Office respectfully disagrees.
In response to applicant's argument that the references fail to show certain features of the invention, it is noted that the features upon which applicant relies (i.e., “on going measurement” [Remarks: pg. 13, 1st para. – pg. 17, 1st para.) are not recited in the rejected claim(s). Although the claims are interpreted in light of the specification, limitations from the specification are not read into the claims. See In re Van Geuns, 988 F.2d 1181, 26 USPQ2d 1057 (Fed. Cir. 1993).
The instant application states in paragraph 73 [“The Fab data may include a process variable. Here, the process variable may include at least one of a deposition time and a cleaning time of each of materials forming the pixel, an aperture ratio of the pixels PX, a threshold voltage of the driving transistor, and a voltage range of a data signal set during a fabrication process. The process variable may include various pieces of additional information and, for example, may include an environmental variable (e.g., temperature, etc.).”] that fab data may include a process variable and that the process variable can be a threshold voltage of the driving transistor.
Refer to paragraph 189 of Kishi, which teaches utilizing a threshold voltage of a driving transistor based on offset value stored in the TFT offset memory 51a.
Thus, Kishi teaches amended independent claims 19 & 22.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 15-16, 18, & 24-25 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Park et al. (US 20060279490).
As to claim 15, Park discloses a display device [abstract], comprising:
a display panel [fig. 1 & para. 34] including a plurality of pixels (pixels px) [fig. 1 & para. 36]; and
a degradation compensator circuit (signal controller 600) [figs. 1 & 6 & para. 63, 65, & 90-91] configured to generate compensation data (modified image data dat) [figs. 1 & 6 & para. 66 & 88-89] that compensates for degradation of the pixels (degradation) [para. 88-89 & 109], wherein the degradation of the pixels is compensated for without sensing current from any pixels of the display panel [fig. 6 & abstract & para. 90-109 & 10],
wherein the degradation compensator circuit is configured to generate accumulated data by accumulating at least one of input data and output data (input image signals r, g and b) [fig. 6 & para. 65, 86, 88, & 92-93], and generate compensation data by reflecting, in the accumulated data, a pre-stored first panel weight corresponding to estimated degradation dispersion information about a light emitting element included in each of the pixels (current efficiency of oled ld, based on eta based on alpha) [fig. 6 & para. 77-78, 89, & 102-104] and a pre-stored second panel weight corresponding to estimated degradation dispersion information about a driving transistor included in each of the pixels (threshold voltage based on gamma) [fig. 6 & para. 80, 86-88, & 102-104].
As to claim 16, Park discloses the display device according to claim 15, wherein the compensation data includes a first stress compensation weight in which the first panel weight is reflected [fig. 6 & para. 77-78, 89, & 102-104], and a second stress compensation weight in which the second panel weight is reflected [fig. 6 & para. 80, 86-88, & 102-104].
As to claim 18, Park discloses the display device according to claim 15, wherein the degradation compensator circuit further comprises a memory (lookup table 630 & register 601) [fig. 6 & para. 97 & 101-104] in which the accumulated data, the first panel weight, and the second panel weight are stored.
As to claim 24, Park discloses the display device of claim 15, wherein the fabrication data includes at least one of a deposition time and a cleaning time of each of materials forming the pixels, an aperture ratio of the pixels, a threshold voltage of a driving transistor included in each of the pixels (threshold voltage of driving transistor qd) [fig. 6 & para. 80, 86-88, & 102-104], or a voltage range of a data signal set during a fabrication process.
As to claim 25, Park discloses the display device of claim 15, wherein the plurality of pixels are all of the pixels in the display device, and the compensation for the degradation of the pixels is made without sensing current from any of the plurality of pixels [fig. 6 & abstract & para. 90-109 & 10],
Claim(s) 19-23 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Kishi et al. (US 20160111044).
As to claim 19, Kishi discloses a method of driving a display device [abstract & fig. 2], comprising:
generating accumulated data by accumulating at least one of input data and output data (monitor data mo) [fig. 2 & para. 165];
generating a first stress compensation weight by reflecting a first panel weight including at least one characteristic of a display panel (display unit 10) [fig. 2 & para. 151] in the accumulated data (deterioration correction coefficient) [para. 210-211];
generating a second stress compensation weight by reflecting a second panel weight including the at least one characteristic of the display panel in the accumulated data (offset value) [para. 210 & 203-206] the at least one characteristic of the display panel being based at least in part on fabrication data including a process variable of the display panel (threshold voltage) [para. 189];
generating first data by reflecting the first stress compensation weight in the input data (multiplier unit 213 corresponding to OLED gain memory) [fig. 18 & para. 209-210]; and
generating the output data by reflecting the second stress compensation weight in the first data (adder unit 214 corresponding to TFT offset memory) [fig. 18 & para. 209-210].
As to claim 20, Kishi discloses the method according to claim 19,
wherein the first panel weight corresponds to estimated degradation dispersion information about a light emitting element included in a pixel (oled gain memory) [figs. 17-18 & para. 164-165, 203-206, 209-213], and
wherein the second panel weight corresponds to estimated degradation dispersion information about a driving transistor included in the pixel (tft offset memory) [figs. 17-18 & para. 164-165, 203-206, 209-213].
As to claim 21, Kishi discloses the method according to claim 19, further comprising:
generating a data signal (data signal da) [figs. 2 & 18 & para. 154 & 210] using the output data.
As to claim 22, Kishi discloses an electronic device [abstract & fig. 2], comprising:
a display panel (display unit 10) [fig. 2 & para. 151] including a plurality of pixels (pixel circuits 11) [figs. 2 & 7 & para. 151 & 167];
a controller (control circuit 20) [figs. 2 & 18 & para. 154, 209-214, & 165] configured to control the display panel; and
a data conversion circuit (control circuit 20) [figs. 2 & 18 & para. 209-214 & 165] configured to generate accumulated data by accumulating at least one of input data inputted to the controller and output data outputted from the controller (monitor data mo) [fig. 2 & para. 165], and generate compensation data (corrects video signal) [fig. 18 & para. 209-214 & 165] by reflecting a panel weight including characteristic information of the display panel in the accumulated data [figs. 17-18 & para. 164-165, 203-206, 209-213], the characteristic information of the display panel being based at least in part on fabrication data including a process variable of the display panel (threshold voltage) [para. 189],
wherein the controller is further configured to generate the output data by reflecting the compensation data in the input data (data signal da) [figs. 2 & 18 & para. 154 & 210].
As to claim 23, Kishi discloses the electronic device according to claim 22, wherein the panel weight includes a first panel weight corresponding to estimated degradation dispersion information about a light emitting element included in each of the pixels (oled gain memory) [figs. 17-18 & para. 164-165, 203-206, 209-213], and a second panel weight corresponding to estimated degradation dispersion information about a driving transistor included in each of the pixels (tft offset memory) [figs. 17-18 & para. 164-165, 203-206, 209-213].
Allowable Subject Matter
Claim 17 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to DAVID TUNG whose telephone number is (571)270-3385. The examiner can normally be reached Monday-Friday; 10:00AM - 6:00PM.
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/DAVID TUNG/Primary Examiner, Art Unit 2622
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