Prosecution Insights
Last updated: October 02, 2026
Application No. 18/894,269

OXIDE SEMICONDUCTOR FILM, THIN FILM TRANSISTOR, AND ELECTRONIC DEVICE

Non-Final OA §102§103
Filed
Sep 24, 2024
Priority
Mar 30, 2022 — JP 2022-057448 +1 more
Examiner
ESKRIDGE, CORY W
Art Unit
Tech Center
Assignee
Idemitsu Kosan Co.,ltd.
OA Round
1 (Non-Final)
72%
Grant Probability
Favorable
1-2
OA Rounds
7m
Est. Remaining
80%
With Interview

Examiner Intelligence

Grants 72% — above average
72%
Career Allowance Rate
466 granted / 643 resolved
+12.5% vs TC avg
Moderate +8% lift
Without
With
+7.6%
Interview Lift
resolved cases with interview
Typical timeline
2y 8m
Avg Prosecution
32 currently pending
Career history
656
Total Applications
across all art units

Statute-Specific Performance

§101
15.1%
-24.9% vs TC avg
§103
45.8%
+5.8% vs TC avg
§102
26.9%
-13.1% vs TC avg
§112
9.3%
-30.7% vs TC avg
Black line = Tech Center average estimate • Based on career data from 643 resolved cases

Office Action

§102 §103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claims 1 and 6 – 10 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Ebata et al. (US 2013/0221351). Regarding claim 1, Ebata teaches (FIG. 10 – 16): An oxide semiconductor film having crystallinity over a substrate, comprising: indium (In) ([0014]); and a first metal element (M1) selected from the group consisting of aluminum (Al), gallium (Ga), yttrium (Y), scandium (Sc), and lanthanoid elements, wherein the oxide semiconductor film comprises a plurality of crystal grains ([0014]), each of the plurality of crystal grains comprising at least one of a crystal orientation <001>, a crystal orientation <101>, and a crystal orientation <111> obtained by an electron backscatter diffraction (EBSD) method ([0061]), and wherein in occupancy rates of crystal orientations calculated based on measurement points having crystal orientations with a crystal orientation difference greater than or equal to 0 degrees and less than or equal to 15 degrees with respect to a normal direction of a surface of the substrate, an occupancy rate of the crystal orientation <111> is greater than an occupancy rate of the crystal orientation <001> and an occupancy rate of the crystal orientation <101> ([0067] – [0069], [0239]). Regarding claim 6, Ebata teaches (FIG. 15): The oxide semiconductor film according to claim 1, wherein one crystal grain forms a part of a lower surface and a part of an upper surface of the oxide semiconductor film. Regarding claim 7, Ebata teaches ([0014]): The oxide semiconductor film according to claim 1, wherein an atomic ratio of the indium and metal elements (M) other than the indium satisfies formula (1). 0.01<[M]/(In+[M])<0.5. Regarding claim 8, Ebata teaches ([0099]): The oxide semiconductor film according to claim 1, wherein the first metal element is gallium, wherein the oxide semiconductor film further comprises a second metal element selected from the group consisting of aluminum, yttrium, scandium, and lanthanoid, and wherein atomic ratios of the indium, the gallium, and the second metal element satisfy formulas (2), (3), and (4). 0.7≤[In]/([In]+[Ga]+[M2])≤0.98   ・・・(2) 0.01≤[Ga]/([In]+[Ga]+[M2])<0.2   ・・・(3) 0.01≤[M2]/[In]+[Ga]+[M2])<0.1   ・・・(4). Regarding claim 9, Ebata teaches: A thin film transistor comprising the oxide semiconductor film according to claim 1 as a channel ([0001]). Regarding claim 10, Ebata teaches: An electronic device comprising the thin film transistor according to claim 9 ([0001]). Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows: 1. Determining the scope and contents of the prior art. 2. Ascertaining the differences between the prior art and the claims at issue. 3. Resolving the level of ordinary skill in the pertinent art. 4. Considering objective evidence present in the application indicating obviousness or nonobviousness. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 2 – 5 are rejected under 35 U.S.C. 103 as being unpatentable over Ebata et al. (US 2013/0221351). Regarding claim 2, Ebata fails to expressly disclose: The oxide semiconductor film according to claim 1, wherein the occupancy rate of the crystal orientation <101> is greater than the occupancy rate of the crystal orientation <001>. However, Ebata teaches the film formation process parameters in [0047] – [0068] for improving oxide semiconductor operating characteristics due to specific crystal orientation and grain size parameters of the resulting film [0011] – [0020], which overlap with the film formation process parameters of the instant application. It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to optimize the crystal size, orientation, and occupancy rate to maximize device performance characteristics, since it has been held that where the general conditions of a claim are disclosed in the prior art, discovering the optimum or workable ranges involves only routine skill in the art. In re Aller, 105 USPQ 233. Regarding claim 3, Ebata fails to expressly disclose: The oxide semiconductor film according to claim 1, wherein the occupancy rate of the crystal orientation <101> is greater than or equal to 4.5 times the occupancy rate of the crystal orientation <001>. However, Ebata teaches the film formation process parameters in [0047] – [0068] for improving oxide semiconductor operating characteristics due to specific crystal orientation and grain size parameters of the resulting film [0011] – [0020], which overlap with the film formation process parameters of the instant application. It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to optimize the crystal size, orientation, and occupancy rate to maximize device performance characteristics, since it has been held that where the general conditions of a claim are disclosed in the prior art, discovering the optimum or workable ranges involves only routine skill in the art. In re Aller, 105 USPQ 233. Regarding claim 4, Ebata fails to expressly disclose: The oxide semiconductor film according to claim 1, wherein the occupancy rate of the crystal orientation <111> is greater than or equal to 4.5 times the occupancy rate of the crystal orientation <001>. However, Ebata teaches the film formation process parameters in [0047] – [0068] for improving oxide semiconductor operating characteristics due to specific crystal orientation and grain size parameters of the resulting film [0011] – [0020], which overlap with the film formation process parameters of the instant application. It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to optimize the crystal size, orientation, and occupancy rate to maximize device performance characteristics, since it has been held that where the general conditions of a claim are disclosed in the prior art, discovering the optimum or workable ranges involves only routine skill in the art. In re Aller, 105 USPQ 233. Regarding claim 5, Ebata fails to expressly disclose: The oxide semiconductor film according to claim 1, wherein an average GOS of the plurality of crystal grains is greater than or equal to 2 degrees. However, Ebata teaches the film formation process parameters in [0047] – [0068] for improving oxide semiconductor operating characteristics due to specific crystal orientation and grain size parameters of the resulting film [0011] – [0020], which overlap with the film formation process parameters of the instant application. It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to optimize the crystal size, orientation, and occupancy rate to maximize device performance characteristics, since it has been held that where the general conditions of a claim are disclosed in the prior art, discovering the optimum or workable ranges involves only routine skill in the art. In re Aller, 105 USPQ 233. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to CORY W ESKRIDGE whose telephone number is (571)272-0543. The examiner can normally be reached M - F 9 - 5. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Julio Madonado can be reached at 571-272-1864. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /CORY W ESKRIDGE/Primary Examiner, Art Unit 2898
Read full office action

Prosecution Timeline

Sep 24, 2024
Application Filed
Sep 16, 2026
Non-Final Rejection mailed — §102, §103 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
72%
Grant Probability
80%
With Interview (+7.6%)
2y 8m (~7m remaining)
Median Time to Grant
Low
PTA Risk
Based on 643 resolved cases by this examiner. Grant probability derived from career allowance rate.

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