DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Specification
The disclosure is objected to because of the following informalities:
On page 2 line 29, “414” should be “214”.
On page 4, line 3, “fourth terminal forming portions” should be “fifth terminal forming portions”, for consistency.
On page 13, lines 1 and 3, “step 314” should be “step 316”.
Appropriate correction is required.
Claim Objections
Claims 5 and 9 objected to because of the following informalities:
On page 1, line 18, Claim 2 recites “wherein the sub structure” comprises which should be “wherein the sub-structure comprises” (hyphenated, for antecedent consistency).
On page 2, line 6 of the claims, Claim 5 recites “the plurality of subs structures” which should be “the plurality of sub-structures”.
On page 2, line 28 of the claims, Claim 9 recites “the plurality of subs structures” which should be “the plurality of sub-structures”.
Appropriate correction is required.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-20 are rejected under 35 U.S.C. 103 as being unpatentable over Lin; Barry (US 2022/0181239; hereinafter Lin) in view of Leung; Chi Ho et al. (US 2016/0035651; hereinafter Leung) in view of.
Regarding claim 1, Lin discloses a method of manufacturing a semiconductor die package, the method comprising:
providing a leadframe (205; ¶ [0028-29]) having a sub-structure and at least one tie bar (the plurality of vertically extending plating bars 203 which extend the height of a row of sub-structures between each horizontally extending plating bar 203; Figs 2A, 2C; ¶ [0028]; that is with reference to Fig 2A, the plurality of vertical features labeled 203 between the plurality of horizontal portions labeled 203 ), the sub-structure comprising a terminal-forming portion (204; Fig 2A; ¶ [0028-29]) in electrical communication with the at least one tie bar (with the tie bar through the features 215,217,219; Fig 2A; ¶ [0032]);
depositing a die (step 102; Fig 1A; ¶ [0027]) on the leadframe;
encapsulating (step 106; Fig 1A; ¶ [0027]) the sub-structure and the die in an encapsulation layer;
performing a first cut (step 152; Figs 1B,2A; ¶ [0031]) through the terminal-forming portion and the encapsulation layer to form a side terminal (220; Fig 2A; ¶ [0031]) while leaving all tie bars substantially intact (the plurality of vertical bars 203 are between the first cuts, being between the horizontal bars 203);
electroplating the side terminal (step 154; Figs 1B,2B; ¶ [0032]); and
performing a second cut (step 158; Figs 1B,2D-2E {third set of cuts}; ¶ [0034]) through the tie bar and the encapsulation layer to singulate a semiconductor die package from the leadframe.
Lin does not specifically disclose the depositing the die on the lead frame comprises bonding the die to the sub-structure; however, this would have been obvious to a person having ordinary skill in the art.
In the same field of endeavor, Leung discloses a related method, comprising bonding a die (die 40, step 30; Fig 3; ¶ [0036]) to a sub-structure (¶ [0033]). It would have been obvious to have bonded the die of Lin to the sub-structure of Lin in similar fashion in order to secure the die to the sub-structure. One would have had a reasonable expectation of success because of the similar structures and methods of Leung and Lin and because such bonding is well known in the art.
Note: all cited figures and paragraphs below refer to Lin, unless noted.
Regarding claim 2, Lin discloses the method according to claim 1, wherein the sub-structure comprises a plurality of terminal-forming portions (as applied to claim 1), and wherein the step of performing the first cut comprises cutting through the plurality of terminal-forming portions and the encapsulation layer to form a plurality of side terminals, while leaving the tie bar substantially intact (as applied to claim 1).
Regarding claim 3, Lin discloses the method according to claim 1, wherein the first cut is performed using laser cutting (¶ [0031]).
Regarding claim 4, Lin discloses the method according to claim 1, wherein performing the second cut comprises entirely removing the tie bar (as applied to claim 1; none of 203 remains in Fig 2E).
Regarding claim 5, Lin discloses the method according to claim 1, wherein the leadframe defines a plurality of the sub-structures electrically connected via the tie bar (a vertical plating bar 203 {tie bar} on a lateral side of each sub-structure, as applied to claim 1, electrically connects a plurality of sub-structures laterally, each sub-structure further being electrically connected to an adjacent sub-structure via their respective terminal-forming portions (204 connects adjacent sub-structures longitudinally across the horizontal plating bar 203);
wherein the step of bonding a die to the sub-structure comprises bonding a die to each of the plurality of sub-structures (as applied to claim 1; an array of packages comprising a die; ¶ [0029]);
wherein the step of encapsulating the sub-structure and the die within the encapsulation layer comprises encapsulating each of the plurality of sub-structures and their associated dies within the encapsulation layer (as applied to claim 1; ¶ [0029]); and
wherein the step of performing the first cut comprises performing a first series of cuts through the terminal-forming portions and the encapsulation layer to form side terminals in each sub-structure (as applied to claim 1, a first series of parallel cuts; ¶ [0031]), while leaving the tie bar substantially intact (as applied to claim 1, the plurality of tie bars 203 are between the first cuts, being between the horizontal plating bars 203).
Regarding claim 6, Lin discloses the method according to claim 1, further comprising the step of bonding a wire between an upper surface of the die and the terminal-forming portion (step 104; Figs 1A,4A; ¶ [0027]).
Regarding claim 7, Lin discloses the method according to claim 2, wherein the first cut is performed using laser cutting (¶ [0031]).
Regarding claim 8, Lin discloses the method according to claim 2, wherein performing the second cut comprises entirely removing the tie bar (as applied to claim 1; none of 203 remains in Fig 2E).
Regarding claim 9, Lin discloses the method according to claim 2, wherein the leadframe defines a plurality of the sub-structures electrically connected via the tie bar (a vertical plating bar 203 {tie bar} on a lateral side of each sub-structure, as applied to claim 1, electrically connects a plurality of sub-structures laterally, each sub-structure further being electrically connected to an adjacent sub-structure via their respective terminal-forming portions (204 connects adjacent sub-structures longitudinally across the horizontal plating bar 203);
wherein the step of bonding a die to the sub-structure comprises bonding a die to each of the plurality of sub-structures (as applied to claim 1; an array of packages comprising a die; ¶ [0029]);
wherein the step of encapsulating the sub-structure and the die in the encapsulation layer comprises encapsulating each of the plurality of sub-structures and their associated dies in the encapsulation layer (as applied to claim 1; ¶ [0029]); and
wherein the step of performing the first cut comprises performing a first series of cuts through the terminal-forming portions and the encapsulation layer to form side terminals in each sub-structure (as applied to claim 1, a first series of parallel cuts; ¶ [0031]), while leaving the tie bar substantially intact (as applied to claim 1, the plurality of tie bars 203 are between the first cuts, being between the horizontal plating bars 203).
Regarding claim 10, Lin discloses the method according to claim 5, wherein the plurality of sub-structures are arranged in a column, wherein the leadframe comprises a plurality of the columns, and adjacent columns are interposed by tie bars electrically connected to each sub-structure in the adjacent columns (as applied to claim 1); and
wherein the step of performing a second cut comprises performing a second series of cuts through the tie bars and the encapsulation layer to singulate a plurality of semiconductor die packages from the leadframe (¶ [0034]).
Regarding claim 11, Lin discloses the method according to claim 5, wherein the first series of cuts extend in a generally lateral direction (as applied to claim 5, adjacent to sidewalls of leads 204; Fig 2A; ¶ [0031]).
Regarding claim 12, Lin discloses the method according to claim 10, wherein the second series of cuts extend in a generally longitudinal direction (as applied to claim 10; Fig 2A; ¶ [0034]).
Regarding claim 13, Lin discloses the method according to claim 10, wherein the first series of cuts extend in a generally lateral direction (as applied to claim 10, adjacent to sidewalls of leads 204; Fig 2A; ¶ [0031]).
Regarding claim 14, Lin discloses the method according to claim 11, wherein the second series of cuts extend in a generally longitudinal direction (as applied to claim 5; Fig 2A; ¶ [0034]).
Regarding claim 15, Lin discloses manufacturing intermediate for a semiconductor die package, the manufacturing intermediate comprising:
a leadframe (205; Fig 2A; ¶ [0028-29]) defining a plurality of sub-structures arranged in a grid extending in a lateral direction and a longitudinal direction the leadframe comprising a plurality of longitudinally extending tie bars positioned between laterally adjacent pairs of sub-structures (the plurality of vertically extending plating bars 203 {tie bars} which extend the height of a row of sub-structures between each horizontally extending plating bar 203; Figs 2A, 2C; ¶ [0028]; that is with reference to Fig 2A, the plurality of vertical features labeled 203 between the plurality of horizontal portions labeled 203 );
a plurality of dies (¶ [0027]) deposited on the leadframe;
an encapsulation layer (step 106; Fig 1A; ¶ [0027]) encapsulating the leadframe and the dies; and
a plurality of laterally extending channels (formed by the Z1 and Z2 blades shown in Fig 3A,3B {¶ [0035]} during steps 152 and 156 {Fig 1B} and extending along the horizontal plating bars 203 in Fig 2A, 2C; ¶ [0031, 0033]) penetrating the encapsulation layer and the leadframe, the channels positioned between each pair of longitudinally adjacent sub-structures (between tie bars 203) and comprising side terminals (204; Fig 2A; ¶ [0031]) in electrical communication with the tie bars (through the feature 215,217,219; ¶ [0032]);
wherein the tie bars extend longitudinally between laterally adjacent pairs of channels (as described above).
Lin does not specifically disclose the plurality of dies deposited on the lead frame comprises each die bonded to a separate one of the sub-structures; however, this would have been obvious to a person having ordinary skill in the art.
In the same field of endeavor, Leung discloses a related method, comprising attaching a plurality of die on a die attach region of a sub-structure (¶ [0033]) of a leadframe, and each die (die 40, step 30; Fig 3; ¶ [0036]) bonded to a separate one of the sub-structures. It would have been obvious to have bonded each die of Lin to each sub-structure of Lin in similar fashion in order to secure the dies to the sub-structures. One would have had a reasonable expectation of success because of the similar structures and methods of Leung and Lin and because such bonding is well known in the art.
Note: all cited figures and paragraphs below refer to Lin, unless noted.
Regarding claim 16, Lin discloses the manufacturing intermediate according to claim 15, wherein the channels are aligned in laterally extending rows (as applied to claim 15; along horizontal plating bars 203; Figs 2A,2C), each row comprising a series of channels (as applied to claim 15, the series comprising a channel produced by step 152 {Fig 3A} and a channel produced by step 156 {Fig 3B}; ¶ [0035-36]).
Regarding claim 17, Lin discloses the manufacturing intermediate according to claim 15, wherein the tie bars extend generally longitudinally across the entire longitudinal dimension of the grid of sub-structures (each tie bar 203 extends alongside each sub-structure of the grid, extending across the entire longitudinal dimension of the grid, except where interrupted by the horizontal plating bars 203).
Regarding claim 18, Lin discloses the manufacturing intermediate according to claim 16, wherein the tie bars extend generally longitudinally across the entire longitudinal dimension of the grid of sub-structures (each tie bar 203 extends alongside each sub-structure of the grid, extending across the entire longitudinal dimension of the grid, except where interrupted by the horizontal plating bars 203).
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure:
Li; Martin Ka Shing et al. (US 2013/0302945; the prior art discloses a method of singulating integrated circuit packages comprising a series of parallel cuts defining rows of an array of integrated circuit packages, wherein the cuts terminate before the beginning and end of the rows);
Truhitte; Darrell D. et al. (US 2017/0133302; the prior art discloses a leadless semiconductor package and method of making);
Chau; On Lok et al. (US 2021/0287972; the prior art discloses a leadless semiconductor package and method of manufacture);
Any inquiry concerning this communication or earlier communications from the examiner should be directed to BRAD KNUDSON whose telephone number is (703)756-4582. The examiner can normally be reached Telework 9:30 -18:30 ET; M-F.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Eliseo Ramos Feliciano can be reached at 571-272-7925. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/B.A.K./Examiner, Art Unit 2817
/ELISEO RAMOS FELICIANO/Supervisory Patent Examiner, Art Unit 2817
Prosecution Insights