DETAILED ACTION
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
This action is in response to communications filed on 9/26/2024.
Claim 1 has been examined and is rejected.
Priority
This application claims foreign priority to application FI20236064 filed 9/27/2023.
Claim Rejections – 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claim 1 is rejected under 35 U.S.C. 103 as being unpatentable over Fong et al. (US 2013/0039203 A1) in view of Palenius et al. (US 2020/0084733 A1).
With regard to Claim 1, Fong teaches:
An apparatus, comprising: at least one processor; and at least one memory storing instructions that, when executed by the at least one processor, cause the apparatus at least to:
receive or transmit at least one reference signal, wherein the at least one reference signal is transmitted according to a reference signal configuration; (receiving an indication of a resource element (RE) configuration allocated for transmission of channel state information reference signals (CSI-RSs) [Fong: 0047]);
and wherein the reference signal configuration indicates a power-maintaining for at least one inner resource block of a plurality of resource blocks assigned in the frequency-domain to the at least one reference signal; (a first resource block (RB) group used to serve cell center UEs may have the power boosting level set to 0 dB (i.e. a normal power level is maintained) [Fong: 0109]);
and a power-boosting for at least two edge resource blocks of the plurality of resource blocks; (second and third resource block (RB) groups (e.g., groups 302 and 306) which are used to serve cell edge UEs may be configured with power boosting levels greater than 0 dB [Fong: 0109]).
However, Fong does not teach (where underlining indicates the portion of each limitation not taught):
wherein the reference signal configuration indicates a power-muting for at least one inner resource block of a plurality of resource blocks assigned in the frequency-domain to the at least one reference signal.
In a similar field of endeavor involving non-uniform distribution of transmit power for resource blocks, Palenius discloses:
wherein the signal configuration indicates a power-muting for at least one inner resource block of a plurality of resource blocks assigned in the frequency-domain to the at least one signal; (central PRBs are deboosted (i.e. muted) as specified for frequency bandwidths [Palenius: 0129; 0108-10]).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Fong in view of Palenius in order to indicate a power-muting for at least one inner resource block in the system of Fong.
One of ordinary skill in the art would have been motivated to combine Fong with Palenius as doing so would redistribute power across the frequency domain from one RB to another which may improve CSI-RS detection while adhering to transmitter power constraints by not increasing total transmit power.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure:
Li et al. (US 2015/0003343 A1) which teaches a base station implements a RE guard pattern for the low power channel by muting or reducing the power of boundary high power resource elements that are adjacent to the low power RB [0076].
Bala et al. (US 2019/0150132 A1) which teaches using different sets of power settings for demodulation of all REs located at the band-edge and inner RBs, wherein power boosting is applied for the reference signals on reference resource elements (REs) located on the band-edge [0124; 0070].
Kuchi et al. (US 2023/0292254 A1) which teaches allowing power boosting in inner PRB allocations that may be based on the frame structure and indicated by the BS to the UE [0037].
Popp et al. (US 2023/0199744 A1) which teaches resource block allocation regions that facilitate transmission power boost for different spectral shaping filters at different channel bandwidths, with focus on three distinct regions of resource block allocation: inner, outer region, and edge [0017; 0025].
In the case of amendments, Applicant is respectfully requested to indicate the portion(s) of the specification which dictate(s) the structure relied on for proper interpretation and support, for ascertaining the metes and bounds of the claimed invention.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to AUSTIN J MOREAU whose telephone number is (571) 272-5179. The examiner can normally be reached Monday-Friday 9:00 - 6:00 ET.
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/AUSTIN J MOREAU/Primary Examiner, Art Unit 2446