DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Continued Examination Under 37 CFR 1.114
A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 06/12/2026 has been entered.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claim 8-14 rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as failing to set forth the subject matter which the inventor or a joint inventor, or for applications subject to pre-AIA 35 U.S.C. 112, the applicant regards as the invention.
Claim 8 recites the limitation “responsive to the first virtual address being mapped to a
first physical address of a storage location in a remote processing node, conveying a remote presence check request to the remote processing node,”.
This is contingent limitation. The broadest reasonable interpretation of a method (or process) claim having contingent limitations requires only those steps that must be performed and does not include steps that are not required to be performed because the condition(s) precedent are not met. See MPEP 2111.04(II).
Claims 9-14 inherit the rejection of claim 8.
Correction is required.
Allowable Subject Matter
Claim 3-7, 10-14, 17-20 objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Claim 10-14 also need to overcome 112 (b) rejections.
REASONS FOR ALLOWANCE
For claim 3, the prior art does not teach the limitations when view in combination with limitations from the base claims from which claim 3 depends.
For claim 4, the prior art does not teach the limitations when view in combination with limitations from the base claims from which claim 4 depends. Additionally, claim 4 is allowable based on dependency from claim 3.
For claim 5, the prior art does not teach the limitations when view in combination with limitations from the base claims from which claim 5 depends.
For claim 6, the prior art does not teach the limitations when view in combination with limitations from the base claims from which claim 6 depends.
For claim 7, the prior art does not teach the limitations when view in combination with limitations from the base claims from which claim 7 depends.
For claim 10, the prior art does not teach the limitations when view in combination with limitations from the base claims from which claim 10 depends.
For claim 11, the prior art does not teach the limitations when view in combination with limitations from the base claims from which claim 11 depends. Additionally, claim 11 is allowable based on dependency from claim 10.
For claim 12, the prior art does not teach the limitations when view in combination with limitations from the base claims from which claim 12 depends.
For claim 13, the prior art does not teach the limitations when view in combination with limitations from the base claims from which claim 13 depends. Additionally, claim 13 is allowable based on dependency from claim 12.
For claim 14, the prior art does not teach the limitations when view in combination with limitations from the base claims from which claim 14 depends.
For claim 17, the prior art does not teach the limitations when view in combination with limitations from the base claims from which claim 17 depends.
For claim 18, the prior art does not teach the limitations when view in combination with limitations from the base claims from which claim 18 depends.
For claim 19, the prior art does not teach the limitations when view in combination with limitations from the base claims from which claim 19 depends.
For claim 20, the prior art does not teach the limitations when view in combination with limitations from the base claims from which claim 20 depends. Additionally, claim 20 is allowable based on dependency from claim 19.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1-2, 8-9, 15-16 is/are rejected under 35 U.S.C. 103 as being unpatentable over Lombard (US 20240311316), in view of Arimilli (US 20030009634).
Regarding Claim 1, Lombard teaches
An apparatus comprising: a plurality of clients comprising circuitry configured to process tasks; (Lombard [0029] Some or all of the nodes 101 of the system 100 may be configured or allocated to compute a particular (distributed) job or task. Each job may involve multiple processes in which one or more of the processes may be allocated to run on a given node 101. Each process of the job may access (shared) local memory located on the node of the process and may access remote shared memory space located on a different node 101 that has also been configured or allocated to work on the job.)
a control circuit configured to: receive, from a client of the plurality of clients, a first memory access request comprising a first virtual address; (Lombard [0006] The operating system may be configured to run an application in a virtual address space in which the application may be part of a distributed job running on multiple nodes of the multi-node computing system.)
and responsive to the first virtual address being mapped to a first physical address of a storage location in a remote processing node, convey a remote presence check request to the remote processing node, (Lombard [0004] Virtual addresses may involve translating virtual addresses to physical addresses [0006] accessing a global access tuple table based on the first physical address including a second indication that the first memory access request is for memory located on a second computing node of the multi-node computing system that is remotely located from the computing node.) Paragraph 0022 shows that if the request is to an address in the global shared memory, the access request is sent to the remote node and processed as a local access request at the remote node.
Lombard does not teach convey a remote presence check request to a remote processing node, wherein the remote presence check request causes the remote processing node to provide an indication as to whether targeted data corresponding to the storage location is currently present at the remote processing node.
However, Arimilli teaches convey a remote presence check request (Arimilli [0023] a NUMA computer system includes a node interconnect to which a remote node and a home node are coupled [0071] FIG. 5, memory controllers 64, and node controller 56 all snooping the read-type request and providing appropriate snoop responses.) (i.e., getting snoop response from remote node is convey a remote presence check request)
wherein the remote presence check request causes the remote processing node to provide an indication as to whether targeted data corresponding to the storage location is currently present at the remote processing node. (Arimilli [0072] the local node controller 56 provides a "Remote address" snoop response to read-type requests for data having another node as the home node [0074] if the combined response to the read-type request is a "Remote address" combined response indicating that no local cache hierarchy 62 or RMC 70 can serve as a source for the requested data)
Lombard and Arimilli are analogous art because they are from the same field of memory control. Before the effective filing date of the invention, it would have been obvious to a person of ordinary skill in the art, having the teaching of Lombard and Arimilli to modify the Lombard’s multi-node computing system having remote node access with Arimilli’s teaching of remote presence check. The motivation for doing so would be that (Arimilli [0023]) a memory controller in the home node updates a local memory directory associated with the home system memory to indicate that the remote node does not hold a copy of the cache line.
Regarding Claim 2, Lombard and Arimilli teach
Arimilli teaches wherein the remote presence check request includes the first physical address and further requests an indication as to whether the remote processing node includes a mapping of a virtual address to the first physical address. (Arimilli [0072] the local node controller 56 provides a "Remote address" snoop response to read-type requests for data having another node as the home node [0074] if the combined response to the read-type request is a "Remote address" combined response indicating that no local cache hierarchy 62 or RMC 70 can serve as a source for the requested data. [0046] to support data sharing between nodes 52, memory controllers 64 employ a local memory directory (LMD) 72 and a remote memory cache (RMC) 70 having an associated remote memory directory (RMD) 74 [0049] In embodiments in which RMC 70 is distributed among multiple system memories 66, the cache lines, which are accessible to at least any CPU 60 in the same node 52, are preferably mapped to particular RMCs 70 by hashing the physical or logical addresses associated with the cache lines.)
(i.e., remote address snoop/presence check of remote memory cache, and the cache lines are mapped by hashing physical or logical addresses associated with the cache lines)
Arimilli does not teach but Lombard teaches mapping of a virtual address to the first physical address. (Lombard [0006] The operating system may be configured to run an application in a virtual address space in which the application may be part of a distributed job running on multiple nodes of the multi-node computing system. The application may include a process that generates a first memory access request comprising a first virtual address. The access library may include a data structure on the computing node and the access library may be configured to be responsive to the first memory access request by converting the first virtual address into a first physical address)
Lombard and Arimilli are analogous art because they are from the same field of memory control. Before the effective filing date of the invention, it would have been obvious to a person of ordinary skill in the art, having the teaching of Lombard and Arimilli to modify the Lombard’s multi-node computing system having remote node access with Arimilli’s teaching of remote presence check. The motivation for doing so would be that (Arimilli [0023]) a memory controller in the home node updates a local memory directory associated with the home system memory to indicate that the remote node does not hold a copy of the cache line.
Regarding Claim 8, Lombard teaches
A method comprising: processing tasks by circuitry of a plurality of clients of a plurality of processing nodes; (Lombard [0029] Some or all of the nodes 101 of the system 100 may be configured or allocated to compute a particular (distributed) job or task. Each job may involve multiple processes in which one or more of the processes may be allocated to run on a given node 101. Each process of the job may access (shared) local memory located on the node of the process and may access remote shared memory space located on a different node 101 that has also been configured or allocated to work on the job.)
receiving, by circuitry of a first processing node of the plurality of processing nodes, a first memory access request comprising a first virtual address; (Lombard [0006] The operating system may be configured to run an application in a virtual address space in which the application may be part of a distributed job running on multiple nodes of the multi-node computing system.)
and responsive to the first virtual address being mapped to a first physical address of a storage location in a remote processing node, conveying a remote presence check request to the remote processing node, (Lombard [0004] Virtual addresses may involve translating virtual addresses to physical addresses [0006] accessing a global access tuple table based on the first physical address including a second indication that the first memory access request is for memory located on a second computing node of the multi-node computing system that is remotely located from the computing node.) Paragraph 0022 shows that if the request is to an address in the global shared memory, the access request is sent to the remote node and processed as a local access request at the remote node.
Lombard does not teach conveying a remote presence check request to a remote processing node, wherein the remote presence check request causes the remote processing node to provide an indication as to whether targeted data corresponding to the storage location is currently present at the remote processing node.
However, Arimilli teaches conveying a remote presence check request (Arimilli [0023] a NUMA computer system includes a node interconnect to which a remote node and a home node are coupled [0071] FIG. 5, memory controllers 64, and node controller 56 all snooping the read-type request and providing appropriate snoop responses.) (i.e., getting snoop response from remote node is convey a remote presence check request)
wherein the remote presence check request causes the remote processing node to provide an indication as to whether targeted data corresponding to the storage location is currently present at the remote processing node. (Arimilli [0072] the local node controller 56 provides a "Remote address" snoop response to read-type requests for data having another node as the home node [0074] if the combined response to the read-type request is a "Remote address" combined response indicating that no local cache hierarchy 62 or RMC 70 can serve as a source for the requested data)
Lombard and Arimilli are analogous art because they are from the same field of memory control. Before the effective filing date of the invention, it would have been obvious to a person of ordinary skill in the art, having the teaching of Lombard and Arimilli to modify the Lombard’s multi-node computing system having remote node access with Arimilli’s teaching of remote presence check. The motivation for doing so would be that (Arimilli [0023]) a memory controller in the home node updates a local memory directory associated with the home system memory to indicate that the remote node does not hold a copy of the cache line.
Regarding Claim 9, Lombard and Arimilli teach
Arimilli teaches wherein the remote presence check request includes the first physical address and further requests an indication as to whether the remote processing node includes a mapping of a virtual address to the first physical address. (Arimilli [0072] the local node controller 56 provides a "Remote address" snoop response to read-type requests for data having another node as the home node [0074] if the combined response to the read-type request is a "Remote address" combined response indicating that no local cache hierarchy 62 or RMC 70 can serve as a source for the requested data. [0046] to support data sharing between nodes 52, memory controllers 64 employ a local memory directory (LMD) 72 and a remote memory cache (RMC) 70 having an associated remote memory directory (RMD) 74 [0049] In embodiments in which RMC 70 is distributed among multiple system memories 66, the cache lines, which are accessible to at least any CPU 60 in the same node 52, are preferably mapped to particular RMCs 70 by hashing the physical or logical addresses associated with the cache lines.)
(i.e., remote address snoop/presence check of remote memory cache, and the cache lines are mapped by hashing physical or logical addresses associated with the cache lines)
Arimilli does not teach but Lombard teaches mapping of a virtual address to the first physical address. (Lombard [0006] The operating system may be configured to run an application in a virtual address space in which the application may be part of a distributed job running on multiple nodes of the multi-node computing system. The application may include a process that generates a first memory access request comprising a first virtual address. The access library may include a data structure on the computing node and the access library may be configured to be responsive to the first memory access request by converting the first virtual address into a first physical address)
Lombard and Arimilli are analogous art because they are from the same field of memory control. Before the effective filing date of the invention, it would have been obvious to a person of ordinary skill in the art, having the teaching of Lombard and Arimilli to modify the Lombard’s multi-node computing system having remote node access with Arimilli’s teaching of remote presence check. The motivation for doing so would be that (Arimilli [0023]) a memory controller in the home node updates a local memory directory associated with the home system memory to indicate that the remote node does not hold a copy of the cache line.
Regarding Claim 15, Lombard teaches
A computing system comprising: a plurality of processing nodes coupled by an inter-node communication fabric; (Lombard [0029] Some or all of the nodes 101 of the system 100 may be configured or allocated to compute a particular (distributed) job or task. Each job may involve multiple processes in which one or more of the processes may be allocated to run on a given node 101. Each process of the job may access (shared) local memory located on the node of the process and may access remote shared memory space located on a different node 101 that has also been configured or allocated to work on the job. [0050] a GPU 450, an imaging-processing unit 460, a neural processing unit 470, a Time-of-Flight (TOF) processing unit 480 that are coupled to each other through a bus 490)
wherein a first processing node of the plurality of processing nodes comprises circuitry configured to: (Lombard [0006] The operating system may be configured to run an application in a virtual address space in which the application may be part of a distributed job running on multiple nodes of the multi-node computing system.)
maintain availability information for remote storage locations associated with other processing nodes, (Lombard [0007] the local memory may include a first memory space allocated to be globally shared memory that accessible by at least the second computing node of the multi-node computing system that is remotely located from the first computing node, and the processor may be further configured to run a distributed agent process configured to communicate availability of at least part of the first memory space to at least the second computing node.)
and responsive to a memory access request generated at the first processing node targeting a remote storage location of a second processing node, control whether to convey the memory access request to the second processing node based on availability information obtained from the second processing node. (Lombard [0004] Virtual addresses may involve translating virtual addresses to physical addresses [0006] accessing a global access tuple table based on the first physical address including a second indication that the first memory access request is for memory located on a second computing node of the multi-node computing system that is remotely located from the computing node.) Paragraph 0022 shows that if the request is to an address in the global shared memory, the access request is sent to the remote node and processed as a local access request at the remote node.
Lombard does not teach wherein the availability information indicates whether targeted data corresponding to the remote storage locations is currently present at the other processing nodes;
However, Arimilli teaches wherein the availability information indicates whether targeted data corresponding to the remote storage locations is currently present at the other processing nodes; (Arimilli [0023] a NUMA computer system includes a node interconnect to which a remote node and a home node are coupled [0072] the local node controller 56 provides a "Remote address" snoop response to read-type requests for data having another node as the home node [0074] if the combined response to the read-type request is a "Remote address" combined response indicating that no local cache hierarchy 62 or RMC 70 can serve as a source for the requested data)
Lombard and Arimilli are analogous art because they are from the same field of memory control. Before the effective filing date of the invention, it would have been obvious to a person of ordinary skill in the art, having the teaching of Lombard and Arimilli to modify the Lombard’s multi-node computing system having remote node access with Arimilli’s teaching of remote presence check. The motivation for doing so would be that (Arimilli [0023]) a memory controller in the home node updates a local memory directory associated with the home system memory to indicate that the remote node does not hold a copy of the cache line.
Regarding Claim 16, Lombard and Arimilli teach
Lombard does not teach but Arimilli teaches wherein the availability information is obtained via a remote presence check request that includes a physical address and requests an indication as to whether targeted data corresponding to a remote storage location identified by the physical address is currently present at the second processing node. (Arimilli [0045] "system memory" is defined as a physical data storage device addressed utilizing unique addresses that (absent an error condition) are permanently associated with respective storage locations in the physical data storage device. The node 52 that stores a datum at a storage location in its system memory 66 associated with an address utilized to uniquely identify the datum throughout NUMA computer system 50 is defined to be the home node for that datum; conversely, others of nodes 52 are defined to be remote nodes with respect to the datum. [0072] the local node controller 56 provides a "Remote address" snoop response to read-type requests for data having another node as the home node [0074] if the combined response to the read-type request is a "Remote address" combined response indicating that no local cache hierarchy 62 or RMC 70 can serve as a source for the requested data)
Lombard and Arimilli are analogous art because they are from the same field of memory control. Before the effective filing date of the invention, it would have been obvious to a person of ordinary skill in the art, having the teaching of Lombard and Arimilli to modify the Lombard’s multi-node computing system having remote node access with Arimilli’s teaching of remote presence check. The motivation for doing so would be that (Arimilli [0023]) a memory controller in the home node updates a local memory directory associated with the home system memory to indicate that the remote node does not hold a copy of the cache line.
Response to Arguments
Applicant’s arguments, filed 06/12/2026 have been fully considered.
The amended limitations are addressed in new rejection based on the amendment. Please see office action for details.
Relevant Prior Art
The prior art made of record and not relied upon is considered pertinent to applicant’s disclosure.
Rogers (US 20110060879) teaches a request is sent to a remote node for service based on whether the requested address is located in a remote memory.
Davis (US 20230131039) teaches an operation is performed for access the data from the second one of the SoC nodes using the remote memory access channel after determine that the second one of the SoC nodes has the data stored thereon and that the remote memory access channel exists between the SoC node and the second one of the SoC nodes.
Koka (US 20140013074) teaches remote TLB lookup to determine whether a cache line in the given node’s allocated subset is cached in any of the system’s node.
Conclusion
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/WEI MA/Examiner, Art Unit 2135
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