DETAILED ACTION
This Office action responds to Applicant’s invention filed on 09/27/2024.
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . In the event the determination of the status of the application as subject to AIA 35 is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for a rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
Amendment Status
The present Office action is made with all previously suggested amendments being fully considered. Accordingly, pending in this Office action are claims 1-20.
Information Disclosure Statement (IDS)
Acknowledgement is made of Applicant’s Information Disclosure Statement (IDS) form PTO-1449. The IDS has been considered.
Specification Objection
The specification has been checked to the extend necessary to determine the presence of possible minor errors. However, the Applicant’s cooperation is requested in correcting any errors of which Applicant may become aware in the specification.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claims 1-2, 5-12, and 15-20 are rejected under 35 U.S.C. 103 as being unpatentable over Tong (US 2024/0128146) in view of Haba (US 2024/0186248).
Regarding claim 1, Tong shows (see, e.g., Tong: fig. 21) most aspects of a three-dimensional (3D) stacked memory package 20 (see, e.g., Tong: fig. 21 and par. [0122]) comprising:
A base die 401/404/403
A plurality of memory dies 402’ stacked on the base die 401/404/403
A package substrate 4401 supporting the base die 401/404/403
A circuit die 4403 on the plurality of memory dies 402’ stacked on the base die 401/404/403
A set of wire-bonds 4402 coupled between the package substrate 4401 and the circuit die 4403 to power the plurality of memory dies 402’
However, Tong fails (see, e.g., Tong: fig. 21) to show that the circuit die 4403 is a power distribution network (PDN) die. Tong shows (see, e.g., Tong: fig. 21) that the circuit die 4403 is a circuit layer (see, e.g., Tong: par. [0122]).
Haba, in a similar device to Tong, also teaches (see, e.g., Haba: figs. 1A-1C and 2) that the circuit die 132 comprises a power distribution network (PDN) die (see, e.g., Haba: par. [0055] and [0064]).
Therefore, it would have been obvious at the time of the invention to one of ordinary skill in the art to use either the circuit layer of Tong or the power distribution network (PDN) die of Haba because these were recognized in the semiconductor art for their use as power distribution layers in semiconductor packages comprising stacked memory devices, as taught by Tong and by Haba, and selecting between known equivalents would be within the level of ordinary skill in the art. KSR International Co. v. Teleflex Inc., 550 U.S.--,82 USPQ2d 1385 (2007).
Regarding claim 2, Tong in view of Haba shows (see, e.g., Tong: fig. 21) that the PDN die 4403 further comprises bond pads coupled between the set of wire-bonds 4402 and the PDN die 4403 (see, e.g., Tong: par. [0122] and [0125]).
Regarding claim 5, Tong in view of Haba shows (see, e.g., Tong: fig. 21) that the base die 401/404/403 comprises hot compute logic 401 (see, e.g., Tong: par. [0122]).
Regarding claim 6, Tong in view of Haba shows (see, e.g., Tong: fig. 21) a thermally conductive (TC) die fill material 4515/4516 on the base die 401/404/403 (see, e.g., Tong: par. 0119]).
Regarding claim 7, Tong in view of Haba shows (see, e.g., Tong: fig. 21) a thermal interface material (TIM) 4601/4602 (see, e.g., Tong: par. 0118]) on the TC die fill material 4515/4516 and one of the plurality of memory dies 402’ stacked on the base die 401/404/403.
Regarding claim 8, Tong in view of Haba shows (see, e.g., Tong: fig. 21) a cooling lid 4503 on the TIM 4601/4602.
Regarding claim 9, Tong in view of Haba shows (see, e.g., Tong: fig. 21) a semiconductor brick 4501(4515/4516) on the base die 401/404/403 (enabling placement of hot compute logic 401 on a base die 401/404/403; see, e.g., Tong: par. [0116] – [0117]). Also, Tong in view of Haba shows (see, e.g., Tong: fig. 21) that the semiconductor brick 4501(4515/4516) is a HTC material (see, e.g., Tong: par. [0117]), which is silicon (see, e.g., Tong: par. [0066]).
Regarding claim 10, Tong in view of Haba shows (see, e.g., Tong: figs. 21-22) a plurality of signal through silicon vias (TSVs) 5602 (see, e.g., Tong: par. [0127]) extending between the plurality of memory dies 502 and landing on the base die 501/504/503.
Regarding claim 11, Tong shows (see, e.g., Tong: fig. 21) most aspects of a method of forming a three-dimensional (3D) stacked memory package 20 (see, e.g., Tong: fig. 21, par. [0122] and par. [0150]) comprising:
Stacking a plurality of memory dies 402’ on the base die 401/404/403 supported by a package substrate 4401
Stacking a circuit die 4403 on the plurality of memory dies 402’ stacked on the base die 401/404/403
Forming wire-bonds 4402 between the circuit die 4403 and the package substrate 4401 to power the plurality of memory dies 402’
However, Tong fails (see, e.g., Tong: fig. 21) to show that the circuit die 4403 is a power distribution network (PDN) die. Tong shows (see, e.g., Tong: fig. 21) that the circuit die 4403 is a circuit layer (see, e.g., Tong: par. [0122]).
Haba, in a similar method to Tong, also teaches (see, e.g., Haba: figs. 1A-1C and 2) that the circuit die 132 comprises a power distribution network (PDN) die (see, e.g., Haba: par. [0055] and [0064]).
Therefore, it would have been obvious at the time of the invention to one of ordinary skill in the art to use either the circuit layer of Tong or the power distribution network (PDN) die of Haba because these were recognized in the semiconductor art for their use as power distribution layers in semiconductor packages comprising stacked memory devices, as taught by Tong and by Haba, and selecting between known equivalents would be within the level of ordinary skill in the art. KSR International Co. v. Teleflex Inc., 550 U.S.--,82 USPQ2d 1385 (2007).
Regarding claim 12, Tong in view of Haba shows (see, e.g., Tong: fig. 21) that the method step of stacking the PDN die 4403 further comprises bond pads coupled between the set of wire-bonds 4402 and the PDN die 4403 (see, e.g., Tong: par. [0122] and [0125]).
Regarding claim 15, Tong in view of Haba shows (see, e.g., Tong: fig. 21) that the base die 401/404/403 comprises hot compute logic 401 (see, e.g., Tong: par. [0122]).
Regarding claim 16, Tong in view of Haba shows (see, e.g., Tong: fig. 21) a thermally conductive (TC) die fill material 4515/4516 on the base die 401/404/403 (see, e.g., Tong: par. 0119]).
Regarding claim 17, Tong in view of Haba shows (see, e.g., Tong: fig. 21) a thermal interface material (TIM) 4601/4602 (see, e.g., Tong: par. 0118]) on the TC die fill material 4515/4516 and one of the plurality of memory dies 402’ stacked on the base die 401/404/403.
Regarding claim 18, Tong in view of Haba shows (see, e.g., Tong: fig. 21) a cooling lid 4503 on the TIM 4601/4602.
Regarding claim 19, Tong in view of Haba shows (see, e.g., Tong: fig. 21) a semiconductor brick 4501(4515/4516) on the base die 401/404/403 (enabling placement of hot compute logic 401 on a base die 401/404/403; see, e.g., Tong: par. [0116] – [0117]). Also, Tong in view of Haba shows (see, e.g., Tong: fig. 21) that the semiconductor brick 4501(4515/4516) is a HTC material (see, e.g., Tong: par. [0117]), which is silicon (see, e.g., Tong: par. [0066]).
Regarding claim 20, Tong in view of Haba shows (see, e.g., Tong: figs. 21-22) a plurality of signal through silicon vias (TSVs) 5602 (see, e.g., Tong: par. [0127]) extending between the plurality of memory dies 502 and landing on the base die 501/504/503.
Claims 3 and 13 are rejected under 35 U.S.C. 103 as being unpatentable over Tong in view of Haba in further view of Or-Bach (US 2019/0139827).
Regarding claim 3, Tong in view of Haba shows (see, e.g., Tong: fig. 21, and see, e.g., Haba: figs. 1A-1C and 2) the PDN die 132 (e.g., Haba: figs. 1A-1C and 2) that comprises:
A power grid 120 (from the power delivery die 132) coupled to the bond pads 138 (e.g., Haba: par. [0064])
However, Tong in view of Haba fails (see, e.g., Tong: fig. 21, and see, e.g., Haba: figs. 1A-1C and 2) to show feedthrough through silicon vias (TSVs) coupled to the power grid 120 and extending through the PDN die 132. Or-Bach, in a similar device to Tong in view of Haba, shows (see, e.g., Or-Bach: fig. 22A) feedthrough through silicon vias (TSVs) 12612/12618 (see, e.g., Or-Bach: par. [0260]) coupled to the power grid 12610 (which is global power grid, see, e.g., Or-Bach: par. [0260]) and extending through the PDN die. Or-Bach also shows (see, e.g., Or-Bach: fig. 22A) that the feedthrough through silicon vias (TSVs) 12612/12618 are used to transfer the supply voltage from the global power grid 12610 to local power grids (see, e.g., Or-Bach: par. [0260]).
Therefore, it would have been obvious at the time of the invention to one of ordinary skill in the art to use feedthrough through silicon vias (TSVs) coupled to the power grid 120 and extending through the PDN die of Or-Bach in the device of Tong in view of Haba in order to transfer the supply voltage from the global power grid to local power grids.
Regarding claim 13, Tong in view of Haba shows (see, e.g., Tong: fig. 21, and see, e.g., Haba: figs. 1A-1C and 2) the PDN die 132 (e.g., Haba: figs. 1A-1C and 2) that comprises:
Forming a power grid 120 (from the power delivery die 132) coupled to the bond pads 138 (e.g., Haba: par. [0064])
However, Tong in view of Haba fails (see, e.g., Tong: fig. 21, and see, e.g., Haba: figs. 1A-1C and 2) to show the method step of forming feedthrough through silicon vias (TSVs) coupled to the power grid 120 and extending through the PDN die 132. Or-Bach, in a similar method to Tong in view of Haba, shows (see, e.g., Or-Bach: fig. 22A) the method step of feedthrough through silicon vias (TSVs) 12612/12618 (see, e.g., Or-Bach: par. [0260]) coupled to the power grid 12610 (which is global power grid, see, e.g., Or-Bach: par. [0260]) and extending through the PDN die. Or-Bach also shows (see, e.g., Or-Bach: fig. 22A) that the feedthrough through silicon vias (TSVs) 12612/12618 are used to transfer the supply voltage from the global power grid 12610 to local power grids (see, e.g., Or-Bach: par. [0260]).
Therefore, it would have been obvious at the time of the invention to one of ordinary skill in the art to use the method step of feedthrough through silicon vias (TSVs) coupled to the power grid 120 and extending through the PDN die of Or-Bach in the method of Tong in view of Haba in order to transfer the supply voltage from the global power grid to local power grids.
Claims 4 and 14 are rejected under 35 U.S.C. 103 as being unpatentable over Tong in view of Haba in view of Or-Bach in further view of Farooq (US 2025/0343107).
Regarding claim 4, Tong in view of Haba in view of Or-Bach shows (see, e.g., Tong: figs. 21-22, and see, e.g., Haba: figs. 1A-1C and 2, and see, e.g., Or-Bach: fig. 22A) feedthrough TSV 12612/12618 (e.g., Haba: figs. 1A-1C and 2) and power TSV 5602 extending through the plurality of memory dies 502 (see, e.g., Tong: fig. 22, and par. [0127]).
However, Tong in view of Haba in view of Or-Bach fails (see, e.g., Tong: figs. 21-22, and see, e.g., Haba: figs. 1A-1C and 2, and see, e.g., Or-Bach: fig. 22A) to show that the feedthrough TSV 12612/12618 (e.g., Haba: figs. 1A-1C and 2) and power TSV 5602 are coupled by micro-bumps. Farooq, in a similar device to Tong in view of Haba in view of Or-Bach, shows (e.g., Farooq: fig. 1) that feedthrough TSV (through the power distribution bus 114) and power TSV 106 are coupled by micro-bumps. Farooq also shows (e.g., Farooq: fig. 1) that the micro-bumps are manufactured in order to distribute the power that comes up from a packaging substrate (e.g., Farooq: par. [0041]).
Therefore, it would have been obvious at the time of the invention to one of ordinary skill in the art to use feedthrough TSV and power TSV by micro-bumps of Farooq in the device of Tong in view of Haba in view of Or-Bach in order to distribute the power that comes up from a packaging substrate.
Regarding claim 14, Tong in view of Haba in view of Or-Bach shows (see, e.g., Tong: figs. 21-22, and see, e.g., Haba: figs. 1A-1C and 2, and see, e.g., Or-Bach: fig. 22A) the method step of forming feedthrough TSV 12612/12618 (e.g., Haba: figs. 1A-1C and 2) and power TSV 5602 extending through the plurality of memory dies 502 (see, e.g., Tong: fig. 22, and par. [0127]).
However, Tong in view of Haba in view of Or-Bach fails (see, e.g., Tong: figs. 21-22, and see, e.g., Haba: figs. 1A-1C and 2, and see, e.g., Or-Bach: fig. 22A) to show that the feedthrough TSV 12612/12618 (e.g., Haba: figs. 1A-1C and 2) and power TSV 5602 are coupled by forming micro-bumps. Farooq, in a similar method to Tong in view of Haba in view of Or-Bach, shows (e.g., Farooq: fig. 1) that feedthrough TSV (through the power distribution bus 114) and power TSV 106 are coupled by forming micro-bumps. Farooq also shows (e.g., Farooq: fig. 1) that the micro-bumps are manufactured in order to distribute the power that comes up from a packaging substrate (e.g., Farooq: par. [0041]).
Therefore, it would have been obvious at the time of the invention to one of ordinary skill in the art to use feedthrough TSV and power TSV by micro-bumps of Farooq in the method of Tong in view of Haba in view of Or-Bach in order to distribute the power that comes up from a packaging substrate.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to TIBERIU DAN ONUTA whose telephone number is (571) 270-0074 and between the hours of 9:00 AM to 5:00 PM (Eastern Standard Time) Monday through Friday or by e-mail via Tiberiu.Onuta@uspto.gov. If attempts to reach the examiner by telephone or email are unsuccessful, the examiner's supervisor, Wael Fahmy, can be reached on (571) 272-1705.
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/TIBERIU DAN ONUTA/Examiner, Art Unit 2814
/WAEL M FAHMY/Supervisory Patent Examiner, Art Unit 2814
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