Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Prior Art of Record
The applicant's attention is directed to additional pertinent prior art cited in the accompanying PTO-892 Notice of References Cited, which, however, may not be currently applied as a basis for the following rejections. While these references were considered during the examination of this application and are deemed relevant to the claimed subject matter, they are not presently being applied as a basis for rejection in this Office action. The pertinence of these documents, however, may be revisited, and they may be applied in subsequent Office actions, particularly in light of any amendments or further clarification of the claimed invention.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1-12is/are rejected under 35 U.S.C. 103 as being unpatentable over Levardo et al. (US 20200365549 A1) in view of Condie et al. (US 20070090514 A1)..
PNG
media_image1.png
218
588
media_image1.png
Greyscale
PNG
media_image2.png
400
562
media_image2.png
Greyscale
CLAIM 1. Levardo teaches a semiconductor module comprising:
a circuit board (Levardo Fig. 2B) including a semiconductor element 102, the semiconductor element having an electrode on an upper surface thereof (electrode is require to provide electrical contact point for lead 110); a lead 110 that is bonded to the electrode of the semiconductor element 102 by a bonding material (e.g. solder 130 is disclosed though out as a bonding medium for leads and clips.); and a sealing material 128 that seals the semiconductor element and the lead, wherein the lead includes:
a bonding portion 110 bonded to the electrode, the bonding portion 110 having a lower surface facing the electrode, and an upper surface opposite to the lower surface, and a roughening recess114 formed on the upper surface of the bonding portion, for preventing delamination at an interface between the lead and the sealing material (Surface roughening and mechanical mold locks are established techniques for expanding bonding surface areas and enhancing adhesion strength to mitigate delamination. This principle is a well-known, application-independent concept universally utilized within semiconductor manufacturing to achieve predictable structural integrity and interfacial bonding performance.), wherein the roughening recess includes:
a main recess 114 having: a first wall surfaces and a second wall surface opposite to each other, and a barbed portion (116 – standard locking shape of a mold lock. 116 provides the routine shape by forming a undercut recess for the purpose.) formed on the first wall surface and protruding toward the second wall surface (Levardo Fig. 7), and a sub-recess having: a center, which is located, in a plan view of the semiconductor module, outside the main recess and at a position away from the first wall surface by a predetermined distance, and an inclined surface that becomes shallower from the center toward an opening end of the main recess.
Levardo is simply silent on where the inclined surface becomes shallower from the center toward an opening end of the main recess (i.e., a sub-recess having a center located in plan view outside the main recess away from the first wall surface with an inclined surface sloping shallower toward the opening end).
Condie discloses forming mold lock features on conductive substrates and metallic surfaces comprising a main central trench (101) with barbed/re-entrant sidewalls (103, 104) situated adjacent to a sloped triangular sub-recess notch (444) having an inclined surface that becomes shallower moving from its center toward the opening end of the main recess (Condie Fig. 2 – Note substrate 2 may be a conductive feature such as a leadframe.).
PNG
media_image3.png
240
572
media_image3.png
Greyscale
It would have been obvious to a person having ordinary skill in the art at the time the invention was made to modify the lead surface of Levardo to incorporate the specific mold-lock cross-sectional recess profile (main trench with barbed sidewalls and adjacent sloped triangular sub-recess) as taught by Condie.
One of ordinary skill in the art would have been motivated to combine these teachings because Condie explicitly demonstrates that a main recess with barbed sidewalls and an adjacent sloped sub-recess notch optimizes mechanical anchoring while suppressing delamination at the metal interface under thermal stress. Modifying the specific geometry or shape of these features represents nothing more than a routine design choice. Such a minor structural variation relies on predictable design alternatives to achieve the exact same expected functionality, benefits, and results already taught by Condie.
CLAIM 2. Levardo in view of Condie teaches a semiconductor module according to claim 1, wherein the main recess further has a bottom surface that is of a flat quadrangular shape, and the sub-recess has an opening end that is of a quadrangular shape, four sides of the opening end of the sub-recess being substantially parallel to four sides of the bottom surface of the main recess, respectively.
One of ordinary skill in the art would have been motivated to combine these teachings because Condie explicitly demonstrates that a main recess with barbed sidewalls and an adjacent sloped sub-recess notch optimizes mechanical anchoring while suppressing delamination at the metal interface under thermal stress. Modifying the specific geometry or shape of these features represents nothing more than a routine design choice. Such a minor structural variation relies on predictable design alternatives to achieve the exact same expected functionality, benefits, and results already taught by Condie.
CLAIM 3. Levardo in view of Condie teaches a semiconductor module according to claim 1, wherein the main recess has a bottom surface that is of a flat quadrangular shape, and the sub-recess has an opening end that is of a quadrangular shape, and has a bottom surface that is of a valley shape, a valley line of the valley shape being substantially parallel to a side of the opening end of the sub-recess and a side of the bottom surface of the main recess (Modifying the particular geometric profile, dimensions, or specific shape of these features represents nothing more than a routine design choice. Such a minor structural variation relies on predictable, art-recognized design alternatives to achieve the exact same expected functionality, benefits, and results already taught by Levardo and Condie.).
CLAIM 4. Levardo in view of Condie teaches a semiconductor module according to claim 1, wherein the main recess further has a third wall surface and a fourth wall surface opposite to each other, the first to fourth wall surfaces defining a quadrangular prism-shaped space, and the barbed portion is formed on each of first to fourth wall surfaces of the main recess (Modifying the particular geometric profile, dimensions, or specific shape of these features represents nothing more than a routine design choice. Such a minor structural variation relies on predictable, art-recognized design alternatives to achieve the exact same expected functionality, benefits, and results already taught by Levardo and Condie.).
CLAIM 5. Levardo in view of Condie teaches a semiconductor module according to claim 1, wherein the roughening recess is a first roughening recess, the semiconductor module further has a second roughening recess adjacent to the first roughening recess, the second roughening recess having a same configuration as the first roughening recess, and being aligned with the first roughening recess in an alignment direction, and a gap between the main recesses of the first and second roughening recesses is longer than a dimension of each of the main recesses in the alignment direction (Modifying the particular geometric profile, dimensions, or specific shape of these features represents nothing more than a routine design choice. Such a minor structural variation relies on predictable, art-recognized design alternatives to achieve the exact same expected functionality, benefits, and results already taught by Levardo and Condie.).
CLAIM 6. Levardo in view of Condie teaches a semiconductor module according to claim 1, wherein the roughening recess is disposed at a position corresponding to a lattice point of a two-dimensional lattice set on the upper surface of the bonding portion of the lead (Modifying the particular geometric profile, dimensions, or specific shape of these features represents nothing more than a routine design choice. Such a minor structural variation relies on predictable, art-recognized design alternatives to achieve the exact same expected functionality, benefits, and results already taught by Levardo and Condie.).
CLAIM 7. Levardo in view of Condie teaches a semiconductor module according to claim 6, wherein the roughening recess is a first roughening recess, the semiconductor module further has a second roughening recess that has a same configuration as the first roughening recess, except that the second roughening recess is free of the barbed portion, and the first roughening recess and the second roughening recess are disposed adjacent to each other at positions corresponding to lattice points of the two-dimensional lattice (Modifying the particular geometric profile, dimensions, or specific shape of these features represents nothing more than a routine design choice. Such a minor structural variation relies on predictable, art-recognized design alternatives to achieve the exact same expected functionality, benefits, and results already taught by Levardo and Condie.).
CLAIM 8. Levardo in view of Condie teaches a semiconductor module according to claim 1, wherein the lead includes a plurality of roughening recesses each having a same configuration as said roughening recess, the plurality of roughening recesses are disposed on an outermost periphery of the upper surface of the bonding portion (Modifying the particular geometric profile, dimensions, or specific shape of these features represents nothing more than a routine design choice. Such a minor structural variation relies on predictable, art-recognized design alternatives to achieve the exact same expected functionality, benefits, and results already taught by Levardo and Condie.).
CLAIM 9. Levardo in view of Condie teaches a semiconductor module according to claim 8, wherein each of the plurality of roughening recesses is a first roughening recess, the semiconductor module further has a second roughening recess that has a same configuration as the first roughening recess, except that the second roughening recess is free of the barbed portion, and the second roughening recess is disposed in a region surrounded by the first roughening recesses (Modifying the particular geometric profile, dimensions, or specific shape of these features represents nothing more than a routine design choice. Such a minor structural variation relies on predictable, art-recognized design alternatives to achieve the exact same expected functionality, benefits, and results already taught by Levardo and Condie.).
CLAIM 10. Levardo in view of Condie teaches a semiconductor device comprising: the semiconductor module according to claim 1, wherein the circuit board further includes a wiring board 104 having a first surface on which the semiconductor element is mounted, and a second surface opposite to the first surface; and a cooler that is disposed on the second surface of the wiring board (Levardo ¶98- board 104 contributes to heat removal. ¶25 of Condie teaches leads and conductive substrates “serve as heatsinks or heat spreaders. The exposed surface of the substrate or a separate heatsink layer would have been an obvious design choice to a person of ordinary skill in the art at the time the invention was made. Levardo explicitly teaches a substrate having an exposed surface. While Levardo may not explicitly label this surface as a "cooler," it is well-established that a person of ordinary skill in the art seeking to optimize thermal management would readily recognize that an exposed surface naturally dissipates heat to the ambient environment, thereby functioning as a cooler.
Furthermore, to the extent that Levardo does not explicitly disclose a distinct, separate heatsink layer on said surface, Condie teaches the exact use of a separate thermal management layer (e.g., a heatsink or heat spreader) to enhance heat dissipation in a highly similar structural arrangement. It would have been obvious to a person of ordinary skill in the art at the time the invention was made to modify the device of Levardo by providing a further heatsink layer as taught by Condie in order to improve thermal dissipation and prevent overheating. Whether this cooling feature is formed integrally with the substrate or as a separate, attached layer is a matter of elective design choice, as both configurations perform the identical function of thermal management with predictable results.)
CLAIM 11. Levardo in view of Condie teaches a vehicle comprising the semiconductor device according to claim 10 (It would have been obvious to an artisan of ordinary skill at the time of the invention to integrate the semiconductor module of claim 1 into a standard vehicle. This represents a routine and predictable implementation of a component into its intended environment to achieve its known utility. The addition of a conventional vehicle fails to impart patentable weight to the claim.).
CLAIM 12. Levardo in view of Condie teaches a vehicle comprising the semiconductor module according to claim 1 (It would have been obvious to an artisan of ordinary skill at the time of the invention to integrate the semiconductor module of claim 1 into a standard vehicle. This represents a routine and predictable implementation of a component into its intended environment to achieve its known utility. The addition of a conventional vehicle fails to impart patentable weight to the claim.).
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to JARRETT J STARK whose telephone number is (571)272-6005. The examiner can normally be reached 8-4 M-F.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Jessica Manno can be reached at 571-272-2339. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
JARRETT J. STARK
Primary Examiner
Art Unit 2822
9/22/2026
/JARRETT J STARK/Primary Examiner, Art Unit 2898
Prosecution Insights