DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
This Office Action is in response to claims filed on 10/01/2024.
Claims 1-20 are pending.
Drawings
The drawings are objected to as failing to comply with 37 CFR 1.84(p)(5) because they include the following reference character(s) not mentioned in the description: “610” in Fig. 6. Corrected drawing sheets in compliance with 37 CFR 1.121(d), or amendment to the specification to add the reference character(s) in the description in compliance with 37 CFR 1.121(b) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance.
Specification
The disclosure is objected to because of the following informalities:
[0030] “…Each of the worker processes is then assigned a subset of all processing units as the eligible processing units for executing the respective worker process as discussed above…” should read “…Each of the worker processes is then assigned 330 a subset of all processing units as the eligible processing units for executing the respective worker process as discussed above…”.
Appropriate correction is required.
Claim Objections
Claims 1-20 are objected to because of the following informalities:
In Claims 1, 9, and 17, “accept requests for the socket and apply the machine-learned model to received requests” should read “accept the client requests for the socket and apply the machine-learned model to the received client requests”.
In Claims 2-4, 10-12, and 18-20, “the eligible subset of the processing units” should read “the set of eligible processing units”.
In Claims 5 and 13, “the eligible subsets of the processing units” should read “the set of eligible processing units”.
In Claims 7 and 15, “the respective eligible subset of processing units” should read “the respective set of eligible processing units”.
In Claims 8 and 16, “wherein the plurality of worker processes are initiated” should read “wherein the plurality of worker processes is initiated”.
In Claim 13, “each and worker process” should read “and each worker process”.
Any claim not specifically mentioned above, is objected due to its dependency on an objected claim.
Appropriate correction is required.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claims 1-20 are rejected under 35 U.S.C. 102(a)(2) as being anticipated by Mukundan et al. Pub. No. US 2024/0069969 Al (hereafter Mukundan).
Regarding claim 1, Mukundan anticipates the invention as claimed, including: A system for executing machine-learning processes, comprising: a plurality of processing units each configured to execute one or more processes based on instructions; a computer-readable medium having instructions for execution on the plurality of processing units for ([0410] “…In at least one embodiment, code (e.g., executable code or source code) is stored on a set of one or more non-transitory computer-readable storage media having stored thereon executable instructions (or other memory to store executable instructions) that, when executed (i.e., as a result of being executed) by one or more processors of a computer system, cause computer system to perform operations described herein…”): initiating a machine-learning parent process that opens a socket for receiving client requests to apply a machine-learned model ([0055] “In at least one embodiment, a NUMA node performs a software workload. In at least one embodiment, one or more circuits perform an interface to select a subset of one or more processors of a NUMA node to perform a software workload. In at least one embodiment, a software workload comprises one or more processes to be performed, on one or more CPUs, to perform a task, such as a task related to machine learning. In at least one embodiment, a software workload is a machine learning workload. In at least one embodiment, a machine learning workload comprises tasks associated with machine learning, potentially including but not necessarily limited to training a neural network or other machine learning model, using a neural network or other machine learning model to perform inference, or using a neural network or other machine learning model for some other purpose. In at least one embodiment, machine learning includes deep learning ("DL") or other techniques associated with machine learning or artificial intelligence.”, [0101] “…In at least one embodiment, one or more CPUs 424 may share a socket 428…”); initiating, by the machine-learning parent process, a plurality of worker processes that accept requests for the socket and apply the machine-learned model to received requests ([0055] “In at least one embodiment, a NUMA node performs a software workload. In at least one embodiment, one or more circuits perform an interface to select a subset of one or more processors of a NUMA node to perform a software workload. In at least one embodiment, a software workload comprises one or more processes to be performed, on one or more CPUs, to perform a task, such as a task related to machine learning. In at least one embodiment, a software workload is a machine learning workload. In at least one embodiment, a machine learning workload comprises tasks associated with machine learning, potentially including but not necessarily limited to training a neural network or other machine learning model, using a neural network or other machine learning model to perform inference, or using a neural network or other machine learning model for some other purpose. In at least one embodiment, machine learning includes deep learning ("DL") or other techniques associated with machine learning or artificial intelligence.”, [0101] “…In at least one embodiment, one or more CPUs 424 may share a socket 428…”, [0093] “In at least one embodiment, a NUMA binding option is 'exclusive.' In at least one embodiment, indication of said exclusive binding option causes process 300 to select a NUMA binding in which each process of a software workload is bound to an exclusive set of CPUs within a NUMA node. In at least one embodiment, this gives an exclusive set of CPUs to each process. In at least one embodiment, CPUs are not shared between different processes.”); and for each of the plurality of worker processes, assigning a set of eligible processing units for executing the respective worker process that consists of a subset of the plurality of processing units ([0093] “In at least one embodiment, a NUMA binding option is 'exclusive.' In at least one embodiment, indication of said exclusive binding option causes process 300 to select a NUMA binding in which each process of a software workload is bound to an exclusive set of CPUs within a NUMA node. In at least one embodiment, this gives an exclusive set of CPUs to each process. In at least one embodiment, CPUs are not shared between different processes.”).
Regarding claim 2, Mukundan anticipates: The system of claim 1, wherein the eligible subset of the processing units is set in a process control block of an operating system of the system ([0319] “Exemplary registers that may be initialized by an operating system are shown in Table 2.”, Table 2 “Process and Thread Identification”, Note: Registers [i.e. Process and Thread Identification] of the operating system are interpreted as the process control block).
Regarding claim 3, Mukundan anticipates: The system of claim 1, wherein the eligible subset of the processing units consists of a single processing unit of the plurality of processing units ([0092] “…In at least one embodiment, on GPU-enabled compute nodes, a process is bound to all CPUs of an affined NUMA node (e.g., by mapping local process to GPU id) and a total number of processes is limited to total number of GPUs…”, Note: One process is limited to one GPU).
Regarding claim 4, Mukundan anticipates: The system of claim 1, wherein the eligible subset of the processing units set for each of the plurality of worker processes is mutually exclusive ([0093] “In at least one embodiment, a NUMA binding option is 'exclusive.' In at least one embodiment, indication of said exclusive binding option causes process 300 to select a NUMA binding in which each process of a software workload is bound to an exclusive set of CPUs within a NUMA node. In at least one embodiment, this gives an exclusive set of CPUs to each process. In at least one embodiment, CPUs are not shared between different processes.”).
Regarding claim 5, Mukundan anticipates: The system of claim 1, wherein setting the eligible subsets of the processing units is performed and each worker process has accepted a request for the socket ([0101] “…In at least one embodiment, one or more CPUs 424 may share a socket 428…”, [0093] “In at least one embodiment, a NUMA binding option is 'exclusive.' In at least one embodiment, indication of said exclusive binding option causes process 300 to select a NUMA binding in which each process of a software workload is bound to an exclusive set of CPUs within a NUMA node. In at least one embodiment, this gives an exclusive set of CPUs to each process. In at least one embodiment, CPUs are not shared between different processes.”).
Regarding claim 6, Mukundan anticipates: The system of claim 1, wherein a number of the plurality of worker processes is the same as a number of the plurality of processing units ([0092] “…In at least one embodiment, on GPU-enabled compute nodes, a process is bound to all CPUs of an affined NUMA node (e.g., by mapping local process to GPU id) and a total number of processes is limited to total number of GPUs…”).
Regarding claim 7, Mukundan anticipates: The system of claim 1, further comprising executing each of the plurality of worker processes with the respective eligible subset of processing units ([0093] “In at least one embodiment, a NUMA binding option is 'exclusive.' In at least one embodiment, indication of said exclusive binding option causes process 300 to select a NUMA binding in which each process of a software workload is bound to an exclusive set of CPUs within a NUMA node. In at least one embodiment, this gives an exclusive set of CPUs to each process. In at least one embodiment, CPUs are not shared between different processes.”).
Regarding claim 8, Mukundan anticipates: The system of claim 1, wherein the plurality of worker processes are initiated with a default set of eligible processing units specifying the plurality of processing units ([0067] “…In at least one embodiment, identification of CPUs to be bound to is automated. In at least one embodiment, this means that a user will not have to specifically bind CPUs as part of a script that launches a job. In at least one embodiment, said binding is performed automatically by embodiments disclosed herein.”, [0068] “In at least one embodiment, CPU cores 106 are CPU cores in a computer system, such as those described below. In at least one embodiment, processes 102 are deep learning processes. In at least one embodiment, NUMA binding 104 causes processes 102 to automatically bind to CPU cores 106…”).
Regarding claim 9, it is a process claim whose limitations are substantially the same as those of claim 1. Accordingly, it is rejected for substantially the same reasons.
Regarding claim 10, it is a process claim whose limitations are substantially the same as those of claim 2. Accordingly, it is rejected for substantially the same reasons.
Regarding claim 11, it is a process claim whose limitations are substantially the same as those of claim 3. Accordingly, it is rejected for substantially the same reasons.
Regarding claim 12, it is a process claim whose limitations are substantially the same as those of claim 4. Accordingly, it is rejected for substantially the same reasons.
Regarding claim 13, it is a process claim whose limitations are substantially the same as those of claim 5. Accordingly, it is rejected for substantially the same reasons.
Regarding claim 14, it is a process claim whose limitations are substantially the same as those of claim 6. Accordingly, it is rejected for substantially the same reasons.
Regarding claim 15, it is a process claim whose limitations are substantially the same as those of claim 7. Accordingly, it is rejected for substantially the same reasons.
Regarding claim 16, it is a process claim whose limitations are substantially the same as those of claim 8. Accordingly, it is rejected for substantially the same reasons.
Regarding claim 17, Mukundan further anticipates: A non-transitory computer-readable storage medium for comprising instructions executable, by one or more processing units of a system having a plurality of processing units, for ([0410] “…In at least one embodiment, code (e.g., executable code or source code) is stored on a set of one or more non-transitory computer-readable storage media having stored thereon executable instructions (or other memory to store executable instructions) that, when executed (i.e., as a result of being executed) by one or more processors of a computer system, cause computer system to perform operations described herein…”). The other limitations are substantially the same as those of claim 1. Accordingly, it is rejected for substantially the same reasons.
Regarding claim 18, it is an article of manufacture claim whose limitations are substantially the same as those of claim 2. Accordingly, it is rejected for substantially the same reasons.
Regarding claim 19, it is an article of manufacture claim whose limitations are substantially the same as those of claim 3. Accordingly, it is rejected for substantially the same reasons.
Regarding claim 20, it is an article of manufacture claim whose limitations are substantially the same as those of claim 4. Accordingly, it is rejected for substantially the same reasons.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. In particular, US 20230118662 A1 is cited because it discloses reserving processing resources for exclusive process execution.
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/J.C.T./Examiner, Art Unit 2196
/APRIL Y BLAIR/Supervisory Patent Examiner, Art Unit 2196
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