DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Priority
Acknowledgment is made of applicant’s claim for foreign priority under 35 U.S.C. 119 (a)-(d).
Information Disclosure Statement
The information disclosure statement filed on 03/31/2025 has been considered.
Drawings
The drawings filed on 10/2/2024 are acceptable.
Specification
The abstract of the disclosure and the specification filed on 10/02/2024 are acceptable.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1-3 is/are rejected under 35 U.S.C. 102a1 as being anticipated by Kim (US 2009/0155984).
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Regarding claim 1, Kim (US 2009/0155984) discloses:
A method of manufacturing a package, the method comprising:
providing an electronic component that includes a dielectric layer (polyimide material layer 32a, ¶0038) as a base and a semiconductor die (110, ¶0055) attached on top of the dielectric layer (32a), the semiconductor die (110) having an active area with monolithically integrated circuit elements (¶0055); and
encapsulating the dielectric layer (32a) and the semiconductor die (110) by an encapsulant (silicon resin 34b, ¶0069, ¶0075), wherein the encapsulant (34b) is a mold compound having different material properties than the dielectric layer, and wherein the dielectric layer (polyimide layer 32a) comprises a polymer.
Regarding claim 2, Kim further discloses:
wherein the active area has at least one transistor (¶0055).
Regarding claim 3, Kim further discloses:
arranging an adhesive layer (32b, ¶0040) between the dielectric layer (32a) and the semiconductor die (110), wherein the adhesive layer further promotes adhesion between the dielectric layer and the semiconductor die.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 4-11 is/are rejected under 35 U.S.C. 103 as being unpatentable over Kim.
Regarding claim 4, Kim does not disclose “wherein the active area has a thickness of less than 1 µm”. However, a change in size or shape or both is an unpatentable modification when it results in optimum conditions that differ from the prior art in degree but not in kind. In Re Rose, 220 F.2d 459, 105 USPQ 237, In reDailey, 357 F.2d 669, 149 USPQ 47). In the instant case the prior art method would not be executed differently if modified to the claimed shape or size. Therefore, the claimed limitations are considered met.
Regarding claim 5, Kim does not disclose “wherein the semiconductor die has unprocessed semiconductor material with a thickness of less than 150 µm However, a change in size or shape or both is an unpatentable modification when it results in optimum conditions that differ from the prior art in degree but not in kind. In Re Rose, 220 F.2d 459, 105 USPQ 237, In reDailey, 357 F.2d 669, 149 USPQ 47). In the instant case the prior art method would not be executed differently if modified to the claimed shape or size. Therefore, the claimed limitations are considered met.
Regarding claim 6, Kim does not disclose “wherein the semiconductor die has a thickness in a range from 1 µm to 200 µm”. However, a change in size or shape or both is an unpatentable modification when it results in optimum conditions that differ from the prior art in degree but not in kind. In Re Rose, 220 F.2d 459, 105 USPQ 237, In reDailey, 357 F.2d 669, 149 USPQ 47). In the instant case the prior art method would not be executed differently if modified to the claimed shape or size. Therefore, the claimed limitations are considered met.
Regarding claim 7, Kim does not disclose “wherein the semiconductor die has a first portion that comprises a semiconductor material having an electric resistivity of at least 500 Ωcm and a second portion that comprises a semiconductor material having an electric resistivity of less than 100 Ωcm”. However, Applicant is advised that it has been held that to be entitled to weight in method claims, the recited structure limitations therein must affect the method in a manipulative sense, and not to amount to the mere claiming of a use of a particular structure. Ex parte Pfeiffer, 1962 C.D. 408 (1961). Therefore, as Kim teaches the claimed method, the claimed limitations are considered met.
Regarding claim 8, Kim further discloses:
wherein the dielectric layer (32a) adjoins the first portion of the semiconductor die (110).
Regarding claim 9, Kim does not disclose “wherein the semiconductor die is a silicon-on-insulator die”. However, it would have been obvious to one having ordinary skill in the art at the time the invention was made to select an SOI wafer, since it has been held to be within the general skill of a worker in the art to select a known material on the basis of its suitability for the intended use as a matter of obvious design choice. In re Leshin, 125 USPQ 416. Therefore, the claimed limitations are considered met.
Regarding claim 10, Kim does not disclose “wherein the semiconductor die includes at least one material selected from the group consisting of silicon, germanium, gallium nitride, gallium arsenide, indium phosphide, silicon carbide, sapphire, diamond, and diamond-like coating. However, it would have been obvious to one having ordinary skill in the art at the time the invention was made to select a known semiconductor material for a semiconductor die, since it has been held to be within the general skill of a worker in the art to select a known material on the basis of its suitability for the intended use as a matter of obvious design choice. In re Leshin, 125 USPQ 416. Therefore, the claimed limitations are considered met.
Regarding claim 11, Kim further discloses:
wherein the dielectric layer (32a) is made of a temperature curable material (¶0038).
Allowable Subject Matter
Claims 12-19 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Regarding claim 12, the prior art does not disclose “arranging an electrically conductive back end of line structure on a main surface of the semiconductor die opposing another main surface of the semiconductor die on the dielectric layer” in combination with the remaining claimed features.
Regarding claim 15, the prior art does not disclose “providing a carrier, wherein the carrier is at least partially encapsulated by the encapsulant and electrically connected with the electronic component”. In combination with the remaining claimed features.
Regarding claim 17, the prior art does not disclose “wherein the dielectric layer is a double mold layer composed of a mold plate and a mold foil” in combination with the remaining claimed features.
Regarding claim 18, the prior art does not disclose “wherein the dielectric layer comprises a resin matrix and filler particles embedded in the resin matrix” in combination with the remaining claimed features.
Regarding claim 19, the prior art does not disclose “wherein the semiconductor die is attached on the top of the dielectric layer by lamination” in combination with the remaining claimed features.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to WILLIAM A HARRISTON whose telephone number is (571)270-3897. The examiner can normally be reached Mon-Fri, 9AM-5PM.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Brent Fairbanks can be reached at (408) 918-7532. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/WILLIAM A HARRISTON/ Primary Examiner, Art Unit 2899
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