Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
DETAILED ACTION
This action is in response to the preliminary amendment received 12/17/2024.
Claim 1 is cancelled.
Claims 2 – 21 are new.
Claim 2 – 21 are presented for examination.
Priority
Applicant’s claim for the benefit of a prior-filed application under 35 U.S.C. 119(e) and 35 U.S.C. 120 is acknowledged.
Information Disclosure Statement
The information disclosure statements (IDS) submitted on 12/17/2024 and 04/01/2025 were received. The submissions are in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statements are being considered by the examiner.
Specification
The abstract of the disclosure is objected to because:
The language "may operate", may include", and "may modify" are speculative and fail to provide a concise statement of the technical disclosure of the patent.
The language "may operate cycles" is unclear and fail to provide a concise statement of the technical disclosure of the patent.
The language "receiving a command of a first," is unclear and fail to provide a concise statement of the technical disclosure of the patent.
The language "receiving a command of a second," is unclear and fail to provide a concise statement of the technical disclosure of the patent.
Applicant is reminded of the proper content of an abstract of the disclosure.
A patent abstract is a concise statement of the technical disclosure of the patent and should include that which is new in the art to which the invention pertains. The abstract should not refer to purported merits or speculative applications of the invention and should not compare the invention with the prior art.
The abstract should be in narrative form and generally limited to a single paragraph on a separate sheet within the range of 50 to 150 words in length. The abstract should describe the disclosure sufficiently to assist readers in deciding whether there is a need for consulting the full patent text for details.
The language should be clear and concise and should not repeat information given in the title. It should avoid using phrases which can be implied, such as, “The disclosure concerns,” “The disclosure defined by this invention,” “The disclosure describes,” etc. In addition, the form and legal phraseology often used in patent claims, such as “means” and “said,” should be avoided.
A corrected abstract of the disclosure is required and must be presented on a separate sheet, apart from any other text. See MPEP § 608.01(b).
Double Patenting
The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the claims at issue are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); and In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969).
A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on a nonstatutory double patenting ground provided the reference application or patent either is shown to be commonly owned with this application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b).
The USPTO internet Web site contains terminal disclaimer forms which may be used. Please visit http://www.uspto.gov/forms/. The filing date of the application will determine what form should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to http://www.uspto.gov/patents/process/file/efs/guidance/eTD-info-I.jsp.
Claims 2 – 21 are rejected on the ground of nonstatutory double patenting over claims 1, 2, and 5 – 7 of U.S. Patent No. 12,124,333 since the claims, if allowed, would improperly extend the “right to exclude” already granted in the patent.
The subject matter claimed in the instant application is fully disclosed in the patent and is covered by the patent since the patent and the application are claiming common subject matter, as follows:
Claim 2 – Application 18/908370
Claim 1 – Patent 12,124,333
An apparatus, comprising:
An apparatus, comprising:
a controller associated with a memory device, wherein the controller is configured to cause the apparatus to:
a controller associated with a memory device, wherein the controller is configured to cause the apparatus to:
receive, at the memory device, a first command of a first type for a memory array of the memory device;
receive, at the memory device, a first command of a first type for a memory array of the memory device;
maintain a value of an error correction counter in response to receiving the first command of the first type;
maintain a value of a refresh counter in response to receiving the first command; and
modify a value of a refresh counter in response to receiving the first command; and
modify a value of an error correction counter in response to receiving the first command of the first type;
perform a refresh operation on a first row of the memory array based at least in part on the value of the refresh counter.
perform an error correction procedure on a portion of a first row of the memory array based at least in part on the value of the error correction counter.
One of ordinary skill in the art would clearly recognize independent claim 2, of application 18/908370 is an obvious variation of the claimed subject matter of independent claim 1, of patent 12,124,333. Specifically, both claim 2, of the current application 18/908370, and claim 1, of patent 12,124,333 discloses: “An apparatus, comprising: a controller associated with a memory device, wherein the controller is configured to cause the apparatus to: receive, at the memory device, a first command of a first type for a memory array of the memory device”, comprising such steps as maintain a value of a counter in response to receiving the first command of the first type and modify a value of a counter in response to receiving the first command.
One of ordinary skill in the art would recognize the apparatus disclosed by claim 2, of the current application 18/908370, as a reciprocal recitation of the operations performed by the apparatus disclosed in claim 1 of Patent 12,124,333. Both claims recite maintaining a counter and modifying a counter in response to a command. It would be obvious to one of ordinary skill in the art at the time of filing that the reciprocal action of maintaining the error counter and modifying refresh counter would be obvious to try and a predictable result in the process of operating the memory.
Therefore, one of ordinary skill in the art would recognize the apparatus claim 2, of the current application 18/908370, as obvious variation of the operations of the apparatus of claim 1, of U.S. Patent 12,124,333, and as such are obvious variants of each other.
Claim 3 – Application 18/908370
Claim 2 – Patent 12,124,333
Claim 4 – Application 18/908370
Claim 5 – Patent 12,124,333
Claim 5 – Application 18/908370
Claim 1, 2 – Patent 12,124,333
Claim 6 – Application 18/908370
Claim 5 – Patent 12,124,333
Claim 7 – Application 18/908370
Claim 5 – Patent 12,124,333
Claim 8 – Application 18/908370
Claim 7 – Patent 12,124,333
Claim 9 – Application 18/908370
Claim 6 – Patent 12,124,333
One of ordinary skill in the art would clearly recognize independent claim 10, of application 18/908370 is an obvious variation of the claimed subject matter of independent claim 1, of patent 1. Specifically, both claim 10, of the current application 18/908370, and claim 1, of patent 12,124,333 discloses: “receive, at the memory device, a first command of a first type for a memory array of the memory device; modify a value of an error correction counter in response to receiving the first command of the first type; and maintain a value of a refresh counter in response to receiving the first command”.
One of ordinary skill in the art would recognize the apparatus disclosed by claim 10, of the current application 18/908370, as a broad recitation of the operations performed by the apparatus disclosed in claim 1 of Patent 12,124,333. An apparatus performing operations and an apparatus capable of performing the disclosed operations would be recognize by one of ordinary skill in the art as obvious variants of each other.
Therefore, one of ordinary skill in the art would recognize the apparatus claim 10, of the current application 18/908370, as performing the operations of the apparatus of claim 1, of U.S. Patent 12,124,333, and as such are obvious variants of each other.
Claim 10 – Application 18/908370
Claim 1 – Patent 12,124,333
Claim 11 – Application 18/908370
Claim 1 – Patent 12,124,333
Claim 12 – Application 18/908370
Claim 2 – Patent 12,124,333
Claim 13 – Application 18/908370
Claim 5 – Patent 12,124,333
Claim 14 – Application 18/908370
Claim 5 – Patent 12,124,333
Claim 15 – Application 18/908370
Claim 6, 7 – Patent 12,124,333
One of ordinary skill in the art would clearly recognize independent claim 16, of application 18/908370 is an obvious variation of the claimed subject matter of independent claim 1, of patent 1. Specifically, both claim 16, of the current application 18/908370, and claim 1, of patent 12,124,333 discloses: “receive, at the memory device, a first command of a first type for a memory array of the memory device; modify a value of an error correction counter in response to receiving the first command of the first type; and maintain a value of a refresh counter in response to receiving the first command”.
One of ordinary skill in the art would recognize the apparatus disclosed by claim 16, of the current application 18/908370, as a broad recitation of the operations performed by the apparatus disclosed in claim 1 of Patent 12,124,333. An apparatus performing operations and an apparatus capable of performing the disclosed operations would be recognize by one of ordinary skill in the art as obvious variants of each other.
Therefore, one of ordinary skill in the art would recognize the apparatus claim 16, of the current application 18/908370, as performing the operations of the apparatus of claim 1, of U.S. Patent 12,124,333, and as such are obvious variants of each other.
Claim 16 – Application 18/908370
Claim 1 – Patent 12,124,333
Claim 17 – Application 18/908370
Claim 1 – Patent 12,124,333
Claim 18 – Application 18/908370
Claim 2 – Patent 12,124,333
Claim 19 – Application 18/908370
Claim 1 – Patent 12,124,333
Claim 20 – Application 18/908370
Claim 5 – Patent 12,124,333
Claim 21 – Application 18/908370
Claim 5 – Patent 12,124,333
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure:
Chang; Ik Joon et al. US 20200341840 A1
KIM; Joon-Woo et al. US 20190333566 A1
ISHIKAWA; TORU US 20190303244 A1
LIM J et al. US 20180190366 A1
Halbert; John B. et al. US 20170060681 A1
Benedict; Melvin K. US 20160202926 A1
Kang; Uk-Song et al. US 20120317352 A1
Suh; Jungwon US 20120151299 A1
receive, at the memory device, a first command of a first type for a memory array of the memory device;
maintain a value of an error correction counter in response to receiving the first command of the first type;
modify a value of a refresh counter in response to receiving the first command;
Any inquiry concerning this communication or earlier communications from the examiner should be directed to DANIEL F MCMAHON whose telephone number is (571)270-3232. The examiner can normally be reached Monday-Thursday 9am - 5pm EST.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Mark Featherstone can be reached at (571)270-3750. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/Daniel F. McMahon/Primary Examiner, Art Unit 2111