DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 16-20 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. The claims lack scope of certainty. The limitation by incorporation redundant, contradictory, or confusing. For example, claim 17 repeats the most clearly functional/action part of claim 1.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claim(s) 1-10, 12, 14-20 is/are rejected under 35 U.S.C. 103 as being unpatentable over Khasawneh et al. 20220197856 herein Khasawneh in view of Kumar et al. 20180176324 herein Kumar.
Per claim 1, Khasawneh discloses: generate M sets of data prefetching parameters using an artificial neural network based on a current data request for data from a non-volatile memory, with M being a positive integer, (¶0057-58; In any event, reinforcement learning may be performed to further improve on the model and explore new configuration paths for each phase. As shown, at a conclusion of certain workload phases of workload 410, an exploration process may be performed in which a different (e.g., randomly selected) configuration set may be used for the next workload phase, to identify whether better performance is realized with this different configuration set than otherwise indicated by the model….) select N sets from the M sets, with N being a non-negative integer not greater than M, retrieve data from the non-volatile memory based on the N sets, (¶0057-58; As a result of such exploration process, performance data obtained based on execution using the different configuration sets can be evaluated to see if it maximizes the reward function of the reinforcement learning algorithm. If it turns out that the selected exploration candidate configuration setting provides greater performance, it is possible to update machine learning model 450 with this candidate configuration set for the given workload phase.) and prefetch to a cache prefetch data which is a part or all of the retrieved data, (¶0034; when it is determined that an application is in a particular phase of operation in which some type of access pattern can be identified, this configuration information may be used to control prefetcher circuit 140 to prefetch data from a further portion of a memory hierarchy and/or system memory hierarchy according to the identified pattern (e.g., every 2 lines, 3 lines, 4 lines or so forth)).
Khasawneh discloses generating parameters using a neural network but does not specifically disclose: wherein at least an input of inputs to the artificial neural network in generating the M sets is (A) a current LDA (logical data unit address) section ID (identification) of an LDA section that contains a part or all of the data requested by the current data request or (B) a memory read latency of the non-volatile memory.
However, Kumar discloses: wherein at least an input of inputs to the artificial neural network in generating the M sets is (A) a current LDA (logical data unit address) section ID (identification) of an LDA section that contains a part or all of the data requested by the current data request or (B) a memory read latency of the non-volatile memory (¶0021; parameters can include a prefetch type (e.g., stride, predictive, or machine-learning based, among others), a latency target that the prefetcher is meant to mask, such as requests directed to addresses associated with a latency time that is above a threshold latency time, a maximum amount of cache of the fabric that can be dedicated to storing prefetched memory (e.g., an injection rate can be based, at least in part, on this parameter), prefetcher granularity (e.g., how much data one prefetch returns from the NUMA domain), which can have an increased importance when prefetcher data from a memory with a larger latency, and the QoS (e.g., how much memory bandwidth the prefetcher is allowed to occupy, such as without interfering with other application or prefetch traffic);the examiner notes that the inputs are merely defining the prefetching parameters).
It would have been obvious to one having ordinary skill in the art at the effective filing date of the invention to combine the teachings of Khasawneh and Kumar’s prefetch aware cache to control demand loads on the system. Kumar increases accuracy and efficiency of prefetching (¶0023).
Per claim 2, Kumar discloses: wherein each set of the M sets of data prefetching parameters comprises: a predicted starting LBA (Logical Block Address); and a predicted I/O (input/output) size (¶0021; parameters can include a prefetch type (e.g., stride, predictive, or machine-learning based, among others), a latency target that the prefetcher is meant to mask, such as requests directed to addresses associated with a latency time that is above a threshold latency time, a maximum amount of cache of the fabric that can be dedicated to storing prefetched memory (e.g., an injection rate can be based, at least in part, on this parameter), prefetcher granularity (e.g., how much data one prefetch returns from the NUMA domain), which can have an increased importance when prefetcher data from a memory with a larger latency, and the QoS (e.g., how much memory bandwidth the prefetcher is allowed to occupy, such as without interfering with other application or prefetch traffic).
Per claim 3, Khasawaneh discloses: wherein M=N=1 (¶0057-58; In any event, reinforcement learning may be performed to further improve on the model and explore new configuration paths for each phase. As shown, at a conclusion of certain workload phases of workload 410, an exploration process may be performed in which a different (e.g., randomly selected) configuration set may be used for the next workload phase, to identify whether better performance is realized with this different configuration set than otherwise indicated by the model….; the examiner notes that the claim requires 1 set).
Per claim 4, Khasawaneh discloses: , wherein M>1, and wherein the controller is configured to select the N sets from the M sets by: causing the artificial neural network to generate for each set of the M sets a cache hit probability of data corresponding to said each set being requested by a future data request; and selecting sets of the M sets whose cache hit probabilities exceed a pre-specified probability threshold resulting in the N sets being selected from the M sets (¶0057-58; In any event, reinforcement learning may be performed to further improve on the model and explore new configuration paths for each phase. As shown, at a conclusion of certain workload phases of workload 410, an exploration process may be performed in which a different (e.g., randomly selected) configuration set may be used for the next workload phase, to identify whether better performance is realized with this different configuration set than otherwise indicated by the model….; the examiner notes that that the hit probabilities are merely optimizing prefetch for better performance).
Per claim 5, Khasawaneh discloses: configured to implement the artificial neural network in generating the M sets of data prefetching parameters (¶0057-58; In any event, reinforcement learning may be performed to further improve on the model and explore new configuration paths for each phase. As shown, at a conclusion of certain workload phases of workload 410, an exploration process may be performed in which a different (e.g., randomly selected) configuration set may be used for the next workload phase, to identify whether better performance is realized with this different configuration set than otherwise indicated by the model….; the examiner notes that that the hit probabilities are merely optimizing prefetch for better performance).
Per claim 6, Kumar discloses: wherein the non-volatile memory is a flash memory (¶0076; Non-volatile memory 934 includes, but is not limited to, flash memory, phase change memory (PCM), read-only memory (ROM), electrically erasable programmable read-only memory (EEPROM), or any other type of non-volatile memory device).
Per claim 7, Khasawaneh discloses: wherein the artificial neural network is a feed-forward neural network, a reinforcement learning network, a long short-term memory network, a recurrent neural network, a transformer model, or any combinations thereof (¶0057-58; In any event, reinforcement learning may be performed to further improve on the model and explore new configuration paths for each phase).
Per claim 8, Khasawaneh discloses: wherein the controller is on a single semiconductor die (¶0017).
Per claim 9, Kumar discloses: wherein the inputs to the artificial neural network are selected from a group consisting of: a current application ID of an application that makes the current data request, the current LDA section ID, a current starting LBA of the data requested by the current data request, a current I/O size of the data requested by the current data request, the memory read latency of the non-volatile memory, and any combinations thereof (¶0021; parameters can include a prefetch type (e.g., stride, predictive, or machine-learning based, among others), a latency target that the prefetcher is meant to mask, such as requests directed to addresses associated with a latency time that is above a threshold latency time, a maximum amount of cache of the fabric that can be dedicated to storing prefetched memory (e.g., an injection rate can be based, at least in part, on this parameter), prefetcher granularity (e.g., how much data one prefetch returns from the NUMA domain), which can have an increased importance when prefetcher data from a memory with a larger latency, and the QoS (e.g., how much memory bandwidth the prefetcher is allowed to occupy, such as without interfering with other application or prefetch traffic).
Per claim 10, Kumar discloses: wherein the inputs to the artificial neural network are selected from a group consisting of: a current application ID of an application that makes the current data request, the current LDA section ID, a current starting LBA of the data requested by the current data request, a current I/O size of the data requested by the current data request, the memory read latency of the non-volatile memory, a zone ID associated with the current data request, a placement identifier associated with the current data request, a namespace ID associated with the current data request, and any combinations thereof (¶0021; parameters can include a prefetch type (e.g., stride, predictive, or machine-learning based, among others), a latency target that the prefetcher is meant to mask, such as requests directed to addresses associated with a latency time that is above a threshold latency time, a maximum amount of cache of the fabric that can be dedicated to storing prefetched memory (e.g., an injection rate can be based, at least in part, on this parameter), prefetcher granularity (e.g., how much data one prefetch returns from the NUMA domain), which can have an increased importance when prefetcher data from a memory with a larger latency, and the QoS (e.g., how much memory bandwidth the prefetcher is allowed to occupy, such as without interfering with other application or prefetch traffic).
Per claim 12, Kumar discloses: configured to determine if the cache contains data requested by the current data request (¶0032; The caching agent determines if the address requested is cached in its LLC.).
Per claim 14, Kumar discloses: wherein the cache is part of a solid-state drive (SSD) that comprises the controller (fig. 2 ¶0036; The NIC 114A as illustrated includes a cache 204 (e.g., a level one (L1) cache), prefetcher circuitry 202, and system address decoder (SAD) circuitry 218 ¶0076; Non-volatile memory 934 includes, but is not limited to, flash memory, phase change memory (PCM), read-only memory (ROM), electrically erasable programmable read-only memory (EEPROM), or any other type of non-volatile memory device).
Per claim 15, Kumar discloses: wherein the cache is part of the controller (fig. 2 ¶0036; The NIC 114A as illustrated includes a cache 204 (e.g., a level one (L1) cache), prefetcher circuitry 202, and system address decoder (SAD) circuitry 218).
Per claim 16, the rejection of claim 1 is incorporated herein. Further, Kumar discloses: wherein the cache is part of a solid-state drive (SSD) that comprises the controller (fig. 2 ¶0036; The NIC 114A as illustrated includes a cache 204 (e.g., a level one (L1) cache), prefetcher circuitry 202, and system address decoder (SAD) circuitry 218 ¶0076; Non-volatile memory 934 includes, but is not limited to, flash memory, phase change memory (PCM), read-only memory (ROM), electrically erasable programmable read-only memory (EEPROM), or any other type of non-volatile memory device).
Per claims 17-20, it is rejected for the same reasons set for the in the rejection of claims 1-4. Further, the examiner notes that the limitations are redundant, contradictory, and confusing. For example, claim 17 repeats the most clearly functional/action part of claim 1.
Claim(s) 11, 13 is/are rejected under 35 U.S.C. 103 as being unpatentable over Khasawneh et al. 20220197856 herein Khasawneh and Kumar in view of Fu et al. 2022035805 herein Fu.
Per claim 11, the combined teachings of Khasawaneh and Kumar do not specifically disclose: an LBA to LDA converter configured to convert an LBA into an LDA of the non-volatile memory; and an LDA to PDA (physical data address) converter configured to convert an LDA into a PDA of the non-volatile memory.
However, Fu discloses: an LBA to LDA converter configured to convert an LBA into an LDA of the non-volatile memory; and an LDA to PDA (physical data address) converter configured to convert an LDA into a PDA of the non-volatile memory (¶0020; The commands from the host may use the logical block address (LBA) and the non-volatile storage devices may use the physical block address (PBA). LBA needs to be translated to the physical block address (PBA) at the storage controller 100. This L2P address translation may be processed by using a L2P address translation table, each entry of which may be the PBA used to store the data. In one embodiment, the non-volatile storage controller 100 may process the data in terms of a data unit (DU). The LBA for a data unit may be a logical data unit address (LDA) and the PBA for a data unit may be a physical data unit address (PDA)).
It would have been obvious to one having ordinary skill in the art at the effective filing date of the invention to combine the teachings of Khasawneh, Kumar and Fu’s translation to minimize the memory space used for translation. Fu reduces load caused by partial translation table. (¶0006).
Per claim 13, Fu discloses: wherein an LDA space of the non-volatile memory comprises non-overlapping LDA sections of different sizes (¶0020; The commands from the host may use the logical block address (LBA) and the non-volatile storage devices may use the physical block address (PBA). LBA needs to be translated to the physical block address (PBA) at the storage controller 100. This L2P address translation may be processed by using a L2P address translation table, each entry of which may be the PBA used to store the data. In one embodiment, the non-volatile storage controller 100 may process the data in terms of a data unit (DU). The LBA for a data unit may be a logical data unit address (LDA) and the PBA for a data unit may be a physical data unit address (PDA)).
Response to Arguments
Applicant's arguments filed 12/22/25 have been fully considered but they are not persuasive.
The applicant argues: The Office must clearly identify the language that causes the claim to be indefinite and thoroughly explain the reasoning for the rejection" and "must set forth the specific term or phrase that is indefinite and why the metes and bounds are unclear." The Office's current rejection fails to satisfy this burden, offering only an unsubstantiated conclusion of indefiniteness without identifying the specific ambiguous language or providing a thorough explanation. For this reason, the rejection of Claims 16-20 must be withdrawn.
The examiner respectfully disagrees and asserts that the rejection specifically noted that incorporating the controller claim of claim 1 to the method claim 17 lack scope of certainty. The limitation by incorporation would be redundant and confusing because claim 1 repeats the clearly functional/action of claim 17. The applicant has not set forth a reason why the rejection is unsubstantiated. Repeating exact claim language in claim 1 by incorporation in claim 17 confuses the record. While claim 1 is a different statutory class, if the limitation in claim 1 is inserted into claim 17, the repeating claim language would be repeated and thus not further limit the method claim.
The applicant argues: Khasawneh fails to teach "generate M sets of data prefetching parameters using an
artificial neural network based on a current data request for data from a non-volatile memory" in claim 1.
The Office alleges that Khasawneh teaches this feature at paragraphs [0057]-[0058].
However, this assertion is not supported by the actual disclosures in Khasawneh. Specifically, in Khasawneh, the exploration candidate configuration set used for the next workload phase is not generated by the machine learning model 450. Moreover, the configuration set is not based on a current data request. Khasawneh at [0057] explicitly states that the exploration candidate configuration set "is different than an indicated configuration set for the phase according to the model." In fact, Khasawneh provides that, for example, the exploration candidate configuration set may be randomly selected. See Khasawneh at [0057]. Therefore, Khasawneh does not disclose "generate M sets of data prefetching parameters using an artificial neural network based on a current data request for data from a non-volatile memory" in claim 1. Khasawneh fails to teach "retrieve data from the non-volatile memory based on the N sets [selected from the M sets generated using an artificial neural network]" in claim 1. Emphasis added.
The Office again alleges that Khasawneh teaches this feature at paragraphs [0057]- [0058]. However, as explained above, the exploration candidate configuration set used for the next workload phase is not even generated by Khasawneh's machine learning model 450.
However, as detailed above, the configuration set used for the next workload phase in Khasawneh is not generated by the machine learning model 450. Because the parameters are selected randomly or otherwise independent of the model's output (as stated in Khasawneh's paragraph [0057]), Khasawneh cannot teach "retrieve data from the non-volatile memory based on the N sets [selected from the M sets generated using an artificial neural network]" in claim 1. Emphasis added. The alleged teaching in Khasawneh's [0057]-[0058] is contrary to this feature of claim 1.
The examiner respectfully disagrees and asserts that Khasawneh discloses "generate M sets of data prefetching parameters using an artificial neural network based on a current data request for data from a non-volatile memory." The examiner interprets the limitation as generating parameters with a neural network based on the current data request being processed. The examiner disagrees with the applicants’ characterization of the Khasawneh reference. ¶0057-58 are reproduced below and clearly disclose and exploration process wherein performance data is obtained based on different configuration sets. Based on the performance of the reinforcement learning algorithm, the machine learning model is updated with that configuration set for the given/current workload. It is clear that the configuration test sets (the prefetching parameters) used by the learning algorithm based on the workload produces a preferred configuration set to update the machine learning model. This preferred configuration set is used by the machine learning to control the prefetch circuit. Therefore, Khawsawneh discloses "generate M sets of data prefetching parameters using an artificial neural network based on a current data request for data from a non-volatile memory."
[0057] In any event, reinforcement learning may be performed to further improve on the model and explore new configuration paths for each phase. As shown, at a conclusion of certain workload phases of workload 410, an exploration process may be performed in which a different (e.g., randomly selected) configuration set may be used for the next workload phase, to identify whether better performance is realized with this different configuration set than otherwise indicated by the model. As such, for these exploration processes, an exploration candidate configuration set for a next workload phase is selected that is different than an indicated configuration set for the phase according to the model.
[0058] As a result of such exploration process, performance data obtained based on execution using the different configuration sets can be evaluated to see if it maximizes the reward function of the reinforcement learning algorithm. If it turns out that the selected exploration candidate configuration setting provides greater performance, it is possible to update machine learning model 450 with this candidate configuration set for the given workload phase.
Kumar does not cure the failure of Khasawneh to teach "at least an input of inputs to the artificial neural network in generating the M sets is (A) a current LDA (logical data unit address) section ID (identification) of an LDA section that contains a part or all of the data requested by the current data request or (B) a memory read latency of the non-volatile memory." The Office cites paragraph [0021] of Kumar but this paragraph at most teaches "the prefetchers can be configured based on a variety of parameters" and is silent about using any of the parameters as an input to a machine learning model. Without an express teaching or sufficient rationale explaining why one of ordinary skill in the art would select these specific parameters as inputs to a machine learning model for Khasawneh's system, the combination does not establish a reasonable expectation of success for the claimed invention.
The examiner respectfully disagrees and asserts that Khasawneh discloses configuration set/parameters but does not specifically disclose a specific type of parameter. Further Kumar is relied upon to teach the parameters input into the NN. The notes that the claim language is presented in the alternative. A teaching of either the LDU address or ID or a memory read latency. Kumar discloses multiple parameters including a prefetch type, latency target and QOs or the like. Clearly Kumar discloses a read latency of a prefetch. Therefore, Khasawneh discloses "at least an input of inputs to the artificial neural network in generating the M sets is (A) a current LDA (logical data unit address) section ID (identification) of an LDA section that contains a part or all of the data requested by the current data request or (B) a memory read latency of the non-volatile memory.”
Remark
Examiner respectfully requests, in response to this Office action, support be shown for language added to any original claims on amendment and any new claims. That is, indicate support for newly added claim language by specifically pointing to page(s) and line number(s) in the specification and/or drawing figure(s). This will assist Examiner in prosecuting the application.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Hotchkies discloses: building a machine learning model for predicting content delivery performance, wherein the machine learning model is trained, at least in part, on the first, second and third data; [0128] obtaining a target content request from a user computing device; [0129] determining a predicted content delivery performance for applying a target content delivery strategy in response to the target content request based, at least in part, on the machine learning model; and [0130] if the predicted content delivery performance satisfies a predetermined condition: [0131] generating a response to the target content request in accordance with the target content delivery strategy; and [0132] transmitting the generated response to the user computing device. [0133] Clause 2: The computer-implemented method of Clause 1, wherein the first data includes at least one of a type of requested resource, request timing information, associated network condition or topology, characteristics of requesting devices, or associated location information. [0134] Clause 3: The computer-implemented method of Clauses 1 and 2, wherein the second data includes at least one of inclusion or exclusion of features, lazy-loading or prefetching of resources, in-lining or external calls for resources, low quality or high quality data formats, associated dependency graphs, above-the-fold information, or request routing information. [0135] Clause 4: The computer-implemented method of Clauses 1 to 3, wherein the third data includes at least one of a total time to load a content page or individual network resources, number of times the content page or individual network resources was retrieved, bandwidth utilization, network latency, number of hops between client and server, processor utilization, memory utilization, cache hit or miss ratio, or load time per cache miss.
THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
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BABOUCARR . FAAL
Primary Examiner
Art Unit 2138
/BABOUCARR FAAL/Primary Examiner, Art Unit 2138
Prosecution Insights