DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
Obligation Under 37 CFR 1.56 – Joint Inventors
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Response to Amendment
Applicant’s amendment filed on July 7, 2026 has been entered. Claims 1-2, 7, 11-13 and 18-19 have been amended. No claims have been canceled or added. Thus, claims 1-20 are still pending in this application, with claims 1, 7, 12 and 18 being independent. Claims 7 and 18 are allowed.
Applicant’s amendment filed on July 7, 2026
overcomes the following objections/rejections:
Objection to the specification.
Rejection of claim 11 under 35 USC 101.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries set forth in Graham v. John Deere Co., 383 U.S. 1, 148 USPQ 459 (1966), that are applied for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
Determining the scope and contents of the prior art;
Ascertaining the differences between the prior art and the claims at issue;
Resolving the level of ordinary skill in the pertinent art; and
Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claims 1, 4, 6, 10-12, 15 and 17 are rejected under 35 U.S.C. 103 as being unpatentable over PAI et al. (US 2008/0013822, hereinafter “PAI”) in view of CARLSON et al. (Carlson A, Le T, Pai A, Hallen J, Rioux B. “Use of automated EBR metrology inspection to optimize the edge bead process.” Metrology, Inspection, and Process Control for Microlithography XXI 2007 Apr 5 (Vol. 6518, pp. 875-882). SPIE; hereinafter “CARLSON”), further in view of LUQUE (US 20100211903).
Regarding claim 12, PAI discloses a display device (FIG. 3. ¶ [0030]: “FIG. 3 showing a more inclusive schematic of the edge inspection system 150.”), comprising:
an information acquirer (¶ [0031]: “an image acquisition module 158a for receiving image data from one or more of the edge sensors 152, 154, 156,” ¶ [0030]: “a top edge sensor 152,” ¶ [0036]: “Image Data Acquisition 210,”) configured to acquire, based on an image obtained by imaging (¶ [0032]: “top edge sensor 152 includes a camera 164,” ¶ [0032]: “The various sensors 152, 154, and/or 156 are generally adapted to capture images of the wafer 50, such as grayscale and/or color image data for example.”) a peripheral region of a front surface of a substrate having a film formed on the front surface thereof (¶ [0034]: “the edge inspection system 150 performs "top-down" inspection of the top edge region 100 (FIG. 2) via the top edge sensor 152.”), edge information indicating a relationship between a circumferential position (¶ [0034]: “acquiring image data at a plurality of circumferential image frame locations about the wafer 50.”) and an edge position of the film in a radial direction of the substrate (As shown in FIG. 2. ¶ [0035]: “the first resist edge 114, the exposed edge region 130,” ¶ [0042]: “the first dimension X of the pixel array 212 is substantially tangential to wafer 50, and in particular wafer edge 102, with the dimension Y being substantially radially aligned to the wafer 50,”) for each of multiple circumferential positions around a center of the substrate (¶ [0034]: “the edge inspection system 150 inspects an edge portion of the wafer 50, the edge portion including one or more of the top edge region 130, the bottom edge region 134, and/or the wafer edge normal 138 by acquiring image data at a plurality of circumferential image frame locations about the wafer 50. For example, the first resist edge 114, the exposed edge region 130, the top bevel 136, and the wafer edge 102 are all optionally imaged about the wafer 50 with the top edge sensor 152.” ¶ [0035]: “the edge inspection system 150 inspects the top edge region 100 of the wafer 50 including the first resist edge 114, the exposed edge region 130, and the top bevel 136; the edge normal 138; and the bottom edge region 134 including the bottom bevel 140, according to the inspection areas 184, 186, 188, respectively. It should be understood that, in some embodiments, the top edge region 100 generally corresponds to the inspection area 184.” ¶ [0037]: “with reference to FIG. 5, in some embodiments Image Data Acquisition 210 includes using the edge inspection system 150 (FIG. 3) to acquire image data in the form of a plurality of images taken about the wafer top edge region 100 or other edge portion of the wafer 50, with each of the plurality of images being acquired about the wafer 50. The top edge sensor 152 (FIG. 3) images the top edge region 100 in the inspection area 184 with the wafer 50 being substantially continuously rotated, for example in rotational direction R, such that images are acquired circumferentially about the wafer 50.” ¶ [0024]: “acquiring a series of digital images about an edge portion of a wafer, for example with and associated sensor, such as an optical camera, positioned at a radial offset from a center of a rotating stage assembly. In some embodiments, an entire outer circumference of the wafer is imaged in a continuous and/or stepwise fashion.” ¶ [0024]: “For example, the distance from the edge of the wafer to a resist edge, such as an EBR line, is optionally evaluated about an entire circumference of the wafer. Any number of resist layers can be present on the wafer, each resist layer defining a resist edge. Thus, where applicable, each of a plurality of resist edges of interest is located as desired.”);
an information display configured to display (¶ [0031]: “a user interface module 158d for displaying the composite image 300 and/or other information to a user.”), on a monitor (¶ [0069]: “e.g., a computer screen”), a graph ([0069]: “a composite image visual display 360”; FIG. 11. ¶ [0051]: “The first axis M is described in angular units, such as 0 degrees to 360 degrees or -180 degrees to +180 degrees, for example, while the second axis N is described in units of distance, micrometers, for example.”) indicating the edge position for each of the multiple circumferential positions based on the edge information (See FIG. 11. ¶ [0069]: “With reference to FIG. 11, some embodiments include displaying the composite image 300, including related edge gradient data, edge segment data, or other data as desired, to a user in a composite image visual display 360 (e.g., a computer screen or a print out as appropriate) with visual representations of found wafer features, such as located first resist edge 114a, located second resist edge 114b, and located third resist edge 114c as shown in FIG. 11. With reference to FIG. 11, the composite image 300 is displayed with the found, or identified, first, second, and third resist edges 114a, 114b, 114c displayed as highlighted lines or grouping of edge segments. If desired, a user can select a located wafer feature, such as the first resist edge 114a, to further highlight the feature and obtain various metrics associated with the located feature.” ¶ [0052]: “With reference between FIGS. 1 and 7, where the wafer 50 is well-centered during imaging of the top edge region 100, for example, and in the absence of other imaging deviations, the wafer edge 102 should be represented in the composite image 300 as a substantially straight line. However, where alignment errors occur, for example, where the wafer 50 is offset to some extent on the stage assembly 162, the wafer edge 102 will take a more sinusoidal shape in the composite image 300 as indicated generally in FIG. 7. In other words, the offset of some embodiments induces eccentricity in the imaging of the wafer edge 102, which results in the wafer edge 102 taking a more sinusoidal shape due to the fact that the wafer edge 102 according to the circularity of the wafer edge 102.”); and
a range determiner configured to determine, before displaying the graph on the monitor, a display range for the edge position on the graph (e.g., See FIG. 10 and/or FIG. 11. ¶ [0071]: “scale 380 showing relative distance is optionally presented next to the window 370 to provide a user with a frame of reference for relative distances between found or otherwise displayed features.” NOTE: Clearly, the graphs shown in both FIG. 10 and FIG. 11 have ranges for the vertical axis. In order to plot and display the graphs, the scale of each axis must first be determined. For instance, the scale 380 in FIG. 11, must, by necessity, first be determined before it can be displayed.) (e.g., ¶ [0066]: “Perimeter information such as minimum and maximum distances from the resist center 112 to the resist edges 114a, 114b, for example, can also be provided.”) (¶ [0063]: “With reference to FIG. 10, in some embodiments the above-described methodology is suited for finding multiple, crossing film edge lines, such as EBR lines belonging to separate, distinct resist layers. In particular, FIG. 10 illustrates some embodiments where the resist edge 114a has been found according to groupings of edge segments A, B, C and the resist edge 114b found according to groupings of edge segments D, E, F. With reference to FIG. 10, it should be understood that the sinusoidal curve fitting technique helps ensure that each of the groupings of edge segments A, B, C and the groupings of edge segments D, E, F are associated with each other to identify the resist edges 114a, 114b. In particular, edge segments A, B, C form a highly sinusoidal fit as do edge segments D, E, F, whereas other combinations of the edge segments A, B, C, D, E, F exhibit a lesser degree of sinusoidal fit for evaluating the resist edges 114a, 114b.” ¶ [0065]: “As previously referenced, several different metrics of various wafer features can be obtained according to some embodiment systems and methods described herein. For example, it should be understood that similar methodology to that described above in association with locating EBR lines is optionally applied to locate the wafer edge 102, the top edge bevel 136, for example, as well as features associated with the bottom edge region 134, features associated with the wafer edge normal 138, and others. As referenced above, the compression process can be used to suppress unwanted edge information or otherwise "bring out" features of interest that extend about the top edge region 100 or other regions. For example, the origin 142 of the top edge bevel 136 can be located at a relatively high degree of accuracy and/or efficiency, which, in combination with the location of the wafer edge 102, can be used to determine mean top edge bevel width, bevel variability, or other metrics as desired. It should clear that similar principles are also applicable to the bottom bevel 140 in view of the foregoing.” ¶ [0066]: “Additionally, using a found position of the first resist edge 114a, for example, various other metrics can be evaluated at a relatively high degree of accuracy and/or efficiency. For example, the resist center 112 location can be calculated from the location of the first resist edge 114a. An offset of the resist center 112 from the wafer center 104 can be determined in (R, Θ) coordinates and/or (ΔX, ΔY) coordinates as desired. It can also be determined whether the found location of the first resist edge 114a or second resist edge 114b, for example, are within desired tolerance(s). Perimeter information such as minimum and maximum distances from the resist center 112 to the resist edges 114a, 114b, for example, can also be provided. Using the determined resist edges 114a, 114b a roughness measurement for the resist edges 114a, 114b, for example, or standard deviation number representative of how jagged or smooth the resist edges 114a, 114b is can be determined. Additionally, it is contemplated that a basic shape of the resist edges 114a, 114b can be determined (e.g., circular, elliptical, etc.). Where multiple EBR lines are identified, such as resist edges 114a, 114b, "criss-cross" points, or intersections, of the EBR lines can be determined as well as offset between the multiple EBR lines. The above-listed metrics are not meant to be an exclusive list and other potential metrics are also contemplated.” ¶ [0069]: “With reference to FIG. 11, some embodiments include displaying the composite image 300, including related edge gradient data, edge segment data, or other data as desired, to a user in a composite image visual display 360 (e.g., a computer screen or a print out as appropriate) with visual representations of found wafer features, such as located first resist edge 114a, located second resist edge 114b, and located third resist edge 114c as shown in FIG. 11. With reference to FIG. 11, the composite image 300 is displayed with the found, or identified, first, second, and third resist edges 114a, 114b, 114c displayed as highlighted lines or grouping of edge segments. If desired, a user can select a located wafer feature, such as the first resist edge 114a, to further highlight the feature and obtain various metrics associated with the located feature.” ¶ [0070]: “Additionally, the composite image visual display 360 may include several controls (not shown) for changing the various thresholds or other criteria applied during Composite Image Data Analysis 240 in order to customize feature detection, for example by selecting different edge thresholding values or minimum edge segment lengths, for example). The found wafer edge 102 and the origin 142 of the top bevel 136 are also optionally displayed as highlighted lines or groupings of edge segments, along with an upper EBR line tolerance 366 and a lower EBR line tolerance 368 for visually evaluating whether a particular EBR line is "out of spec." If desired, various information and metrics can be displayed by numbers, symbols, or text on the composite image visual display 360, e.g., a number of times a selected EBR line passes "out of spec," as well as any of the other metrics previously described, e.g., resist center 112 to wafer center 104 offset, and others.” ¶ [0071]: “Additionally, in some embodiments a user is able to select a particular image frame acquisition location on the composite image visual display 360, with a window 370 showing the uncompressed image taken at that frame acquisition location. The found EBR lines, such as the first resist edge 114, wafer edge 102, top bevel 136, and/or the upper and lower tolerances 366, 368 are also optionally displayed in the window 370 showing the uncompressed image. A scale 380 showing relative distance is optionally presented next to the window 370 to provide a user with a frame of reference for relative distances between found or otherwise displayed features. Additionally, in some embodiments, a user is able to select a particular image acquisition frame location for display in the window 370 using a "slider bar" type control or by "clicking and dragging" the window 370 across the composite image visual display 360.” NOTE: Clearly, there must be some basis for determining the range of relative distances in the displayed graphs shown in FIG. 10 and FIG. 11. Furthermore, it would have been obvious to one of ordinary skill in the art to have set the range of distances according to a determined statistical range for the measured radii of the detected locations of the edge lines of the wafer, i.e., the determined “minimum and maximum distances from the resist center 112 to the resist edges” (see ¶ [0066]), since using a range outside of the minimum and maximum values would be redundant and uninformative. In other words, since the graphs are shown with a limited range, clearly one of ordinary skill in the art would choose the range to only encompass a statistically relevant range according to the range of detected edge distances from the center of the wafer. There would be no point to set the range too small or too large. It would only make sense to set a range to encompass the statistically relevant ranges of the determined edge perimeter distances, as is the case in FIG. 10 and FIG. 11.).
Nevertheless, whereas PAI may not be entirely explicit as to, CARLSON clearly teaches:
a range determiner configured to determine a display range (e.g., “Distance from nominal”, ranging from -0.500 to 0,500, in the graph plotting EBR measurements over 360 degrees.) for the edge position (e.g., the “EBR Measurements” plotted in the graph shown in FIG. 5) on the graph (e.g., the vertical axis range displayed in the “EBR Measurement” graph shown in FIG. 5) based on statistical information of the edge position included in the edge information (As is clearly shown in the graph of FIG. 5 (on page 6) (e.g., titled as “EBR Measurement Offsets From Nominal By Degree”), the range of the vertical axis corresponds to “Distance from nominal (mm)”.).
Thus, in order to obtain a more versatile display device having the cumulative features and/or functionalities taught by PAI and CARLSON, it would have been obvious to one of ordinary skill in the art to have modified the display device taught by PAI so as to incorporate determining a display range for the edge position on the graph based on statistical information of the edge position included in the edge information, as taught by CARLSON.
Whereas PAI and CARLSON are not explicit as to, LUQUE teaches:
wherein the range determiner is configured to determine, based on the statistical information of the edge position included in the edge information, a maximum value and a minimum value that define the display range (¶ [0068] A scale limits area 251 is provided within the wafer display area 201. The scale limits area 251 includes a scale limits activation selection 253 and a drop-down menu 259 offering options for establishing an upper and a lower scale limit. The drop-down menu 259 includes a user supplied option, a percentage of mean option, and a 3-sigma option. Selection of the user supplied option enables an upper scale limit to be entered in an upper scale limit field 255 and a lower scale limit to be entered in a lower scale limit field 257. Selection of the percentage of mean option enables a percentage value to be entered in a value field 261. The upper and lower scale limits are calculated to be a corresponding percentage of the mean. Selection of the 3-sigma option establishes the upper and lower scale limits at three times the standard deviation about the mean.” See FIG. 2. ¶ [0076[: “The cross-section display 523 includes a horizontal scale representing the radial distance from the center of the wafer. The cross-section display 523 also includes a vertical scale representing a wafer thickness. Therefore, the cross-section display 523 presents an image of the wafer thickness variation as a function of distance from the wafer center.” ¶ [0077]: “The set of cross-section controls are provided to allow the user to select the exact cross-section to be displayed in the cross-section display 523. The set of cross-section controls include an angle select graphical control 515, an angle value field 517, a color selection 519, and a scale limits synchronization selection 521.” ¶ [0077]: “The scale limits synchronization selection 521 is used to synchronize the vertical scale of the cross-section display 523 with the scale limits as entered in the scale limits area 251.” See FIG. 5.).
Thus, in order to provide a more versatile display device including the functionality of determining scale limits (i.e., maximum and minimum display ranges) based statistical information of acquired information (i.e., measurement data), as taught by LUQUE, it would have been obvious to one of ordinary skill in the art to have modified the device taught by the combination of PAI and CARLSON so as to include the functionality of determining, based on statistical information of the edge position included in the edge information, a maximum value and a minimum value defining the display range, as taught by LUQUE.
Regarding claim 15 (depends on claim 12), PAI discloses:
wherein the graph is a graph of polar coordinates in which a distance from an origin represents the edge position and an angle around the origin represents the circumferential position (¶ [0072]: “With reference to FIG. 11, a circular map visual display 400 can additionally or alternatively be provided to the composite image visual display 360. The circular map visual display 400 provides a circular representation of the wafer 50 according to the found wafer edge 102. The found first resist edge 114, the inner and outer tolerances 366, 368, and the top edge bevel 136 (not shown in FIG. 11), the wafer notch 106, the resist center 112, and the wafer center 104 are displayed on the circular map display 400 as desired, for example as highlighted lines. It should be understood that any of the information associated with the composite image visual display 360 is also optionally displayed in the circular map visual display 400, and vice versa. NOTE: A circular map with angles and distances of the edge measurements mapped thereon is a graph of polar coordinates.).
Regarding claim 17 (depends on claim 12), both PAI and CARLSON disclose:
the graph is a graph of rectangular coordinates in which a vertical axis represents the edge position, and a horizontal axis represents the circumferential position (See FIG. 10 and FIG. 11 of PAI. See FIG. 5 of CARLSON.).
Regarding claim 1, claim 1 is directed to the method implemented by the device of claim 12 and, as such, is rejected for the same reasons applied above in the rejection of claim 12.
Regarding claim 4 (depends on claim 1), claim 4 is directed to the method implemented by the device of claim 15 and, as such, is rejected for the same reasons applied above in the rejection of claim 15.
Regarding claim 6 (depends on claim 1), claim 6 is directed to the method implemented by the device of claim 17 and, as such, is rejected for the same reasons applied above in the rejection of claim 17.
Regarding claim 10 (depends on claim 1), PAI discloses:
wherein the image is obtained by performing the imaging so as to include a boundary between a bevel portion formed at an outer periphery of the substrate and a portion other than the bevel portion (e.g., See FIG. 2. ¶ [0029]: “top bevel 136 has an origin 142 and extends to the wafer edge normal 138”) (¶ [0029]: “FIG. 2 is a sectional view of the wafer 50 along line 2-2 as indicated in FIG. 1. The top edge region 100 includes the wafer edge 102, the first resist edge 114, and an exposed edge region 130 which is substantially free of the resist 108 and/or other unwanted surface materials. With reference between FIGS. 1 and 2, in some embodiments, the top edge region 100 is substantially annular in shape defining an inner diameter substantially inset from various edge features of interest, such as inset from an edge of the exposed region 130 and/or the resist edge 114a. Also shown is a bottom edge region 134 opposite the top edge region 100 which can also be substantially free of resist or other film layers and is optionally a mirror image of the top edge region 100 being defined by about the same boundaries. In some embodiments, the wafer 50 is beveled proximate the wafer edge 102 and defines a top bevel 136, a wafer edge normal 138, and a bottom bevel 140. The top bevel 136 has an origin 142 and extends to the wafer edge normal 138. The wafer edge normal 138 can generally be described as an outer face and boundary of the wafer 50, thus defining a location of the wafer edge 102. In turn, the bottom bevel 140 defines an origin 144 and extends to the wafer edge normal 138.” ¶ [0035]: “In particular, with reference to FIG. 2, the top edge sensor 152 has an inspection area 184, the edge normal sensor 156 has an inspection area 186, and edge bottom sensor 154 has an inspection area 188. In some embodiments, the edge inspection system 150 inspects the top edge region 100 of the wafer 50 including the first resist edge 114, the exposed edge region 130, and the top bevel 136; the edge normal 138; and the bottom edge region 134 including the bottom bevel 140, according to the inspection areas 184, 186, 188, respectively. It should be understood that, in some embodiments, the top edge region 100 generally corresponds to the inspection area 184.”), and
the graph displayed on the monitor shows, in addition to the edge position for each circumferential position (e.g., FIG. 11, ¶ [0069]: “first, second, and third resist edges 114a, 114b, 114c displayed as highlighted lines”), a position of the boundary (e.g., FIG. 11, ¶ [0069]: “the origin 142 of the top bevel 136”) in the radial direction of the substrate for each circumferential position (¶ [0069]: “With reference to FIG. 11, some embodiments include displaying the composite image 300, including related edge gradient data, edge segment data, or other data as desired, to a user in a composite image visual display 360 (e.g., a computer screen or a print out as appropriate) with visual representations of found wafer features, such as located first resist edge 114a, located second resist edge 114b, and located third resist edge 114c as shown in FIG. 11. With reference to FIG. 11, the composite image 300 is displayed with the found, or identified, first, second, and third resist edges 114a, 114b, 114c displayed as highlighted lines or grouping of edge segments. If desired, a user can select a located wafer feature, such as the first resist edge 114a, to further highlight the feature and obtain various metrics associated with the located feature.” ¶ [0070]: “Additionally, the composite image visual display 360 may include several controls (not shown) for changing the various thresholds or other criteria applied during Composite Image Data Analysis 240 in order to customize feature detection, for example by selecting different edge thresholding values or minimum edge segment lengths, for example). The found wafer edge 102 and the origin 142 of the top bevel 136 are also optionally displayed as highlighted lines or groupings of edge segments, along with an upper EBR line tolerance 366 and a lower EBR line tolerance 368 for visually evaluating whether a particular EBR line is "out of spec." If desired, various information and metrics can be displayed by numbers, symbols, or text on the composite image visual display 360, e.g., a number of times a selected EBR line passes "out of spec," as well as any of the other metrics previously described, e.g., resist center 112 to wafer center 104 offset, and others.”).
Regarding claim 11 (depends on claim 1), claim 11 is directed to a non-transitory computer-readable recording medium having stored thereon computer-executable instructions for executing the method of claim 1, and as such, claim 11 is rejected for the same reasons applied above in the rejection of claim 1.
Claims 2 and 13 are rejected under 35 U.S.C. 103 as being unpatentable over PAI et al. (US 2008/0013822) in view of CARLSON et al. (Carlson A, Le T, Pai A, Hallen J, Rioux B. “Use of automated EBR metrology inspection to optimize the edge bead process.” Metrology, Inspection, and Process Control for Microlithography XXI 2007 Apr 5 (Vol. 6518, pp. 875-882). SPIE.) and LUQUE (US 20100211903), further in view of REITER et al. (Reiter T, McCann M, Connolly J, Haughey S. “An investigation of edge bead removal width variability, effects and process control in photolithographic manufacturing.” IEEE Transactions on Semiconductor Manufacturing. 2021 Nov 23;35(1):60-6. Hereinafter referred to as “REITER”).
Regarding claim 13 (depends on claim 12), whereas PAI, CARLSON and LUQUE are explicit as to, REITER teaches:
wherein the statistical information includes at least some of a five-number summary obtained when creating a box-and-whisker diagram for the edge position from the edge information (FIG. 8 on page 64 teaches using a box plot (i.e., a “box-and-whisker diagram” including “five-number” summaries of edge bead removal width measurements.).
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Thus, in order to obtain a more versatile display device having the cumulative features and/or functionalities taught by PAI, CARLSON, LUQUE and REITER, it would have been obvious to one of ordinary skill in the art to have modified the graph displayed by the display device taught by the combination of PAI, CARLSON and LUQUE so as to also incorporate statistical information including at least some of a five-number summary obtained when creating a box-and-whisker diagram for the edge position from the edge information, as taught by REITER.
Regarding claim 2 (depends on claim 1), claim 2 is directed to the method implemented by the device of claim 13 and, as such, is rejected for the same reasons applied above in the rejection of claim 13.
Claims 3 and 14 are rejected under 35 U.S.C. 103 as being unpatentable over PAI et al. (US 2008/0013822) in view of CARLSON et al. (Carlson A, Le T, Pai A, Hallen J, Rioux B. “Use of automated EBR metrology inspection to optimize the edge bead process.” Metrology, Inspection, and Process Control for Microlithography XXI 2007 Apr 5 (Vol. 6518, pp. 875-882). SPIE.) and LUQUE (US 20100211903), further in view of REITER et al. (Reiter T, McCann M, Connolly J, Haughey S. “An investigation of edge bead removal width variability, effects and process control in photolithographic manufacturing.” IEEE Transactions on Semiconductor Manufacturing. 2021 Nov 23;35(1):60-6.), and still further in view of ARMITAGE (US 2015/0193094).
Regarding claim 14 (depends on claim 13), whereas PAI, CARLSON, LUQUE and REITER are not explicit as to, ARMITAGE teaches:
wherein the range determiner determines the display range based on a median or an average value of the edge position included in the edge information and a value obtained by multiplying a difference between a third quartile and a first quartile by a constant greater than 1 (¶ [0069]: “In descriptive statistics, a box plot, also known as a box-and-whisker diagram or plot, is a convenient way of graphically depicting groups of numerical data through their five number summaries. The five number summaries may include the smallest observation (e.g., the minimum value of the sample group), the lower quartile (Q1), the median (Q2), the upper quartile (Q3), and the largest observation (e.g., the maximum value of the sample group). A box plot may also indicate which observed values, if any, may be considered outliers in the distribution.” ¶ [0070]: “FIG. 7 illustrates an example box plot 700 for an arbitrary set of data with values for a particular measure ranging from 100 to 900 with a particular distribution. Typically, in a box plot 700 the set of data is ordered from largest to smallest, or vice versa, according to the values of a particular measure. The computing device 110 can then divide the list into quartiles according to the distribution. The quartiles can be indicated on the scale 713 with corresponding values of the list items at the lower quartile 715, the median 717, and the upper quartile 725. The range 720 between the lower quartile 715 and the upper quartile 725 are displayed as a box 750. A box 750 may be divided by a line, indicating the middle quartile, which is also referred to herein as the median value 717, of the values in the list data. The so-called "whiskers" of the box plot are represented by the line 760 that connects the lower quartile value 715 to value of the smallest observation 710 and the line 765 that connects the upper quartile 725 to the largest observation value 730. In this particular example shown, the unitless values of the data set are characterized in the legend 780. As shown, the median value is 400, the range 720 between the lower quartile and the upper quartile is a difference between 500 and 300 (i.e., 200), the maximum value 730 is 833, while the minimum value 710 is 166.” ¶ [0071]: “Box plots, such as the box plot 700 depicted in FIG. 7 display the differences between data sets without making any assumptions about the underlying statistical distribution. Accordingly box plots are nonparametric. The spacing between the different parts of the box 750 indicate the degree of dispersion or spread and the degree to which the data is skewed. While the example box plot 700 is depicted as a vertical plot, a box plot may be oriented at any angle (e.g., horizontal).” ¶ [0072]: “Box plots provide a quick way of examining one or more sets of data graphically. While box plots are more simplistic than a histogram or kernel density estimate, box plots offer various advantages over other types of graph representation of statistical data. In particular, and of particular utility to the present disclosure, box plots take up less available display area the therefore are useful for comparing distributions of several groups or sets of data. In various embodiments of the present disclosure, the preview or summary view of a particular set of data can be depicted as a box plot scrollbar which incorporates elements of a box 750 into the scrollbar 130 of a list 120 displayed on a constrained display device 113.”).
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Thus, in order to obtain a more versatile and user friendly display device having the cumulative features and/or functionalities taught by PAI, CARLSON, REITER and ARMITAGE, it would have been obvious to one of ordinary skill in the art to have modified the graph displayed by the display device taught by the combination of PAI, CARLSON and REITER so as to also incorporate determining the display range based on a median or an average value of the edge position included in the edge information and a value obtained by multiplying a difference between a third quartile and a first quartile by a constant greater than 1, as taught by ARMITAGE.
Regarding claim 3 (depends on claim 2), claim 3 is directed to the method implemented by the device of claim 14 and, as such, is rejected for the same reasons applied above in the rejection of claim 14.
Claims 5 and 16 are rejected under 35 U.S.C. 103 as being unpatentable over PAI et al. (US 2008/0013822, hereinafter “PAI”) in view of CARLSON et al. (Carlson A, Le T, Pai A, Hallen J, Rioux B. “Use of automated EBR metrology inspection to optimize the edge bead process.” Metrology, Inspection, and Process Control for Microlithography XXI 2007 Apr 5 (Vol. 6518, pp. 875-882). SPIE; hereinafter “CARLSON”) and LUQUE (US 20100211903), further in view of KAMIGUCHI (US 5296179).
Regarding claim 16 (depends on claim 15), PAl as modified does not teach: “wherein, in the displaying of the graph on the monitor, points respectively corresponding to the multiple circumferential positions to indicate the edge position are displayed in colors corresponding to a size of the edge position.”
However, KAMIGUCHI displaying of the graph on the monitor (fig. 4), points respectively corresponding to the positions (screw position, column 6, lines 45-50) to indicate a position are displayed in colors (bar graph for color display of the screw position, column 6, lines 45) corresponding to a size/value of the position.
In the displaying of the graph on the monitor in PAI, the graph shows points respectively corresponding to the multiple circumferential positions to indicate the edge position corresponding to a size of the edge position. (See FIG. 11. ¶ [0069]: “With reference to FIG. 11, some embodiments include displaying the composite image 300, including related edge gradient data, edge segment data, or other data as desired, to a user in a composite image visual display 360 (e.g., a computer screen or a print out as appropriate) with visual representations of found wafer features, such as located first resist edge 114a, located second resist edge 114b, and located third resist edge 114c as shown in FIG. 11. With reference to FIG. 11, the composite image 300 is displayed with the found, or identified, first, second, and third resist edges 114a, 114b, 114c displayed as highlighted lines or grouping of edge segments. If desired, a user can select a located wafer feature, such as the first resist edge 114a, to further highlight the feature and obtain various metrics associated with the located feature.” ¶ [0052]: “With reference between FIGS. 1 and 7, where the wafer 50 is well-centered during imaging of the top edge region 100, for example, and in the absence of other imaging deviations, the wafer edge 102 should be represented in the composite image 300 as a substantially straight line. However, where alignment errors occur, for example, where the wafer 50 is offset to some extent on the stage assembly 162, the wafer edge 102 will take a more sinusoidal shape in the composite image 300 as indicated generally in FIG. 7. In other words, the offset of some embodiments induces eccentricity in the imaging of the wafer edge 102, which results in the wafer edge 102 taking a more sinusoidal shape due to the fact that the wafer edge 102 according to the circularity of the wafer edge 102.” Also, see rejection of claim 12).
Thus, it would have been obvious to a person of ordinary skill in the art to have modified PAI to include: wherein, in the displaying of the graph on the monitor, points respectively corresponding to the multiple circumferential positions to indicate the edge position are displayed in colors corresponding to a size of the edge position.
The reason for doing so would have been to assist the user to have a better understanding the edge position and be able to react/adjust when necessary.
Regarding claim 5 (depends on claim 4), claim 5 is directed to the method implemented by the device of claim 16 and, as such, is rejected for the same reasons applied above in the rejection of claim 16.
Claims 8 and 19 are rejected under 35 U.S.C. 103 as being unpatentable over PAI et al. (US 2008/0013822, hereinafter “PAI”) in view of CARLSON et al. (Carlson A, Le T, Pai A, Hallen J, Rioux B. “Use of automated EBR metrology inspection to optimize the edge bead process.” Metrology, Inspection, and Process Control for Microlithography XXI 2007 Apr 5 (Vol. 6518, pp. 875-882). SPIE; hereinafter “CARLSON”) and LUQUE (US 20100211903), further in view of CARLSON et al. (US 2011/0054659, hereinafter “CARLSON ‘659”).
Regarding claim 19 (depends on claim 12), whereas PAI, CARLSON and LUQUE are not explicit as to, CARLSON ‘659 teaches:
an abnormality identifier configured to identify a type of abnormality (e.g., ¶ [0061]: “where a particular EBR line width has a standard deviation of greater than X and a concentricity of less than Y”) that exists between an edge shape obtained by the edge position at each of the multiple circumferential positions and a theoretical edge shape (e.g., ¶ [0060]: “a golden image”) (¶ [0059]: “In more general terms, then, the assessment at 210 can be any evaluation-type analysis performed on the extracted feature attribute that generates information indicative of one or more of a defect, near-defect, or fabrication processing deviation.” ¶ [0060]: “The criterion or other bases upon with the assessment is performed can assume a variety of forms. For example, the controller 158 can act upon user-inputted information relating to feature attribute, with the user information providing a quantification of an "acceptable" feature attribute (e.g., the manufacturer can designate a range within which a determined EBR mean line width must fall).” ¶ [0060]: “Even further, the controller 158 can be programmed to review a golden image or other information from which an assessment of the feature attribute can be based such as historical data.” ¶ [0061]: “In addition or as an alternative to an evaluation of whether the wafer is acceptable, the assessment at 210 can include correlating the extracted feature attribute(s) with yield information and/or fabrication processing step(s).” ¶ [0061]: “one, non-limiting example of this correlation is historical data suggesting that where a particular EBR line width has a standard deviation of greater than X and a concentricity of less than Y, component yield decreased by 3% compared with wafers not exhibiting theses same characteristics. Under these circumstances, then, where the extracted feature attributes of the current wafer being inspected include the particular EBR line width standard deviation being greater than X and a concentricity of less than Y, the assessment will determine that the wafer being inspected is likely to have decreased component yield at the end of fabrication. Other correlation factors or techniques are equally acceptable. Further, a plurality of different assessments can be performed.”); and
a countermeasure candidate determiner configured to determine, based on information in which the type of the abnormality is matched with a candidate for countermeasure to resolve the abnormality, a candidate for countermeasure according to an identification result of the type of the abnormality (¶ [0062]: “Following the assessment, information is generated relating to a status of the fabrication processing at 212. The generated information can assume a variety of forms and is a function of the assessment. Further, step 212 can include determining corrective action(s), if any, responsive to the assessment, as well as conveying and/or automatically implementing the corrective action(s).” ¶ [0063]: “Alternatively, where the assessment at 210 indicates that the wafer is defective, this condition is designated at 216. An evaluation is performed on the assessed defective condition at 218 to determine whether the defective condition is a random defect. If the defect is random ("yes" at 218), an evaluation of the defect is made to determine whether the wafer/substrate can be salvaged or repaired at 220. If the wafer/substrate can be repaired ("yes" at 220), the need for additional fabrication processing step(s), along with the existence, and optionally type, of the defect are conveyed (e.g., displayed on a display screen, printed in paper form, etc.) to a user at 222. In some embodiments, the generated information further includes the type and/or extent or remedial processing required or recommended is also conveyed to the user.” ¶ [0064]: “If the defect is determined to be non-random ("no" at 218), an evaluation is performed at 226 to estimate whether the defect is due to a random fabrication processing variation. In this regard, the evaluation of the fabrication processing in view of the defect can be performed on a variety of bases. For example, the controller 158 can be programmed to automatically designate that certain defects are due to non-random process variations,” ¶ [0064]: “Alternatively or additionally, the controller 158 can reference historical data and/or other extracted feature attributes to complete the evaluation. By reviewing the same feature attribute(s) of prior wafers, a processing drift can be recognized, for example, and deemed a non-random process variation (e.g., a progressively increasing EBR nominal line drift is indicative of an offset in handling equipment).” ¶ [0065]: “Conversely, if the process variation is determined to be non-random ("no" at 226), one or more fabrication processing step modifications are determined at 228 for correcting the process variation. The corrective processing modification(s) can be relative to processing steps before ("upstream") and/or after ("downstream") the current stage of fabrication of the wafer being inspected.” ¶ [0065]: “Depending upon the particular assessment, then, one or more of these EBR line-related processing steps may be fine-tuned or otherwise modified. For example, the assessment may determine that handling equipment has become misaligned, that optical equipment is operating a less-than optimal time periods, etc. In this regard, the controller 158 can be programmed to automatically correlate a particular feature attribute assessment result with a particular process parameter modification and/or to reference user-entered process correlations. Alternatively, the controller 158 can reference historical data to determine a process step and/or equipment likely to be the cause of a particular process variation, and iteratively determine a desirable process modification (e.g., via artificial intelligence, probabilistic statistical analysis, etc.). By implementing the process modification(s), then, future wafers fabricated by the fabrication processing will be less likely to exhibit the same concerns evidenced by the current wafer being inspected (a desired goal that can be "confirmed" by the controller 158 in monitoring or inspecting future wafers).”),
wherein the information display, on the monitor, displays the identification result of the type of the abnormality (e.g., ¶ [0059]: “generates information indicative of one or more of a defect, near-defect,” ¶ [0063]: “the existence, and optionally type, of the defect are conveyed (e.g., displayed on a display screen” ¶ [0063]: “wafer/substrate cannot be repaired”) and a determination result of the candidate for countermeasure (¶ [0059]: “the assessment at 210 can be any evaluation-type analysis performed on the extracted feature attribute that generates information indicative of one or more of a defect, near-defect, or fabrication processing deviation.” ¶ [0063]: “If the wafer/substrate can be repaired ("yes" at 220), the need for additional fabrication processing step(s), along with the existence, and optionally type, of the defect are conveyed (e.g., displayed on a display screen, printed in paper form, etc.) to a user at 222. In some embodiments, the generated information further includes the type and/or extent or remedial processing required or recommended is also conveyed to the user. Conversely, where it is determined that the wafer/substrate cannot be repaired and/or that the likely component yield will fall below a cost-effectively level ("no" at 220), an indication that the wafer/substrate should be scrapped is provided at 224.” ¶ [0067]: “The so-generated process modification(s) can be effectuated in one or more fashions. In some embodiments, the process modification(s) are delivered to a user (e.g., displayed on a screen, printed instructions, etc.), with the user then assuming responsibility for reviewing and causing the suggested or recommended modification(s) to be implemented.”).
Thus, in order to obtain a more versatile display device having the cumulative features and/or functionalities taught by PAI, CARLSON, LUQUE and CARLSON ‘659, it would have been obvious to one of ordinary skill in the art to have modified the display device taught by the combination of PAI, CARLSON and LUQUE so as to also incorporate identifying a type of abnormality that exists between an edge shape obtained by the edge position at each of the multiple circumferential positions and a theoretical edge shape, determining, based on information in which the type of the abnormality is matched with a candidate for countermeasure to resolve the abnormality, a candidate for countermeasure according to an identification result of the type of the abnormality, and displaying the identification result of the type of the abnormality and a determination result of the candidate for countermeasure, as taught by CARLSON ‘659.
Regarding claim 8 (depends on claim 1), claim 8 is directed to the method implemented by the device of claim 19 and, as such, is rejected for the same reasons applied above in the rejection of claim 19.
Allowable Subject Matter
In the last Office Action, claims 7 and 18 were objected to as being dependent upon a rejected base claim. Claims 7 and 18 have been rewritten into independent form including all the limitations of the base claim. Thus, claims 7 and 18 are allowed.
Claims 9 and 20 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Response to Arguments
Applicant's arguments filed on July 7, 2026, with respect to independent claims 1 and 12 and dependent claims 2-6, 8, 10-11, 13-17 and 19 have been considered but are moot in view of the new ground(s) of rejection.
Conclusion
At present, it is not apparent to the examiner which part of the application could serve as a basis for new and allowable claims. However, should the applicant nevertheless regard some particular matter as patentable, the examiner encourages applicant to appropriately amend the claims to include such matter and to indicate in the REMARKS the difference(s) between the prior art and the claimed invention as well as the significance thereof.
Furthermore, should applicant decide to amend the claims, examiner respectfully requests that the applicant please indicate in the REMARKS from which page(s), line(s) or claim(s) of the originally filed application that any amendments are derived. See MPEP § 2163(II)(A) (There is a strong presumption that an adequate written description of the claimed invention is present in the specification as filed, Wertheim, 541 F.2d at 262, 191 USPQ at 96; however, with respect to newly added or amended claims, applicant should show support in the original disclosure for the new or amended claims.).
Action is Final
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Contact Information
Any inquiry concerning this communication or earlier communications from the examiner should be directed to VINCENT PEREN who can be reached by telephone at (571) 270-7781, or via email at vincent.peren@uspto.gov. The examiner can normally be reached on Monday-Friday from 10:00 A.M. to 6:00 P.M.
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/VINCENT PEREN/
Examiner, Art Unit 2617
/KING Y POON/Supervisory Patent Examiner, Art Unit 2617
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