Notice of Pre-AIA or AIA Status
1. The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Detailed Action
2. This office action is in response to the filing with the office dated 10/15/2024.
Information Disclosure Statement
3. The information disclosure statement (IDS) submitted on 10/15/2024 is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner.
Claim Rejections – 35 U.S.C. 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
4. Claims 1-7, 12, 19 and 20 are rejected under 35 U.S.C. 102 (a) (1) as being anticipated by Tosi et al (US 2009/0284736 A1).
Regarding independent claim 1, Tosi et al (US 2009/0284736 A1) teaches, A test module configured to test the performance of an image sensor (optical chip 260, as shown in figure 2A, 2b) the test module (figures 2A, 2B, paragraphs [0023]- [0026]) comprising:
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a test board having an area greater than an area of the image sensor and configured to be coupled to the image sensor (paragraphs [0024], [0025], figures 2A, 2B) and a connector electrically connected to the image sensor and configured to transmit an electrical signal received from the image sensor to a test socket (pin connectors (230) to provide an electrical interface to the IC chip (260), paragraph [0024]) wherein the test board comprises: a dummy region of which an outer perimeter corresponds to a perimeter of the test board, the dummy region configured to be electrically cut off from the image sensor (figures 2A, 2B) and a cut-off region corresponding to an inner perimeter of the dummy region, between the dummy region and the image sensor, and configured to electrically cut off the dummy region from the image sensor (figures 2A, 2B, 3A, 3Bparagraphs [0023]- [0026], [0042, [0043]).
Regarding dependent claim 2, Tosi et al (US 2009/0284736 A1) teaches, the test module of claim 1.
Tosi et al (US 2009/0284736 A1) further teaches, wherein the test board further comprises a printed circuit board (PCB) region corresponding to an inner perimeter of the cut-off region and configured to be coupled to the image sensor (figures 2A, 2B, paragraphs [0036]).
Regarding dependent claim 3, Tosi et al (US 2009/0284736 A1) teaches, the test module of claim 2.
Tosi et al (US 2009/0284736 A1) further teaches, wherein an area of the PCB region is based on the area of the image sensor (figures 2A, 2B, paragraphs [0025], [0037], [0038]).
Regarding dependent claim 4, Tosi et al (US 2009/0284736 A1) teaches, the test module of claim 2.
Tosi et al (US 2009/0284736 A1) further teaches, wherein the PCB region comprises the image sensor and at least one passive element from among a plurality of passive elements included in an electronic device to which the image sensor is configured to be applied ([0039] In other exemplary embodiments of the invention, electronic devices such as capacitors, resistors, driver circuits, and other electronic devices or circuits may be electrically mounted on the package body (210). These components may provide the necessary off-chip circuits for testing/operating the IC chip (260), provide the necessary impedance matching networks, or provide other functions necessary or desired for testing the IC chip (260)).
Regarding dependent claim 5, Tosi et al (US 2009/0284736 A1) teaches, the test module of claim 2.
Tosi et al (US 2009/0284736 A1) further teaches, further comprising: a flexible printed circuit board (FPCB) electrically connected to the connector and configured to receive and transmit an image signal generated by the image sensor, the receiving and transmitting being from and to the connector (figures 2A, 2B, paragraphs [0024], [0038], [0042], [0043]).
Regarding dependent claim 6, Tosi et al (US 2009/0284736 A1) teaches, the test module of claim 2.
Tosi et al (US 2009/0284736 A1) further teaches, wherein the cut-off region is between the dummy region and the PCB region (figures 2A, 2B, paragraphs [0025], [0036]).
Regarding dependent claim 7, Tosi et al (US 2009/0284736 A1) teaches, the test module of claim 2.
Tosi et al (US 2009/0284736 A1) further teaches, wherein the cut-off region is configured to electrically cut off the dummy region from the PCB region (figures 2A, 2B, 3A, 3Bparagraphs [0023]- [0026], [0042, [0043]).
Regarding independent claim 12, Tosi et al (US 2009/0284736 A1) teaches, A test system comprising: a first test module comprising a first test board ([0024] The package apparatus (200) comprises a package body (210)) and configured to be coupled to a first image sensor (optical chip 260, as shown in figure 2A, 2b, paragraphs [0023]-[0026])) through the first test board, the
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first sensor having a first area (paragraphs [0024], [0025], figures 2A, 2B); and a test socket comprising a coupling region having a recessed structure corresponding to a shape of the first test module, and configured to be coupled to the first test module through the coupling region (pin connectors (230) to provide an electrical interface to
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the IC chip (260), paragraph [0024]), wherein the first test board comprises: a first dummy region corresponding to a perimeter of the first test board, a first printed circuit board (PCB) region configured to be coupled to the first image sensor, and a first cut-off region between the first dummy region and the first PCB region and configured to electrically cut off the first dummy region from the first PCB region (figures 2A, 2B, 3A, 3B, paragraphs [0023]-[0026], [0042, [0043]).
Regarding independent claim 19, Tosi et al (US 2009/0284736 A1) teaches A test module configured to test the performance of an image sensor ([0024] The package apparatus (200) comprises a package body (210)), the test module comprising: a test board having an area
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greater than an area of the image sensor and configured to be coupled to the image sensor (figures 2A, 2B, 3A, 3B, paragraphs [0023]-[0026], [0042, [0043]); and a connector electrically connected to the image sensor and configured to transmit an electrical signal received from the image sensor to a test socket
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(pin connectors (230) to provide an electrical interface to the IC chip (260), paragraph [0024]), wherein the test board comprises: a printed circuit board (PCB) region configured to be coupled to the image sensor; and a cut-off region configured to electrically cut off the PCB region from the other region of the test board than the PCB region (figures 2A, 2B, paragraphs [0035]-[0038]).
Regarding dependent claim 20, Tosi et al (US 2009/0284736 A1) teaches, the test module of claim 19.
Tosi et al (US 2009/0284736 A1) further teaches, wherein the PCB region comprises the image sensor and at least one passive element among a plurality of passive elements included in an electronic device to which the image sensor is applied ([0039] In other exemplary embodiments of the invention, electronic devices such as capacitors, resistors, driver circuits, and other electronic devices or circuits may be electrically mounted on the package body (210). These components may provide the necessary off-chip circuits for testing/operating the IC chip (260), provide the necessary impedance matching networks, or provide other functions necessary or desired for testing the IC chip (260)). [0043] In other exemplary embodiments of the invention such as depicted in FIG. 3B, optical testing of the chip can be performed using a laser beam (350) to irradiate certain points of interest within the chip (260) through the mounting plate (220) and through the back side of the chip (260), and then determine the electrical response of circuit components by measuring internal electrical signals of the chip (260) via the electrical interface provided by the package body (210). The response to the incident photons are measured by the testing device to which the chip (260) is connected. The incident photons may be generated either synchronously or asynchronously with the chip operation and testing procedure).
Claim Rejections – 35 U.S.C. 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
5. Claim 8 is rejected under 35 U.S.C. 103 as being unpatentable over Tosi et al (US 2009/0284736 A1) and in view of Kim et al (US 12429519 B2, priority date 11/04/2022).
Regarding dependent claim 8, Tosi et al (US 2009/0284736 A1) teaches, the test module of claim 2.
Tosi et al (US 20090284736 A1) further teaches, ([0034] In other exemplary embodiments of the invention, the chip (260) may be bonded to the mounting plate (220) using a layer of bonding material, such as specific glue, which acts as a matching index material to improve the collection efficiency of the photons emitted from the back side (261) of the chip. Indeed, as discussed below with reference to FIG. 4B, the use of a matching index material having an index of refraction, n.sub.M, between the index of refraction, n.sub.si, of the substrate material forming of the chip (260) and the index of refraction, n.sub.g, of the material forming the mounting plate (220), will raise the transmittance of light through the mounting plate (220) toward collection lenses during optical testing).
Tosi et al (US 20090284736 A1) is silent about an infrared cut filter configured to block infrared rays.
Kim et al (US 12429519 B2, priority date 11/04/2022) teaches, Image sensors, as semiconductor devices that have the function of taking images of people or objects, are used as an essential component of major information and communication equipment, such as smartphones, automobile driving assistance systems, autonomous driving cars, and network cameras, and their market size is steadily growing. These image sensors are configured in the form of camera modules and are mounted on such equipment. Such a camera module is composed of a lens, a holder, an infrared (IR) filter, an image sensor, and a printed circuit board (PCB). In the camera module, the lens forms an image, the image formed by the lens is focused on the image sensor through the IR filter, and the image sensor captures the image by converting the optical signal of the image into an electric signal (lines 20-35, column 1).
Therefore, it would have been obvious to one of the ordinary skill in the art before the effective filing date of the claimed invention, to have modified the teachings of Tosi et al by providing a layer for filtering the infrared light as taught by Kim et al (lines 20-35, column 1).
One of the ordinary skill in the art would have been motivated to make such a modification so that the infrared component of the signal can be filtered out, as taught by Kim et al (lines 20-35, column 1).
6. Claims 9-11, 13-18 is rejected under 35 U.S.C. 103 as being unpatentable over Tosi et al (US 2009/0284736 A1).
Regarding dependent claim 9, Tosi et al (US 2009/0284736 A1) teaches, the test module of claim 1.
Tosi et al further teaches, ([0037] With the IC chip (260) mounted on the mounting plate (220), wire bonds can be formed between bond pads on the front side (262) surface of the chip (260) and bond pads or wires formed on the bottom surface (S2) of the package body (210). It is preferable to minimize the length of the wirebonds. Therefore, the size of the aperture (240) should be formed as small as possible based on the dimensions of the IC chip (260). Moreover, the bonding wires should not make contact with the package body (210) and thus, the package body (210) should be formed as thin as possible around the aperture (240). It is further desirable for the starting and finishing points of the wire bonding to be close together in terms of distance and altitude. Thus, in other exemplary embodiments of the invention, the package structure (200) can be designed such that the front side (262) surface of the chip (260) and bond pads formed on the package body (210) are substantially coplanar (on the same level)).
Regarding the limitation, “wherein each of lengths of the test board in a first direction and in a second direction perpendicular to the first direction is 2.54 cm or less”, Tosi et al discloses the claimed invention except for the dimensions of the test board.
Therefore, it would have been an obvious matter of design choice to choose the test board dimensions, since such a modification would have involved a mere change in the size of a component. A change in size is generally recognized as being within the level of ordinary skill in the art. In re Rose, 105 USPQ 237 (CCPA 1955).
Regarding dependent claim 10, Tosi et al (US 2009/0284736 A1) teaches, the test module of claim 1.
Tosi et al (US 2009/0284736 A1) further teaches, further comprising: a barrel on top of the test board and configured to allow a lens applied to an electronic device to which the image sensor is applied to be detachable ([0045] It is to be appreciated that packaging structures according to exemplary embodiments of the invention may be implemented with Solid Immersion Lens (SIL) systems, which can be used for increasing the numeric aperture of the optical system that collects the photons emitted from the back side (261) of the chip (260). SIL lenses can be applied directly to the transparent mounting plates on the surface opposite the surface on which the IC chip is mounted. Instead of SIL lenses, liquid immersion lenses may be employed since the liquid only contacts the surface of the mounting plate opposite the surface on which the chip is mounted. [0046] FIGS. 4A and 4B are diagrams that schematically depict the photon collection efficiency for an exemplary packaging apparatus. In particular, FIG. 4A depicts photon collection efficiency with respect to an objective lens (400) with an air gap (410) present between the mounting plate (220) and the back side (261) surface of the IC chip (260). FIG. 4B depicts photon detection efficiency of the objective lens (400) when a layer (420) of matching material is disposed between the mounting plate (220) and the back side (261) surface of the IC chip (260)).
Tosi et al does not explicitly teach a barrel shape but teaches a mounting plate. However, the shape of the mounting plate is a mere design choice. Please see MPEP 2144.04 IV.B.
Therefore, it would have been an obvious matter of design choice to choose the shape of the mounting plate, as per the design choice and requirement.
Regarding dependent claim 11, Tosi et al (US 2009/0284736 A1) teaches, the test module of claim 10.
Tosi et al (US 2009/0284736 A1) further teaches, the lens, wherein the lens is attached to the barrel ([0045] It is to be appreciated that packaging structures according to exemplary embodiments of the invention may be implemented with Solid Immersion Lens (SIL) systems, which can be used for increasing the numeric aperture of the optical system that collects the photons emitted from the back side (261) of the chip (260). SIL lenses can be applied directly to the transparent mounting plates on the surface opposite the surface on which the IC chip is mounted. Instead of SIL lenses, liquid immersion lenses may be employed since the liquid only contacts the surface of the mounting plate opposite the surface on which the chip is mounted. [0046] FIGS. 4A and 4B are diagrams that schematically depict the photon collection efficiency for an exemplary packaging apparatus. In particular, FIG. 4A depicts photon collection efficiency with respect to an objective lens (400) with an air gap (410) present between the mounting plate (220) and the back side (261) surface of the IC chip (260). FIG. 4B depicts photon detection efficiency of the objective lens (400) when a layer (420) of matching material is disposed between the mounting plate (220) and the back side (261) surface of the IC chip (260)).
Tosi et al does not explicitly teach a barrel shape but teaches a mounting plate. However, the shape of the mounting plate is a mere design choice. Please see MPEP 2144.04 IV.B.
Therefore, it would have been an obvious matter of design choice to choose the shape of the mounting plate, as per the design choice and requirement for mounting the lens.
Regarding dependent claim 13, Tosi et al (US 2009/0284736 A1) teaches, The test system of claim 12.
Tosi et al (US 2009/0284736 A1) further teaches, wherein the test socket is configured to be coupled to a second test module coupled to a second image sensor through the coupling region, the second image sensor having a second area different from the first area (please see the rejection for claims 1 and 12).
Second test module would result in a mere duplication of parts.
“Mere duplication of parts has no patentable significance unless a new and unexpected result is produced” MPEP 2144.04 VI.B. In re Harza, 274 F.2d 669, 124 USPQ 378 (CCPA 1960).
Regarding dependent claim 14, Tosi et al (US 20090284736 A1) teaches, The test system of claim 13.
Tosi et al (US 20090284736 A1) further teaches, a second test board, wherein the second test module is configured to be coupled to the second image sensor through the second test board, and wherein the second test board comprises: a second dummy region corresponding to a perimeter of the second test board; a second PCB region configured to be couple d to the second image sensor, and a second cut-off region between the second dummy region and the second PCB region and configured to electrically cut off the second dummy region from the second PCB region (please see the rejection for claims 1 and 12).
Second test module, second image sensor, second dummy and cut-off regions would result in a mere duplication of parts.
“Mere duplication of parts has no patentable significance unless a new and unexpected result is produced” MPEP 2144.04 VI.B. In re Harza, 274 F.2d 669, 124 USPQ 378 (CCPA 1960).
Regarding dependent claim 15 and 16, Tosi et al (US 20090284736 A1) teaches, the test system of claim 14.
Tosi et al (US 20090284736 A1) further teaches, wherein the first PCB region and the second PCB region are different from each other in at least one of an area or a shape; wherein the first test board and the second test board have a same area and a same shape ([0037] With the IC chip (260) mounted on the mounting plate (220), wire bonds can be formed between bond pads on the front side (262) surface of the chip (260) and bond pads or wires formed on the bottom surface (S2) of the package body (210). It is preferable to minimize the length of the wirebonds. Therefore, the size of the aperture (240) should be formed as small as possible based on the dimensions of the IC chip (260). Moreover, the bonding wires should not make contact with the package body (210) and thus, the package body (210) should be formed as thin as possible around the aperture (240). It is further desirable for the starting and finishing points of the wire bonding to be close together in terms of distance and altitude. Thus, in other exemplary embodiments of the invention, the package structure (200) can be designed such that the front side (262) surface of the chip (260) and bond pads formed on the package body (210) are substantially coplanar (on the same level)).
Therefore, it would have been an obvious matter of design choice to choose the test board dimensions and shape, since such a modification would have involved a mere change in the size/shape of a component. A change in size/shape is generally recognized as being within the level of ordinary skill in the art. Please see MPEP 2144.IV.A and B.
Regarding dependent claim 17, Tosi et al (US 20090284736 A1) teaches, the test system of claim 13.
Tosi et al (US 20090284736 A1) further teaches, further comprising: a barrel configured to allow a first lens applied to an electronic device to which the first image sensor is applied to be detachable ([0045] It is to be appreciated that packaging structures according to exemplary embodiments of the invention may be implemented with Solid Immersion Lens (SIL) systems, which can be used for increasing the numeric aperture of the optical system that collects the photons emitted from the back side (261) of the chip (260). SIL lenses can be applied directly to the transparent mounting plates on the surface opposite the surface on which the IC chip is mounted. Instead of SIL lenses, liquid immersion lenses may be employed since the liquid only contacts the surface of the mounting plate opposite the surface on which the chip is mounted. [0046] FIGS. 4A and 4B are diagrams that schematically depict the photon collection efficiency for an exemplary packaging apparatus. In particular, FIG. 4A depicts photon collection efficiency with respect to an objective lens (400) with an air gap (410) present between the mounting plate (220) and the back side (261) surface of the IC chip (260). FIG. 4B depicts photon detection efficiency of the objective lens (400) when a layer (420) of matching material is disposed between the mounting plate (220) and the back side (261) surface of the IC chip (260)).
Tosi et al does not explicitly teach a barrel shape but teaches a mounting plate. However, the shape of the mounting plate is a mere design choice. Please see MPEP 2144.04 IV.B.
Therefore, it would have been an obvious matter of design choice to choose the shape of the mounting plate, as per the design choice and requirement.
Regarding dependent claim 18, Tosi et al (US 2009/0284736 A1) teaches, the test system of claim 17.
Tosi et al (US 2009/0284736 A1) further teaches, wherein the barrel is configured to allow a second lens different from the first lens and applied to an electronic device to which the second image sensor is applied to be detachable, ([0045] It is to be appreciated that packaging structures according to exemplary embodiments of the invention may be implemented with Solid Immersion Lens (SIL) systems, which can be used for increasing the numeric aperture of the optical system that collects the photons emitted from the back side (261) of the chip (260). SIL lenses can be applied directly to the transparent mounting plates on the surface opposite the surface on which the IC chip is mounted. Instead of SIL lenses, liquid immersion lenses may be employed since the liquid only contacts the surface of the mounting plate opposite the surface on which the chip is mounted. [0046] FIGS. 4A and 4B are diagrams that schematically depict the photon collection efficiency for an exemplary packaging apparatus. In particular, FIG. 4A depicts photon collection efficiency with respect to an objective lens (400) with an air gap (410) present between the mounting plate (220) and the back side (261) surface of the IC chip (260). FIG. 4B depicts photon detection efficiency of the objective lens (400) when a layer (420) of matching material is disposed between the mounting plate (220) and the back side (261) surface of the IC chip (260)).
Second lens would result in a mere duplication of parts.
“Mere duplication of parts has no patentable significance unless a new and unexpected result is produced” MPEP 2144.04 VI.B. In re Harza, 274 F.2d 669, 124 USPQ 378 (CCPA 1960).
Closest Prior art
7. The following relevant prior art of record is not cited in the office action.
Jeong et al (US 2023/0047664 A1) teaches, A testing system for testing an image sensor, includes a probe card, a pogo block receiving output signals of the probe card, an interface board configured to receive output signals of the pogo block, convert the received output signals of the pogo block, and output the converted signals through a cable, and a testing apparatus connected to the interface board through the cable. The testing apparatus is configured to test the device under test through signals received through the cable. The interface board includes an active interface module configured to amplify the received output signals of the pogo block, convert the amplified signals into signals having a same frequency as the received output signals of the pogo block, and transmit the converted signals to the cable.
Go (US 2008/0143871 A1) teaches, A camera module having a ground dummy board, the camera module including: a lens holder having at least one lens; an image sensor having an image region where light passed through the lens is imaged; a board having the image sensor mounted at one side assembled to a lower surface of the lens holder; and a ground dummy board disposed on an outer surface of the board to electrically connect to ground via holes exposed to the outer surface of the board. The camera module minimally experiences electromagnetic interference and electrostatic discharge, thereby improved in electrical properties thereof.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to SURESH RAJAPUTRA whose telephone number is (571) 270-0477. The examiner can normally be reached between 8:00 AM - 5:00 PM.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, EMAN ALKAFAWI can be reached on 571-272-4448. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/SURESH K RAJAPUTRA/Examiner, Art Unit 2858
/EMAN A ALKAFAWI/Supervisory Patent Examiner, Art Unit 2858 9/2/2026
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