DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Applicant’s election without traverse of Invention I, claims 1-11, in the reply filed on 01 July 2026 is acknowledged.
Claims 12-26 are withdrawn from further consideration pursuant to 37 CFR 1.142(b) as being drawn to a nonelected invention, there being no allowable generic or linking claim. Election was made without traverse in the reply filed on 01 July 2026.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 1-11 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
The term “around” in claims 1-2 and 4 is a relative term which renders the claims indefinite. The term “around” is not defined by the claim, the specification does not provide a standard for ascertaining the requisite degree, and one of ordinary skill in the art would not be reasonably apprised of the scope of the invention.
Independent claim 1, for example, recites “a first insulating layer around side surfaces of the first semiconductor layer…” in lines 8-9 of the claim. Using well-known definitions of the term around, it is unclear whether the first insulating layer is in the vicinity of the layer or surrounds the layers. For purposes of examination, the Examiner interprets the term around to mean “in the vicinity of”.
Due to their dependencies upon independent claim 1, claims 2-11 are also deemed indefinite.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claims 1-9 and 11 are rejected under 35 U.S.C. 102(a)(1)/(a)(2) as being anticipated by Moon (US 2023/0138336).
Regarding independent claim 1, Moon teaches a light emitting element comprising a first semiconductor layer (Fig. 13E, Element 152d; ¶ [0173]); a second semiconductor layer (Fig. 13E, Element 152; ¶ [0108]) on the first semiconductor layer; a light emitting layer (Fig. 13E, 152b; ¶ [0108]) on the second semiconductor layer; a third semiconductor layer (Fig. 13E, Element 152c; ¶ [0108]) on the light emitting layer; an element electrode layer (Fig. 13E, Element 154T; ¶ [0175]) on the third semiconductor layer; a connection electrode (Fig. 13E, Element 154b; ¶ [0109]) on the element electrode layer; a first insulating layer (Fig. 13E, Element 156/302; ¶ [0107]) around side surfaces of the first semiconductor layer and the second semiconductor layer; a contact electrode (Fig. 13H, Element 290; ¶ [0150]) around a side surface of the first insulating layer and the side surface of the second semiconductor layer; and a second insulating layer (Fig. 13H, Element 303; ¶ [0153]) around the side surface of the second semiconductor layer, and side surfaces of the light emitting layer, the third semiconductor layer, the element electrode layer, and the connection electrode, wherein the contact electrode is in contact with the side surface of the second semiconductor layer (Fig. 13H).
Regarding claim 2, Moon teaches the first insulating layer around an entirety of the side surface of the first semiconductor layer and a portion of the side surface of the second semiconductor layer (Fig. 13E).
Regarding claim 3, Moon teaches the contact electrode not in contact with the first semiconductor layer (Fig. 13H).
Regarding claim 4, Moon teaches the second insulating layer around a side surface of the contact electrode and not in contact with the first insulating layer (Fig. 13H).
Regarding claim 5, Moon teaches a contact area in which the contact electrode and the second semiconductor layer are in contact with each other, wherein the contact area is located in an area ranging from 1 to 90% of a length of the second semiconductor layer from an interface between the first semiconductor layer and the second semiconductor layer (Fig. 13H; ¶ [0156]).
Regarding claim 6, Moon teaches the contact area ranging from 1 to 90% of a total area of the side surface of the second semiconductor layer (Fig. 13H; ¶ [0156]).
Regarding claim 7, Moon teaches the side surface of the first insulating layer, a side surface of the contact electrode, and a side surface of the second insulating layer aligned with each other (Fig. 13H).
Regarding claim 8, Moon teaches the first insulating layer (Fig. 13H, Element 302; ¶ [0152]) not in contact with the second semiconductor layer (Fig. 13H).
Regarding claim 9, Moon teaches the second insulating layer not in contact with a first side surface of the contact electrode and aligned with a second side surface of the contact electrode (Fig. 13H).
Regarding claim 11, Moon teaches the first semiconductor layer comprising an undoped semiconductor (¶ [0173]), the second semiconductor layer comprises an N-type semiconductor (¶ [0108]), and the third semiconductor layer comprises a P-type semiconductor (¶ [0108]).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claim 10 is rejected under 35 U.S.C. 103 as being unpatentable over Moon (US 2023/0138336) in view of Choi (US 2022/0352246).
Regarding claim 10, Moon teaches the limitations of independent claim 1 discussed earlier but fails to exemplify a reflective layer around a side surface of the second insulating layer, wherein a side surface of the reflective layer is aligned with a side surface of the contact electrode.
Choi teaches a light emitting element comprising a reflective layer (Fig. 5, Element RF1; ¶ [0106]) around a side surface of a second insulating layer (Fig. 5, Element INS1; ¶ [0106]), wherein a side surface of the reflective layer is aligned with a side surface of a contact electrode (Fig. 5, Element CME; ¶ [0106]). Choi discloses the reflective layer being provided for reflecting light beams from the light-emitting element upward, thereby preventing a mixture of light beams into adjacent light-emitting areas (¶s [0132]-[0133]).
Therefore, it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to provide the reflective layer taught by Choi in the light-emitting element of Moon for preventing a mixture of light beams into adjacent light-emitting areas.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Jang (US 12,250,841) teaches a light emitting device package with a molding layer surrounding a light emitting source. Jang (US 2024/0088197) teaches an LED chip with multiple LED sub-units. Park (US 2023/0135600) teaches a light emitting element with an insulating layer surrounding the light emitting element.
Contact Information
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Kevin Quarterman whose telephone number is (571)272-2461. The examiner can normally be reached Monday-Friday, 10am-6pm.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, James Greece can be reached at (571) 272-3711. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/Kevin Quarterman/Primary Examiner, Art Unit 2875 16 September 2026
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