Notice of Pre-AIA or AIA Status
1. The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Detailed Action
2. This office action is in response to the filing with the office dated 10/16/2024.
Information Disclosure Statement
3. The information disclosure statements (IDS) submitted on 10/16/2024 is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner.
Claim Rejections – 35 U.S.C. 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
4. Claims 1-16 are rejected under 35 U.S.C. 102 (a) (1) as being anticipated by Chaji et al (US 2014/0329339 A1).
Regarding independent claim 1, Chaji et al (US 2014/0329339 A1) teaches, A micro-integrated circuit (µIC) detection method applicable for detecting a plurality of µICs on a panel (figure 1, paragraph [0092], [0093]), the detection method comprising: turning on the µICs
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arranged in columns and rows on the panel (figure 1-3, paragraphs [0049]-[0056]); scanning the µICs in each of the columns in sequence to obtain a total current of the µICs in each of the columns [0085], [0086]); and determining that at least one of the µICs in one of the columns is abnormal in response to the total current of the µICs in the one of the columns not matching a preset total current ([0168] For defects that cannot be directly identified by a single measurement of the inspection system, the first measurement can reveal that a problem exists, and specify additional tests that will conclusively identify the exact defect. One example is the identification of line defects, which can be detected by any of the following procedures: [0169] 1. Measuring the current of different lines: if the current is higher than a threshold, the pixel is shorted. [0170] 2. Applying pulse to measure the charge transfer: if the amount of charge transfer is smaller than a threshold, the line is open. [0171] 3. For a signal with connection to DC current (e.g., Vdd and Vmonitor), the current can be measured to detect the open defect. [0172] Defects in the thin film transistors (TFTs) can also be detected. For example, in the situation where the pixel circuit in FIG. 24 has a signal WR measured as high (while Vdata=high, and also while Vdata=low, and Vdd=high), an additional test needs to be performed. Table 1 shows the different conditions and what the results mean. [0188] The detailed scan can be optimized based on the results of the quick scan. For example, if the quick scan has not detected any line defects, the line tests can be
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avoided in the detailed scan. [0189] In the quick scan, one (or more than one) voltage or one (or more than one) current from a pixel is measured. If the measured values of a pixel are within acceptable ranges, the pixel passes the quick scan. If the measured values of a pixel are outside the acceptable range the pixel is tagged as faulty. [0190] The measured voltages or currents are preferably affected by most of the possible defects. For example, the current supplied to a light emissive element and/or the voltage at the connection between a pixel circuit and an emissive element are good candidates for the quick scan measurement. [0191] One example of a quick scan begins by defining a reference current or voltage that is the lowest level encountered in a normal pixel. Alternatively, the reference current or voltage may be lower than the lowest level encountered in a normal pixel, by a defined margin. The measured pixel current or voltage is then compared with the reference level. If the measured value is larger than the reference value, the pixel passes this test. If the measured level is smaller than the reference level, the pixel fails this test. The result of the test can be different based on the measured parameter. For example, if the measured value is the drive TFT current, the TFT can be open, whereas if the measured value is the OLED current, the OLED can be shorted. [0192] Alternatively, the pixel may pass the test if the measured value is smaller than the reference value. If the measured level is larger than the reference level, the pixel fails this test. Here again, the result of the test can be different based on the measured parameter. For example, if the measured value is the drive TFT current, the TFT can be open, whereas if the measured value is the OLED current, the OLED can be shorted).
Regarding dependent claim 2, Chaji et al (US 2014/0329339 A1) teaches the detection method of claim 1.
Chaji et al (US 2014/0329339 A1) further teaches, wherein in response to determining that the at least one of the µICs in the one of the columns is abnormal, the detection method further comprises: scanning the one of the columns where the total current of the µICs in the one of the columns does not match the preset total current (paragraphs [0188]-[0192]); turning on each of the µICs in the one of the columns in sequence to obtain a driving current of each of the µICs in the one of the columns (paragraphs [0188]-[0192]); and determining that one of the µICs in the one of the columns is abnormal in response to the driving current of each of the µICs in the one of the columns not matching a preset driving current ([0188] The detailed scan can be optimized based on the results of the quick scan. For example, if the quick scan has not detected any line defects, the line tests can be avoided in the detailed scan. [0189] In the quick scan, one (or more than one) voltage or one (or more than one) current from a pixel is measured. If the measured values of a pixel are within acceptable ranges, the pixel passes the quick scan. If the measured values of a pixel are outside the acceptable range the pixel is tagged as faulty. [0190] The measured voltages or currents are preferably affected by most of the possible defects. For example, the current supplied to a light emissive element and/or the voltage at the connection between a pixel circuit and an emissive element are good candidates for the quick scan measurement. [0191] One example of a quick scan begins by defining a reference current or voltage that is the lowest level encountered in a normal pixel. Alternatively, the reference current or voltage may be lower than the lowest level encountered in a normal pixel, by a defined margin. The measured pixel current or voltage is then compared with the reference level. If the measured value is larger than the reference value, the pixel passes this test. If the measured level is smaller than the reference level, the pixel fails this test. The result of the test can be different based on the measured parameter. For example, if the measured value is the drive TFT current, the TFT can be open, whereas if the measured value is the OLED current, the OLED can be shorted. [0192] Alternatively, the pixel may pass the test if the measured value is smaller than the reference value. If the measured level is larger than the reference level, the pixel fails this test. Here again, the result of the test can be different based on the measured parameter. For example, if the measured value is the drive TFT current, the TFT can be open, whereas if the measured value is the OLED current, the OLED can be shorted).
Regarding dependent claim 3, Chaji et al (US 2014/0329339 A1) teaches the detection method of claim 1.
Chaji et al (US 2014/0329339 A1) further teaches, wherein the panel comprises at least two areas, and in response to determining that the at least one of the µICs in one of the columns is abnormal (paragraphs [0188]-[0192]), the detection method further comprises: scanning the one of the columns where the total current of the µICs in the one of the columns does not match the preset total current (paragraphs [0188]-[0192]); turning on the µICs respectively located in the at least two areas in the one of the columns in sequence to obtain at least two area total currents (paragraphs [0188]-[0192]); determining that an abnormality has occurred in one of the at least two areas in response to the at least two area total currents of the at least two areas not matching a preset area total current (paragraphs [0188]-[0192]); turning on the µICs respectively located in at least two sub-areas of the one of the at least two areas to obtain at least two sub-area total currents; and determining that the abnormality has occurred in one of the at least two sub-areas in response to the at least two sub-area total currents of the at least two sub-areas not matching a preset sub-area total current (paragraphs [0188]-[0192])
Regarding dependent claim 4, Chaji et al (US 2014/0329339 A1) teaches the detection method of claim 1.
Chaji et al (US 2014/0329339 A1) further teaches, wherein each of the µICs comprises a plurality of sub-pixel pins, each of the sub-pixel pins comprises a positive terminal and a negative terminal, and the positive terminal and the negative terminal are configured to be connected to a sub-pixel (paragraphs [0092]-[0094]), the detection method further comprises: turning on the sub-pixel connected to each of the sub-pixel pins and each of the µICs to determine whether the sub-pixel connected to each of the sub-pixel pins is lit or not (paragraphs [0188]-[0192]); providing a ground potential to a negative terminal of an unlit sub-pixel connected to one of the sub-pixel pins, and providing an on potential to a positive terminal of the unlit sub-pixel connected to the one of the sub-pixel pins (paragraphs [0188]-[0192]); turning on a corresponding one of the µICs for driving the unlit sub-pixel, wherein when the unlit sub-pixel is still not lit, determining that the unlit sub-pixel is abnormal (paragraphs [0188]-[0192]); and turning off the corresponding one of the µICs for driving the unlit sub-pixel, wherein when the unlit sub-pixel is lit, determining that the corresponding one of the µICs is abnormal (paragraphs [0188]-[0192]).
Regarding independent claim 5, Chaji et al (US 2014/0329339 A1) teaches, A micro-integrated circuit (µIC) detection system applicable for detecting a plurality of µICs arranged in columns and rows on a panel (figure 1, paragraph [0092], [0093]), the detection system comprising: a controller electrically connected to the µICs and configured to provide a scanning signal so as to scan the µICs in each of the columns in sequence (controller 112, figure 1, paragraph [0049]); a power circuit configured to provide a power voltage to turn on the µICs (The peripheral circuitry includes a gate or address driver circuit 108, a source or data driver circuit 110, a controller 112, and an optional supply voltage (e.g., Vdd) driver 114. The controller 112 controls the gate, source, and supply voltage drivers 108, 110, 114. The gate driver 108, under control of the controller 112, operates on address or select lines SEL[i], SEL[i+1], and so forth, one for each row of pixels 104 in the pixel array 102); and a current detection circuit electrically connected between the power circuit and the µICs and configured to detect a total current of the µICs in each of the columns after being scanned by the scanning signal (a current supply and readout circuit 120, which reads output data from data output lines, VD [k], VD [k+1], and so forth, one for each column of pixels 104a, 104c in the pixel array 102, paragraph [0053]) , wherein at least one of the µICs in one of the columns is determined to be abnormal in response to the total current of the µICs in the one of the columns not matching a preset total current ([0168] For defects that cannot be directly identified by a single measurement of the inspection system, the first measurement can reveal that a problem exists, and specify additional tests that will conclusively identify the exact defect. One example is the identification of line defects, which can be detected by any of the following procedures: [0169] 1. Measuring the current of different lines: if the current is higher than a threshold, the pixel is shorted. [0170] 2. Applying pulse to measure the charge transfer: if the amount of charge transfer is smaller than a threshold, the line is open. [0171] 3. For a signal with connection to DC current (e.g., Vdd and Vmonitor), the current can be measured to detect the open defect. [0172] Defects in the thin film transistors (TFTs) can also be detected. For example, in the situation where the pixel circuit in FIG. 24 has a signal WR measured as high (while Vdata=high, and also while Vdata=low, and Vdd=high), an additional test needs to be performed. Table 1 shows the different conditions and what the results mean. [0188] The detailed scan can be optimized based on the results of the quick scan. For example, if the quick scan has not detected any line defects, the line tests can be avoided in the detailed scan. [0189] In the quick scan, one (or more than one) voltage or one (or more than one) current from a pixel is measured. If the measured values of a pixel are within acceptable ranges, the pixel passes the quick scan. If the measured values of a pixel are outside the acceptable range the pixel is tagged as faulty. [0190] The measured voltages or currents are preferably affected by most of the possible defects. For example, the current supplied to a light emissive element and/or the voltage at the connection between a pixel circuit and an emissive element are good candidates for the quick scan measurement. [0191] One example of a quick scan begins by defining a reference current or voltage that is the lowest level encountered in a normal pixel. Alternatively, the reference current or voltage may be lower than the lowest level encountered in a normal pixel, by a defined margin. The measured pixel current or voltage is then compared with the reference level. If the measured value is larger than the reference value, the pixel passes this test. If the measured level is smaller than the reference level, the pixel fails this test. The result of the test can be different based on the measured parameter. For example, if the measured value is the drive TFT current, the TFT can be open, whereas if the measured value is the OLED current, the OLED can be shorted. [0192] Alternatively, the pixel may pass the test if the measured value is smaller than the reference value. If the measured level is larger than the reference level, the pixel fails this test. Here again, the result of the test can be different based on the measured parameter. For example, if the measured value is the drive TFT current, the TFT can be open, whereas if the measured value is the OLED current, the OLED can be shorted).
Regarding dependent claim 6, Chaji et al (US 2014/0329339 A1) teaches the detection method of claim 5.
Chaji et al (US 2014/0329339 A1) further teaches, wherein each of the µICs further comprises a first sub-pixel pin, a second sub-pixel pin, and a third sub-pixel pin, and the current detection circuit (paragraph [0125]) further comprises: a plurality of current detection modules respectively corresponding to the µICs, and configured to detect a first sub-pixel current, a second sub-pixel current, and a third sub-pixel current respectively flowing through the first sub-pixel pin, the second sub-pixel pin, and the third sub-pixel pin of each of the µICs (paragraph [0125]).
Regarding dependent claim 7, Chaji et al (US 2014/0329339 A1) teaches the detection method of claim 6.
Chaji et al (US 2014/0329339 A1) further teaches, wherein each of the current detection modules further comprises: a first testing pad corresponding to the first sub-pixel pin; a second testing pad corresponding to the second sub-pixel pin; and a third testing pad corresponding to the third sub-pixel pin (paragraph [0126]).
Regarding dependent claim 8, Chaji et al (US 2014/0329339 A1) teaches the detection method of claim 6.
Chaji et al (US 2014/0329339 A1) further teaches, wherein each of the current detection modules further comprises: a first sampling resistor electrically connected between the first sub-pixel pin and the power circuit (paragraph [0063]); a second sampling resistor electrically connected between the second sub-pixel pin and the power circuit (paragraph [0063]); and a third sampling resistor electrically connected between the third sub-pixel pin and the power circuit (paragraph [0063]).
Regarding dependent claim 9, Chaji et al (US 2014/0329339 A1) teaches the detection method of claim 8.
Chaji et al (US 2014/0329339 A1) further teaches, wherein each of the current detection modules further comprises: an analog-to-digital converter (ADC) configured to receive cross-voltages across the first sampling resistor, the second sampling resistor, and the third sampling resistor (paragraph [0057]) to obtain the first sub-pixel current, the second sub-pixel current, and the third sub-pixel current (paragraph [0057]).
Regarding dependent claim 10, Chaji et al (US 2014/0329339 A1) teaches the detection method of claim 5.
Chaji et al (US 2014/0329339 A1) further teaches, wherein the total current comprises a first sub-pixel total current, a second sub-pixel total current, and a third sub-pixel total current, and each of the µICs further comprises: a first sub-pixel pin configured to allow a first sub-pixel current to flow through during a detection period (paragraphs [0051], [0055], [0092]); a second sub-pixel pin configured to allow a second sub-pixel current to flow through during the detection period; and a third sub-pixel pin configured to allow a third sub-pixel current to flow through during the detection period (paragraphs [0051], [0055], [0092]); wherein the first sub-pixel total current is a sum of the first sub-pixel current of each of the µICs in a same one of the columns, the second sub-pixel total current is a sum of the second sub-pixel current of each of the µICs in the same one of the columns, the third sub-pixel total current is a sum of the third sub-pixel current of each of the µICs in the same one of the columns (paragraphs [0051], [0055], [0092]).
Regarding dependent claim 11, Chaji et al (US 2014/0329339 A1) teaches the detection method of claim 10.
Chaji et al (US 2014/0329339 A1) further teaches, wherein the current detection circuit further comprises a plurality of current detection modules respectively corresponding to the columns and configured to detect the total current of each of the columns (paragraphs [0058]-[0064]), and the detection system further comprises: a plurality of switch circuits respectively corresponding to the current detection modules (paragraphs [0058]-[0064]), and each of the switch circuits being electrically connected between a corresponding one of the current detection modules and each of the µICs in the same one of the columns (paragraphs [0058]-[0064]).
Regarding dependent claim 12, Chaji et al (US 2014/0329339 A1) teaches the detection method of claim 11.
Chaji et al (US 2014/0329339 A1) further teaches, wherein each of the switch circuits further comprises: a plurality of first switch elements respectively electrically connected between the corresponding one of the current detection modules and the first sub-pixel pin of each of the µICs in the same one of the columns (paragraphs [0054], [0055], [0058], [0059]).
Regarding dependent claim 13, Chaji et al (US 2014/0329339 A1) teaches the detection method of claim 12.
Chaji et al (US 2014/0329339 A1) further teaches, wherein each of the switch circuits further comprises: a plurality of second switch elements respectively electrically connected between the corresponding one of the current detection modules the second sub-pixel pin of each of the µICs in the same one of the columns (paragraphs [0054], [0055], [0058], [0059]).
Regarding dependent claim 14, Chaji et al (US 2014/0329339 A1) teaches the detection method of claim 13.
Chaji et al (US 2014/0329339 A1) further teaches, wherein each of the switch circuits further comprises: a plurality of third switch elements respectively electrically connected between the corresponding one of the current detection modules and the third sub-pixel pin of each of the µICs in the same one of the columns (paragraphs [0054], [0055], [0058], [0059]).
Regarding dependent claim 15, Chaji et al (US 2014/0329339 A1) teaches the detection method of claim 11.
Chaji et al (US 2014/0329339 A1) further teaches, wherein each of the plurality of current detection modules further comprises: a sampling resistor electrically connected between the power circuit and the corresponding one of the plurality of switch circuits (paragraph [0063]); and an ADC configured to receive cross-voltage across the sampling resistor (paragraph [0057]) to selectively obtain the first sub-pixel current, the second sub-pixel current, the third sub-pixel current, the first sub-pixel total current, the second sub-pixel total current, the third sub-pixel total current or the total current depending on whether the plurality of switch circuits are turned on or turned off (paragraph [0057]).
Regarding dependent claim 16, Chaji et al (US 2014/0329339 A1) teaches the detection method of claim 15.
Chaji et al (US 2014/0329339 A1) further teaches, wherein each of the plurality of current detection modules further comprises: a testing pad electrically connected between the sampling resistor and the corresponding one of the plurality of switch circuits (paragraph [0126]).
Closest Prior art
5. The following relevant prior art of record is not cited in the office action.
Hsiao et al (US 2020/0341050 A1) teaches, A current driver array test apparatus is provided for testing a plurality of current drivers in an array, each of the current drivers provides a current when being activated. The current driver array test apparatus includes a plurality of test switches, a common test-enable pin, a common test-output pin, and a detector. One test switch is electrically coupled to one current driver. The common test-enable pin is coupled to each of the test switches. The common test-output pin is coupled to each of the test switches and receives the current. The detector is electrically coupled to the common test-output pin and receives the current from the common test-output pin. The number of the common test enable pin and the common test-output pin is only one. A current driver array test method and a micro light emitting diode array test method using the current driver array test apparatus are also provided.
Bielski (US 6492802 B1) teaches, A technique is described for detecting defects such as short circuits in a device such as a discrete pixel detector used in a digital x-ray system. The technique employs test circuits associated with each row driver of the detector. The test circuits are enabled by a test enable input signal, and the row driver sequentially enables the rows of the detector, along with the individual test circuits. In a test sequence, output signals from the row test circuits are monitored to identify whether a defect, such as a short circuit, is likely to exist in the row or row driver. The test circuitry adds only minimal area and complexity to the row driver function, providing a high degree of test coverage at a low cost, with minimal likelihood of test circuitry-induced failures.
Yang et al (US 2024/0402237 A1) teaches, Systems and methods are provided for electrical testing to supplement or replace optical testing of an electronic display. Internal testing circuitry that includes analog front end (AFE) and analog-to-digital converter (ADC) circuitry may be included in the electronic display and may be used either alone or in combination with other testing devices to perform electrical characterization and defect screening. The electrical characterization and defect screening may be performed before or after self-emissive elements such as light-emitting diodes are installed, further improving yield. Types of electrical characterization and defect screening may include a partial passive mode electrical characterization of OLEDs, vertical or horizontal crosstalk measurement, scan line integrity testing, pixel bright dot testing, display pixel defect detection, and delayed defect detection for defects that may occur after some extended period of time (e.g., after several minutes, after several hours).
Conclusion
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/SURESH K RAJAPUTRA/Examiner, Art Unit 2858
/EMAN A ALKAFAWI/Supervisory Patent Examiner, Art Unit 2858 6/5/2026
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