DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1-2, 8-12 and 18-20 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Shih (US 2019/0347573 A1).
Regarding claim 1, Shih teaches a memory system comprising:
a memory device including multiple pages in a memory region (Fig. 1, memory device 120);
and a controller coupled to the memory device (controller 110), and configured to:
perform at least one read operation on the memory device including reading of the multiple pages in the memory region of the memory device to obtain program voltage state distributions across the multiple pages (The controller can perform read operation to read multiple pages in the memory device to obtain program voltage state distribution in order to determine the data that is programmed in the memory cells. The memory cells can have program voltage distribution of 8 states as shown in Fig. 3);
generate a synthetic model of the program voltage state distributions of the memory device based on the at least one read operation (Fig. 2, Shih teaches training phase 200A which the controller generates a threshold voltage distribution model based on threshold voltage database. Where the threshold voltage distribution model is an estimate and normalized based on a plurality of threshold voltages database, ¶0023); and
calculate from the synthetic model at least one voltage threshold between two of the program voltage state distributions (the threshold voltage model is used to read data stored in the memory cell. The bit stored in the memory cell is determined by which threshold voltage curve in the program voltage state distribution in Fig. 3. By determining which threshold voltage peak corresponds to the program state, the memory controller determines the voltage threshold between two other program voltage states as shown in Fig. 3. Also, see ¶0008)
Regarding claim 2, Zhang further teaches the memory system of claim 1, wherein the synthetic model comprises at least one of a Gaussian Model (GM), an improved Gaussian Model (IGM), a Skew Normal Model (SNM), and non-central T model (NCTM) (Fig. 8 shows a Gaussian model).
Regarding claim 8, Zhang further teaches the memory system of claim 1, wherein the multiple pages include a most significant bit (MSB) page, a center significant bit (CSB) page, and a least significant bit (LSB) page (triple level cell (TLC) flash, which have MSB, CSB and LSB see Fig. 3).
Regarding claim 9, Zhang further teaches the memory system of claim 1, wherein the controller comprises a neural network which generates the synthetic model and calculates the at least one voltage threshold between two of the program voltage state distributions (¶0008)
Regarding claim 10, Zhang further teaches the memory system of claim 1, wherein the controller is programed with a look up table associating, for the synthetic model, data from the at least one read operation with a volage threshold value for the at least one voltage threshold (Fig. 2, Threshold voltage database).
Regarding claims 11-12 and 18-20, the claims have similar limitations as claims 1-2 and 8-10 except the claims were written in a method format. Therefore, the claims are rejected under the same grounds of rejection.
Response to Arguments
Applicant’s arguments with respect to claim(s) 1-20 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
Allowable Subject Matter
Claims 3-7 and 13-17 would be allowable if rewritten to overcome the rejection(s) under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), 2nd paragraph, set forth in this Office action and to include all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter:
After further search and consideration it is determined that the prior art of record neither anticipated nor renders obvious the claimed subject matter of the instant application as a whole either taken alone or in combination, in particular, prior art of record does not teach, the following limitation(s) in combination with the remaining claimed limitation:
wherein the controller is further configured to: vary the synthetic model between iterations which calculate from the synthetic model at least one voltage threshold between two of the program voltage state distributions.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to KHAMDAN N ALROBAIE whose telephone number is (571)270-7099. The examiner can normally be reached Monday to Thursday (8AM till 6PM).
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/Khamdan N. Alrobaie/Primary Examiner, Art Unit 2824