DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Specification
The lengthy specification has not been checked to the extent necessary to determine the presence of all possible minor errors. Applicant’s cooperation is requested in correcting any errors of which applicant may become aware in the specification.
The specification is objected to as failing to provide proper antecedent basis for the claimed subject matter. See 37 CFR 1.75(d)(1) and MPEP § 608.01(o). Correction of the following is required: low power mode [claim 15] and hibernation mode [claim 15].
Claim Rejections - 35 USC § 112
The following is a quotation of the first paragraph of 35 U.S.C. 112(a):
(a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention.
The following is a quotation of the first paragraph of pre-AIA 35 U.S.C. 112:
The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor of carrying out his invention.
Claim 15 is rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the written description requirement. The claim(s) contains subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, or for applications subject to pre-AIA 35 U.S.C. 112, the inventor(s), at the time the application was filed, had possession of the claimed invention.
Regarding claim 15, the claim states: “… the controller is further configured to store the electromigration aging profile for the SoC in response to a signal to…enter a low power mode, enter a hibernation mode…” The specification does not in such full, clear and concise how the controller provide SoC to “…enter a low power mode, enter a hibernation mode…”
For examination purpose, the examiner is not given patentable weight to the limitations “enter a low power mode, enter a hibernation mode” until further explanation is given.
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 1-7 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Regarding claim 1, the claim states: “…determining temperature data of the SoC…” It is not clear from the claim what is “…determining temperature data…” The claim further states: “…normalizing the temperature data…” It is not clear from the claim what is “…normalizing the temperature data…” The claim also states: “…calculating an aging profile for the SoC…” It is not clear from the claim what is “…calculating an aging profile for the SoC…” The claim lastly states: “…determining a time-to-failure for the SoC…” It is not clear from the claim what is “…determining a time-to-failure…” Since claims 2-7 depend form claim 1, they also are rejected for the above reason.
Regarding claim 2, the claim states: “…normalizing voltage data of the SoC…” It is not clear from the claim what is “…normalizing voltage data…” Since claim 3 depends from claim 2, the claim also is rejected for the above reason.
Regarding claim 3, the claim states: “…updating the aging profile…” It is not clear from the claim what is “…updating the aging profile…”
Regarding claim 4, the claim states: “…updating a designated time-to-failure for the SoC…” It is not clear from the claim what is “…determining temperature data…” Since claim 5 depends from claim 4, the claim also is rejected for the above reason.
Regarding claim 6, the claim states: “…normalizing clocking data of the SoC…” It is not clear from the claim what is “…normalizing clocking data…”
Regarding claim 7, the claim states: “…updating the aging profile…” It is not clear from the claim what is “…updating the aging profile…”
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1-10, 12-14, 16-17 and 20 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Hovis et al (US Pub No 2017/0357298).
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Regarding claim 1, Hovis et al disclose [see Fig. 7 above] a method, comprising: monitoring, by a temperature sensor (thermal monitor 754), a temperature of a system on chip (SoC 710); determining [via thermal monitor 754] temperature data of the SoC (710) that includes an amount of time the SoC (710) is operating at a plurality of different temperatures; normalizing [via processing core 711] the temperature data to a designated operating temperature; calculating [via processing core 711] an aging profile for the SoC (710) based on the normalized temperature data; and determining [via processing core 711] a time-to-failure for the SoC (710) based on the aging profile.
Regarding claim 2, Hovis et al disclose normalizing [via processing core 711] voltage data of the SoC (710) that includes an amount of time the SoC (710) is operating at an operating voltage.
Regarding claim 3, Hovis et al disclose updating [via processing core 711] the aging profile based on the normalized voltage data.
Regarding claim 4, Hovis et al disclose updating [via processing core 711] a designated time-to-failure for the SoC (710) based on the determined time-to-failure.
Regarding claim 5, Hovis et al disclose wherein the designated operating temperature [via thermal monitor 754] is a temperature range utilized to calculate the designated time-to-failure for the SoC (710).
Regarding claim 6, Hovis et al disclose normalizing [via processing core 711] clocking data of the SoC (710) that includes an amount of time the SoC (710) is operating at a particular clock frequency.
Regarding claim 7, Hovis et al disclose updating [via processing core 711] the aging profile based on the normalized clocking data.
Regarding claim 8, Hovis et al disclose [see Fig. 7 above] an apparatus (system 700), comprising: a system on chip (SoC 710); a voltage regulator (voltage regulator 740) associated with the SoC (710); a temperature sensor (thermal monitor 754) associated with the SoC (710); and a controller (processing core 711) coupled to the SoC (710), the voltage regulator (740), and the temperature sensor(754), wherein the controller (711) is configured to [see Note below]: monitor temperature data of the SoC (710) received by the temperature sensor (754); monitor voltage data provided to the SoC (710) by the voltage regulator (740); correlate the temperature data and the voltage data with time data; normalize the temperature data to a designated operating temperature of the SoC (710); calculate an electromigration aging profile for the SoC (710) based on the normalized temperature data and voltage data; and update a designated time-to-failure for the SoC (710) based on the calculated electromigration aging profile.
[Note: Claim limitations that employ phrases of the type “configured to” are typical of claim limitations, which may not distinguish over the prior art. It has been held that the recitation that an element is “configured to” perform a function is not a positive limitation but only requires the ability to so perform. See also MPEP 2111.04]
Regarding claim 9, Hovis et al disclose wherein the controller (711) is configured to [see Note above] update SoC (710) settings based on the updated time-to-failure.
Regarding claim 10, Hovis et al disclose wherein the SoC (710) settings include voltage settings associated with the voltage regulator (740).
Regarding claim 12, Hovis et al disclose wherein the controller (711) is configured to [see Note above] generate fault analysis data for the SoC (710) based on the updated time-to-failure.
Regarding claim 13, Hovis et al disclose wherein the controller (711) is configured to [see Note above] generate lifetime durability data from the SoC (710) based on the electromigration aging profile for the SoC (710) over a lifetime of the SoC (710).
Regarding claim 14, Hovis et al disclose wherein the controller (711) is further configured to [see Note above] determine when a defect associated with the SoC (710) is associated with the temperature data, current data, frequency data, or voltage data based on the updated time-to-failure.
Regarding claim 16, Hovis et al disclose [see Fig. 7 above] a system (system 700), comprising: a system on chip (SoC 710); a timer associated with the SoC (710) [see paragraphs [0032]-[0034] for details]; a voltage regulator (voltage regulator 740) associated with the SoC (710); a temperature sensor (thermal monitor 754) associated with the SoC (710); and a processing device (processing core 711) coupled to the SoC (710), wherein the processing device (711) is configured to [see Note below]: monitor temperature data of the SoC (710) received by the temperature sensor (754) with corresponding time data received by the timer; monitor voltage data and current data provided to the SoC (710) by the voltage regulator (740) with corresponding time data received by the timer; correlate the temperature data and the voltage data with corresponding time data received by the timer; normalize the temperature data to a designated operating temperature of the SoC (710); calculate an electromigration aging profile for the SoC (710) based on the normalized temperature data and voltage data for a period of time; and determine lifetime durability data for the SoC (710) based on a plurality of electromigration aging profiles for the SoC (710) over a lifetime of the SoC (710).
[Note: Claim limitations that employ phrases of the type “configured to” are typical of claim limitations, which may not distinguish over the prior art. It has been held that the recitation that an element is “configured to” perform a function is not a positive limitation but only requires the ability to so perform. See also MPEP 2111.04]
Regarding claim 17, Hovis et al disclose wherein the processing device (711) is configured to store the electromigration aging data in response to receiving a startup signal or a shutdown signal.
Regarding claim 20, Hovis et al disclose a domain sensor (domain sensors 741-743) to determine voltage domains during operation of the SoC (710) and during shut down of the SoC (710).
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. See PTO-892 for details.
Allowable Subject Matter
Claims 11, 15 and 18-19 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter: regarding claim 11, the primary reason for the allowance of the claim is due to the electromigration aging profile for the SoC is calculated based on a comparison of the normalized temperature data and voltage data to electromigration response per temperature data for the SoC.
Regarding claim 15, the primary reason for the allowance of the claim is due to the controller is further configured to store the electromigration aging profile for the SoC in response to a signal to: turn off a system associated with the SoC, enter a low power mode, enter a hibernation mode, or store periodically.
Regarding claim 18, the primary reason for the allowance of the claim is due to a cell aging monitor to collect aging data for a plurality of circuit types associated with the SoC. Since claim 19 depends from claim 18, it also has allowable subject matter.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to JERMELE M HOLLINGTON whose telephone number is (571)272-1960. The examiner can normally be reached Mon-Fri 7:00am-3:30pm.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Lee E Rodak can be reached at 571-270-5628. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/JERMELE M HOLLINGTON/ Primary Examiner, Art Unit 2858
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