DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Tittle
The title of the invention is not descriptive. A new title is required that is clearly
indicative of the invention to which the claims are directed.
Claims are directly to "METHOD FOR MANUFACTURING MODULE…", please, revise the Tittle.
The following title is suggested: A METHOD FOR MANUFACTURING MODULE USING A COATING AGENT.
Claim Objections
Claim 1 is objected to because of the following informalities:
Regarding claim 1, line 13, please, change "the electronic components" to - -
the electronic component - - for proper reading.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1 and 5 is/are rejected under 35 U.S.C. 103 as being unpatentable
over Ishikawa et al. (U.S. Patent 5,907,190) in view of Bureau et al. (U.S. Patent
6,492,194) cited in the record.
As to claim 1, Ishikawa discloses a method for manufacturing an electronic module having an electronic component (2), a coating layer (7, 8), as shown in figures 1-3 comprising:
the electronic component (2) comprising a conductive adhesive member portion (not label, the adhesive formed between the component 2 and the substrate 1) and a circuit board (1) on which an electronic element (2) is mounted,
wherein the coating layer (7, 8) coating a surface of the conductive adhesive member portion,
wherein the coating layer (7, 8) comprises at least a second thermoplastic resin
(7) and hollow particles (8, column 4, line 25+), wherein the coating layer has a
concentration gradient of hollow particles (8, column 3, line 8+) in the thickness direction
such that the content of the hollow particles in the coating layer is lower on the face side
in contact with the circuit board (1), and wherein the hollow particles (8) are either
single-hole hollow particles or multi-hole hollow particles.
Ishikawa does not specifically disclose an outer package for covering the surface
of the electronic component, and the outer package comprising a first thermoplastic
resin which is an injection molding and covering a surface of the electronic component.
Bureau teaches a package of electronic components as shown in figures 4a-4b
comprising an outer package for covering the surface of the electronic component (10),
and the outer package comprising a first thermoplastic resin (70) which is formed as an injection molding and covering a surface of the electronic component (10).
It would have been obvious to one having ordinary skill in the art before the
effective filling date to have a teaching of Bureau employed in the module of Ishikawa in
order to provide excellent heat dissipation structure for the module.
As to claim 5, Ishikawa discloses the hollow particles (8) contain an acrylic
resin, column 4, line 3.
Claim(s) 2-4, and 6-8 is/are rejected under 35 U.S.C. 103 as being
unpatentable over Ishikawa in view of Bureau as applied to claims above, and further in
view of Yoo et al. (U.S. Patent 10,062,855) cited in the record.
Regarding claim 2, Ishikawa as modified by Bureau discloses all of the
limitations of claimed invention except for the coating layer comprises at least a first layer in which the content of the hollow particles is less than 1% by mass and a second layer in which the content of the hollow particles is 1% by mass or more.
Yoo teaches an encapsulating organic electronic device as shown in figure 4
comprising for the coating layer (12) comprises at least a first layer (12a) and a second
layer (12b), the first layer content of the hollow particles is less than 1% by
mass, and the second layer contains the hollow particle in an amount of 1% by mass or
more.
It would have been obvious to one having ordinary skill in the art before the
effective filling date to have a teaching of Yoo employed in the module of Ishikawa and
Bureau in order to provide excellent heat dissipation structure for the module.
Regarding claim 3, Ishikawa as modified by Bureau discloses all of the
limitations of claimed invention except for the coating layer further comprises a third layer in which the content of the hollow particles is 0% by mass or more.
Yoo teaches an encapsulating organic electronic device as shown in figure 4
comprising for the coating layer (12) comprises a third layer (12a), in which the content of the hollow particles 1s more than 0% by mass.
It would have been obvious to one having ordinary skill in the art before the
effective filling date to have a teaching of Yoo employed in the module of Ishikawa and
Bureau in order to provide excellent heat dissipation structure for the module.
Regarding claim 4, Ishikawa as modified by Bureau and Yoo teaches the first
layer (12a) is provided on a face side in contact with the circuit board.
Regarding claim 6, Ishikawa as modified by Bureau and Yoo teaches the
second layer has a thermal conductivity of less than 0.2 W/m-k (epoxy resin).
Regarding claim 7, Ishikawa as modified by Bureau and Yoo teaches the first
layer has a volume resistivity of 3 X 107M Q-cm or more (the curable epoxy resin).
Regarding claim 8, Ishikawa as modified by Bureau and Yoo teaches the
coating layer (12) has a thickness of 50 to 500 um, column 5, line 27.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to TUAN T DINH whose telephone number is (571)272-1929. The examiner can normally be reached 8am-5pm, M-F.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Timothy Dole can be reached at 571-272-2229. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/TUAN T DINH/Primary Examiner, Art Unit 2847