DETAILED ACTION
This is in response to communication received on 2/27/26
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
The text of those sections of AIA 35 U.S.C. code not present in this action can be found in previous office actions dated 12/2/25.
Election/Restrictions
Claim 26 is withdrawn from further consideration pursuant to 37 CFR 1.142(b) as being drawn to a nonelected Group II, there being no allowable generic or linking claim. Election was made without traverse in the reply filed on 2/27/26.
Claim Rejections - 35 USC § 112
The claim rejection(s) under pre-AIA 35 U.S.C. 112 2nd Paragraph or AIA 35 U.S.C. 112(b) as being as being indefinite for failing to particularly point out and distinctly claim the subject matter on claim 15 is withdrawn because the claims have been cancelled.
Claim Rejections - 35 USC § 103
The claim rejection(s) under AIA 35 U.S.C. 103 as being obvious over Saito US Patent Number 5,124,272 hereinafter SAITO in view of Oda US Patent Number 6,313,036 hereinafter ODA on claims 1-3, and 16-24 are maintained. The rejection is repeated below for convenience.
As for claim 1, "The present invention relates to methods for producing semiconductor devices" (column 1, lines 8-9), "In this embodiment, before ... depositing metal over the source region, drain region and gate electrode, an impurity adsorption layer containing the dominant impurity of the source region, drain region and gate electrode is formed so as to reduce resistivity of the source region, drain region and gate electrode" (column 20, lines 42-47), and "Next in the FIG. 29B step, a boron containing gas, such as diborane gas, is applied to the· exposed surface of the N type silicon substrate 701 to form a boron adsorption layer 705" (column 14, lines 19-22) i.e. A film forming method comprising: (a) preparing a substrate having a doped region, which contains silicon with an added impurity, formed on a surface.
SAITO is silent on (b) forming a diffusion prevention layer, which contains the impurity, on the doped region.
ODA teaches "The method of producing semiconductor device comprises ion implanting a first p-type impurity to form a p-type source-drain region" (abstract, lines 1- 3).
ODA teaches "According to the present invention, as described above, the contact resistance between TiSi2 and silicon is decreased to improve on current of the transistor. The reason is that, even if certain amount of boron in silicon is sucked up during formation of TiSi2 , a sufficient amount of boron still exists in the silicon surface thus decreasing the contact resistance between silicon and TiSi2" (column 6, lines 9- 15).
ODA teaches "In the first example, prior to the activation of the source-drain impurity the re- implantation of BF2 into the p-type source-drain region is performed preceding the formation of TiSi2 . Thus, even if boron in silicon is sucked ( diffused) up during the formation progress of titanium silicide, a sufficient amount of boron is still present in silicon, so that the contact resistance between the titanium silicide layer and silicon is reduced to increase the transistor on-current" (column 4, line 67 - column 5, line 8), i.e. (b) forming a diffusion prevention layer, which contains the impurity, on the doped region.
It would have been obvious to one of ordinary skill in the art before the effective filing date to include (b) forming a diffusion prevention layer, which contains the impurity, on the doped region in the process of SAITO because ODA teaches that by providing a concentration of the impurity on top of the doped region diffusion from the doped region can be minimized thereby maintaining the concentration in the doped region and contact resistance can be increased.
SAITO teaches "In the FIG. 37B step, a metal film, for example a Ti film, 1016 is deposited on the boron adsorption layer 1015" (column 21, lines 7-9) and "In the FIG. 37D step, the metal (Ti) film 1016 is etched away and thermal treatment is carried out at about 900° C. to activate the metal silicide in the source region, the drain region and the gate electrode to reduce their resistivity" (column 21, lines 20-24), i.e. (c) forming a metal film on the doped region where the diffusion prevention layer is formed, and forming a metal silicide film by a reaction between the metal film and the silicon of the doped region.
SAITO and ODA do not specifically teach wherein (b) includes supplying an impurity-containing gas that contains the impurity to the substrate without converting the impurity-containing gas into a plasma.
However, ODA teaches "(c) step of ion-implanting a third impurity for converting the structure of at least the diffusion layer of the source-drain portion into an amorphous state" (column 3, lines 61-63), i.e. wherein the (b) is performed by ion implantation. ODA also specifically states that "It should be noted that modification obvious in the art may be done without departing the gist and scope of the present invention as disclosed herein and claimed hereinbelow as appended" (column 6, lines 17-20). ODA also makes clear that it is the concentration of the impurity at the surface that prevents the diffusion from the source drain layers (column 4, line 67 - column 5, line 8).
SAITO teaches a step of forming a boron layer, "Then, a compound gas containing boron, such as diborane gas, is applied to the cleaned surface of the substrate while maintaining the substrate temperature at 700° C.-900° C. In this embodiment, diborane gas is introduced for 100 seconds at IX 10-2 Pa of pressure while setting the substrate temperature at 825° C. so as to form the boron adsorption layer 404 on the substrate surface 401" (column 10 lines 31-40), thereby forming an impurity containing layer on a desired region of the substrate. It would have been obvious to one of ordinary skill in the art before the effective filing date to combine the impurity deposition without a plasma of SAITO and the impurity containing diffusion prevention layer of ODA such that it includes wherein (b) includes supplying an impurity-containing gas that contains the impurity to the substrate without converting the impurity-containing gas into a plasma because SAITO teaches that such a process produces a impurity-containing layer, and ODA teaches that providing such a concentration of impurity at the surface prevents diffusion and preserves desired characteristics.
As for claim 2, SAITO is silent on step (b). See combination in the rejection of claim 1 above.
ODA teaches "(c) step of ion-implanting a third impurity for converting the structure of at least the diffusion layer of the source-drain portion into an amorphous state" (column 3, lines 61-63), i.e. wherein the (b) is performed by ion implantation. ODA also specifically states that "It should be noted that modification obvious in the art may be done without departing the gist and scope of the present invention as disclosed herein and claimed hereinbelow as appended" (column 6, lines 17-20).
ODA also makes clear that it is the concentration of the impurity at the surface that prevents the diffusion from the source drain layers (column 4, line 67 - column 5, line 8).
SAITO teaches a step of forming a boron layer, "Then, a compound gas containing boron, such as diborane gas, is applied to the cleaned surface of the substrate while maintaining the substrate temperature at 700° C.-900° C. In this embodiment, diborane gas is introduced for 100 seconds at IX 10-2 Pa of pressure while setting the substrate temperature at 825° C. so as to form the boron adsorption layer 404 on the substrate surface 401" (column 10 lines 31-40), thereby forming an impurity containing layer on a desired region of the substrate wherein it is performed in a state where a metal-containing gas is not supplied to the substrate.
It would have been obvious to one of ordinary skill in the art before the effective filing date to combine the impurity deposition without a plasma of SAITO and the impurity containing diffusion prevention layer of ODA such that it includes wherein (b) includes supplying an impurity-containing gas that contains the impurity to the substrate without converting the impurity-containing gas into a plasma, wherein (b) is performed in a state where a metal-containing gas is not supplied to the substrate because SAITO teaches that such a process produces a impurity-containing layer, and ODA teaches that providing such a concentration of impurity at the surface prevents diffusion and preserves desired characteristics.
As for claim 3, SAITO is silent on step (b). See combination in the rejection of claim 1 above.
SAITO teaches a step of forming a boron layer, "Then, a compound gas containing boron, such as diborane gas, is applied to the cleaned surface of the substrate while maintaining the substrate temperature at 700° C.-900° C. In this embodiment, diborane gas is introduced for 100 seconds at IX 10-2 Pa of pressure while setting the substrate temperature at 825° C. so as to form the boron adsorption layer 404 on the substrate surface 401" (column 10 lines 31-40), thereby forming an impurity containing layer on a desired region of the substrate which includes continuously supplying the impurity-containing gas to the substrate for 100 seconds.
ODA teaches "(c) step of ion-implanting a third impurity for converting the structure of at least the diffusion layer of the source-drain portion into an amorphous state" (column 3, lines 61-63), i.e. wherein the (b) is performed by ion implantation.
ODA also specifically states that "It should be noted that modification obvious in the art may be done without departing the gist and scope of the present invention as disclosed herein and claimed hereinbelow as appended" (column 6, lines 17-20).
ODA also makes clear that it is the concentration of the impurity at the surface that prevents the diffusion from the source drain layers (column 4, line 67 - column 5, line 8).
It would have been obvious to one of ordinary skill in the art before the effective filing date to combine the impurity deposition without a plasma of SAITO and the impurity containing diffusion prevention layer of ODA such that it includes wherein (b) includes supplying an impurity-containing gas that contains the impurity to the substrate without converting the impurity-containing gas into a plasma, wherein (b) includes continuously supplying the impurity-containing gas to the substrate because SAITO teaches that such a process produces a impurity-containing layer, and ODA teaches that providing such a concentration of impurity at the surface prevents diffusion and preserves desired characteristics.
As for claim 16, SAITO teaches "Boron can be doped to a high density into the substrate surface to form the P + type source" (column 4, lines 8-10), i.e. wherein the impurity is a p-type impurity.
As for claim 17, SAITO teaches "Boron can be doped to a high density into the substrate surface to form the P + type source" (column 4, lines 8-10), i.e. wherein the p-type impurity is boron.
As for claim 18, SAITO teaches "On the other hand, when forming the N type adsorption film, the chamber is charged with a gas containing N type element, such as arsine (AsH3), phosphine (PH3), phosphorus trichloride (PCl3), arsenic trifluoride (AsF3) or phosphorus pentafluoride (PF3)" (column 20, lines 30-35), i.e. wherein the impurity is an n-type impurity.
As for claim 19, SAITO teaches "On the other hand, when forming the N type adsorption film, the chamber is charged with a gas containing N type element, such as arsine (AsH3), phosphine (PH3), phosphorus trichloride (PCI3), arsenic trifluoride (AsF3) or phosphorus pentafluoride (PF3)" (column 20, lines 30-35), i.e. wherein the n-type impurity is phosphorus.
As for claim 20, SAITO teaches "Generally, when forming a P type adsorption film, the treatment chamber is charged with a gas containing P type element, such as diborane (B2H6)" (column 20, lines 27-30), i.e. wherein the impurity-containing gas is a diborane gas.
As for claim 21, SAITO teaches "On the other hand, when forming the N type adsorption film, the chamber is charged with a gas containing N type element, such as ... phosphine (PH3)" (column 20, lines 30-35), i.e. wherein the impurity-containing gas is phosphine.
As for claim 22, SAITO teaches "In the FIG. 37B step, a metal film, for example a Ti film, 1016 is deposited on the boron adsorption layer 1015" (column 21, lines 7-9) and "In the FIG. 37 step, the metal (Ti) film 1016 is etched away and thermal treatment is carried out at about 900° C. to activate the metal silicide in the source region, the drain region and the gate electrode to reduce their resistivity" (column 21, lines 20-24), i.e. wherein the metal silicide film is a titanium silicide film.
As for claim 23, Examiner draws attention to the combination of SAITO and ODA in the rejection of claim 1 .
SAITO further teaches a step of forming a boron layer, "Then, a compound gas containing boron, such as diborane gas, is applied to the cleaned surface of the substrate while maintaining the substrate temperature at 700° C.-900° C" (column 10 lines 31-40), and "In the FIG. 37D step, the metal (Ti) film 1016 is etched away and thermal treatment is carried out at about 900° C. to activate the metal silicide in the source region, the drain region and the gate electrode to reduce their resistivity" (column 21, lines 20-24), i.e. wherein (c) is performed at a higher temperature than (b).
As for claim 24, SAITO teaches "An inert film in the form of a less than about 30A thick natural oxide film is removed by the hydrogen from the surface of silicon substrate 1 to thereby clean the substrate surface" (column 4, lines 50-54) and "By this step, a natural oxide film is removed from the surface of the silicon substrate 201 to thereby expose a chemically active silicon face" (column 7, lines 5-7), i.e. removing a native oxide film on the surface of the substrate.
It would have been obvious to one of ordinary skill in the art before the effective filing date to combine the impurity deposition without a plasma of SAITO and the impurity containing diffusion prevention layer of ODA such that it includes (d) removing a native oxide film on a surface of the doped region before (b) because SAITO teaches that such a process cleans the surface and exposes silicon atoms for later coating.
The claim rejection(s) under AIA 35 U.S.C. 103 as being obvious over Saito US Patent Number 5,124,272 hereinafter SAITO and Oda US Patent Number 6,313,036 hereinafter ODA as applied to claim 1 and 2 above, and further in view of Ma et al. US PGPub 201010062149 hereinafter MA on claims 4 and 5 are maintained. The rejection is repeated below for convenience.
As for claim 4, SAITO and ODA are silent on wherein (b) includes intermittently supplying the impurity-containing gas to the substrate.
MA teaches "Embodiments of the invention provide methods for depositing a material on a substrate within a processing chamber during a vapor deposition process" (abstract, lines 1-3).
MA further teaches "Exemplary chemical precursors that may also be used in vapor deposition ( e.g., ALD or CVD) processes include titanium precursors, tungsten precursors, hafnium precursors, zirconium precursors, aluminum precursors, cobalt precursors, ruthenium precursors, copper precursors, silicon precursors, nitrogen precursors, oxygen precursors, as well as other chemical precursors" (paragraph 67, lines 3-9) and "pulse of a boron precursor ( e.g., diborane) during the ALD cycle" (paragraph 60, lines 33-34), and "In step 108, a pulse of a first chemical precursor is administered into the processing chamber, pulsed into the stream of carrier gas, and adsorbed on the substrate surface" (paragraph 40 , lines 1-3).
MA teaches "An ALD process generally contains a multiplicity of cycles, such that a substrate surface is sequentially exposed to two or more reagents or precursors during each ALD cycle while forming the deposited layer. The thickness of a deposited material is the product of the number of conducted ALO cycles by the thickness of each deposited layer. The deposition rate may be used to adjust the thickness of the deposited material" (paragraph 8, lines 1-8), i.e. (b) includes intermittently supplying the impurity-containing gas to the substrate.
It would have been obvious to one of ordinary skill in the art before the effective filing date to include (b) includes intermittently supplying the impurity-containing gas to the substrate in the process of SAITO and ODA because MA teaches that such a deposition process allows for the direct control of thickness of what is applied.
As for claim 5, SAITO and ODA are silent on wherein (b) includes maintaining the substrate at a temperature lower than a temperature at which the impurity containing gas self-decomposes.
MA teaches "Embodiments of the invention provide methods for depositing a material on a substrate within a processing chamber during a vapor deposition process" (abstract, lines 1-3).
MA further teaches "Exemplary chemical precursors that may also be used in vapor deposition ( e.g., ALD or CVD) processes include titanium precursors, tungsten precursors, hafnium precursors, zirconium precursors, aluminum precursors, cobalt precursors, ruthenium precursors, copper precursors, silicon precursors, nitrogen precursors, oxygen precursors, as well as other chemical precursors" (paragraph 67, lines 3-9) and "pulse of a boron precursor ( e.g., diborane) during the ALD cycle" (paragraph 60, lines 33-34), and "In step 108, a pulse of a first chemical precursor is administered into the processing chamber, pulsed into the stream of carrier gas, and adsorbed on the substrate surface" (paragraph 40 , lines 1-3).
MA teaches "In one example, a processing chamber, a substrate, or a substrate support may be maintained approximately below a thermal decomposition temperature of a selected tantalum precursor during an ALD process ... However, the temperature should be selected so that more than 50 percent of the deposition activity is by absorption processes" (paragraph 103, 1-18).
It would have been obvious to one of ordinary skill in the art before the effective filing date to design the substrate temperature such that the desired deposition activity is achieved. Discovery of optimum value of result effective variable in known process is ordinarily within the skill of the art. In re Boesch, CCPA 1980, 617 F.2d 272, 205 USPQ215.
The claim rejection(s) under AIA 35 U.S.C. 103 as being obvious over Saito US Patent Number 5,124,272 hereinafter SAITO and Oda US Patent Number 6,313,036 hereinafter ODA as applied to claim 1 above, and further in view of Iyer US Patent Number 6,156,630 hereinafter IYER on claims 6-7, 10-13 and 15 are maintained. The rejection is repeated below for convenience.
As for claim 6, SAITO and ODA are silent on wherein (b) includes supplying a first metal-containing gas to the substrate.
IYER teaches "A method for use in the fabrication of a gate electrode includes providing a gate oxide layer and forming a titanium boride layer on the oxide layer ... Further, in such methods and structures, the titanium boride layer may be a titanium diboride layer or a titanium boride layer having silicon incorporated therein" (abstract).
IYER teaches "A titanium silicide boride layer is then formed on the substrate assembly by chemical vapor deposition" (column 2, lines 63-65) and "suitable titanium containing and boron containing compounds are chosen which will react to form titanium diboride, or, for the formation of TiSixBy, such suitable titanium and boron containing compounds and further a silicon containing reactant is chosen for reaction in the reaction chamber. Suitable titanium containing compounds include titanium compounds which are volatile at room temperature or when heated, such as titanium halides. A preferred titanium compound is titanium tetrachloride. Suitable boron containing compounds include borane compounds of the formula BnHn+4, such as B2H6 ( diborane )" (column 7, lines 3-14), i.e. wherein applying a boron layer to a substrate includes supplying a first metal containing gas to the substrate.
IYER further teaches "Thin tungsten silicide and titanium silicide are larger grain materials that contribute to a very rough silicide/ silicon interface. As such, it reduces the effective ohmic contact area. Therefore, it is desirable to utilize conductors whose resistivity will not significantly increase for the same feature dimensions" (column 1, lines 40-46).
IYER further teaches "The amount of silicon in the titanium boride layer increases its bulk resistivity, which is usually not desirable. However, this undesirable characteristic is offset by an increase in the oxidation resistance of this layer at high temperatures" (column 7, lines 31-34).
It would have been obvious to one of ordinary skill in the art before the effective filing date to include supplying a first metal containing gas to the substrate in step (b) of the combination of SAITO and ODA because IYER teaches that the incorporation of such at layer provides a gate electrode with minimized resistivity.
As for claim 7, SAITO and ODA are silent on wherein (b) includes simultaneously performing the supplying the impurity-containing gas to the substrate without converting the impurity containing gas into a plasma and the supplying the first metal-containing gas to the substrate.
IYER teaches "The reaction of the titanium containing compounds and boron containing compounds is carried out for a time sufficient to deposit the desired thickness of the titanium diboride layer on the underlying surface" (column 8, lines 15-18) and "For either thermal CVD or plasma enhanced CVD processes, the reactive compounds are admitted as gases into the reaction chamber which is at low pressure (i.e., low compared to ambient pressure)" (column 7, lines 40-43), i.e. includes simultaneously performing the supplying the impurity-containing gas to the substrate without converting the impurity containing gas into a plasma and the supplying the first metal-containing gas to the substrate.
It would have been obvious to one of ordinary skill in the art before the effective filing date to includes simultaneously performing the supplying the impurity-containing gas to the substrate without converting the impurity containing gas into a plasma and the supplying the first metal-containing gas to the substrate in step (b) of the combination of SAITO and ODA because IYER teaches that the incorporation of such at layer provides a gate electrode with minimized resistivity.
As for claim 10, SAITO and ODA are silent on wherein the first metal-containing gas is supplied to the substrate without converting the first metal-containing gas into a plasma.
IYER teaches "The reaction of the titanium containing compounds and boron containing compounds is carried out for a time sufficient to deposit the desired thickness of the titanium diboride layer on the underlying surface" (column 8, lines 15-18) and "For either thermal CVD or plasma enhanced CVD processes, the reactive compounds are admitted as gases into the reaction chamber which is at low pressure (i.e., low compared to ambient pressure)" (column 7, lines 40-43), i.e. wherein the first meta/containing gas is supplied to the substrate without converting the first metal-containing gas into a plasma.
It would have been obvious to one of ordinary skill in the art before the effective filing date to include wherein the first metal-containing gas is supplied to the substrate without converting the first metal-containing gas into a plasma in step (b) of the combination of SAITO and ODA because IYER teaches that the incorporation of such at layer provides a gate electrode with minimized resistivity.
As for claim 11, SAITO teaches "In the FIG. 37B step, a metal film, for example a Ti film, 1016 is deposited on the boron adsorption layer 1015" (column 21, lines 7-9). SAITO and ODA are silent on vapor depositing the titanium in step (c). In fact, SAITO is completely silent on how the titanium is applied in its process.
IYER teaches "For either thermal CVD or plasma enhanced CVD processes, the reactive compounds are admitted as gases into the reaction chamber which is at low pressure (i.e., low compared to ambient pressure)" (column 7, lines 40-43), and "For example, in accordance with the present invention, a volatile compound containing titanium ( e.g., TiCl4) is heated and/or a carrier gas such as argon or helium is used to bubble through the titanium compound and introduce the compound into the reaction chamber" (column 7, lines 55-59), i.e. where to apply titanium to a substrate, supplying metal-containing gas to the substrate.
It would have been obvious to use the CVD process of IYER to apply the titanium layer of SAITO such that, when combined as the in claim 6, it includes wherein ( c) includes supplying a second metal-containing gas to the substrate, and the second metal-containing gas is a same gas as the first metal-containing gas because IYER teaches that such a process can produce a titanium layer of a desired thickness based on time and temperature.
As for claim 12, SAITO and ODA are silent on wherein the first metal-containing gas contains at least one metal selected from the group of titanium (Ti).
IYER teaches "For either thermal CVD or plasma enhanced CVD processes, the reactive compounds are admitted as gases into the reaction chamber which is at low pressure (i.e., low compared to ambient pressure)" (column 7, lines 40-43), and "For example, in accordance with the present invention, a volatile compound containing titanium ( e.g., TiCl4) is heated and/or a carrier gas such as argon or helium is used to bubble through the titanium compound and introduce the compound into the reaction chamber" (column 7, lines 55-59), i.e. where to apply titanium to a substrate, supplying metal-containing gas to the substrate.
It would have been obvious to one of ordinary skill in the art before the effective filing date to include wherein the first metal-containing gas contains at least one metal selected from the group of titanium (Ti), in step (b) of the combination of SAITO and ODA because IYER teaches that the incorporation of such at layer provides a gate electrode with minimized resistivity.
As for claim 13, SAITO and ODA are silent on wherein the first metal-containing gas is a titanium tetrachloride gas.
IYER teaches "For either thermal CVD or plasma enhanced CVD processes, the reactive compounds are admitted as gases into the reaction chamber which is at low pressure (i.e., low compared to ambient pressure)" (column 7, lines 40-43), and "For example, in accordance with the present invention, a volatile compound containing titanium ( e.g., TiCl4) is heated and/or a carrier gas such as argon or helium is used to bubble through the titanium compound and introduce the compound into the reaction chamber" (column 7, lines 55-59), i.e. wherein the first metal-containing gas is a titanium tetrachloride gas.
It would have been obvious to one of ordinary skill in the art before the effective filing date to include wherein the first metal-containing gas contains at least one metal selected from the group of titanium (Ti), in step (b) of the combination of SAITO and ODA because IYER teaches that the incorporation of such at layer provides a gate electrode with minimized resistivity.
As for claim 15, SAITO and ODA are silent on wherein the supplying the impurity-containing gas to the substrate without converting the impurity-containing gas into a plasma in (b) is performed in a state where a metal-containing gas is supplied to the substrate, and wherein (b) includes simultaneously performing the supplying the impurity-containing gas to the substrate without converting the impurity-containing gas into a plasma and supplying a first metal-containing gas to the substrate.
IYER teaches "The reaction of the titanium containing compounds and boron containing compounds is carried out for a time sufficient to deposit the desired thickness of the titanium diboride layer on the underlying surface" (column 8, lines 15-18) and "For either thermal CVD or plasma enhanced CVD processes, the reactive compounds are admitted as gases into the reaction chamber which is at low pressure (i.e., low compared to ambient pressure)" (column 7, lines 40-43), i.e. wherein the supplying the impurity-containing gas to the substrate without converting the impurity-containing gas into a plasma in (b) is performed in a state where a metal-containing gas is supplied to the substrate, and wherein (b) includes simultaneously performing the supplying the impurity-containing gas to the substrate without converting the impurity-containing gas into a plasma and supplying a first metal-containing gas to the substrate.
It would have been obvious to one of ordinary skill in the art before the effective filing date to include wherein the supplying the impurity-containing gas to the substrate without converting the impurity-containing gas into a plasma in (b) is performed in a state where a metal-containing gas is supplied to the substrate, and wherein (b) includes simultaneously performing the supplying the impurity-containing gas to the substrate without converting the impurity-containing gas into a plasma and supplying a first metal-containing gas to the substrate in step (b) of the combination of SAITO and ODA because IYER teaches that the incorporation of such at layer provides a gate electrode with minimized resistivity.
The claim rejection(s) under AIA 35 U.S.C. 103 as being obvious over Saito US Patent Number 5,124,272 hereinafter SAITO, Oda US Patent Number 6,313,036 hereinafter ODA and Iyer US Patent Number 6,156,630 hereinafter IYER as applied to claim 1 and 6 above, and further in view of Ma et al. US PGPub 2010/0062149 hereinafter MA on claims 8 and 9 are maintained. The rejection is repeated below for convenience.
As for claim 8, SAITO, ODA and IYER are silent on wherein (b) includes alternately repeating the supplying the impurity-containing gas to the substrate without converting the impurity containing gas into a plasma and the supplying the first meta/containing gas to the substrate.
MA teaches "Embodiments of the invention provide methods for depositing a material on a substrate within a processing chamber during a vapor deposition process" (abstract, lines 1-3).
MA further teaches "Exemplary chemical precursors that may also be used in vapor deposition ( e.g., ALD or CVD) processes include titanium precursors, tungsten precursors, hafnium precursors, zirconium precursors, aluminum precursors, cobalt precursors, ruthenium precursors, copper precursors, silicon precursors, nitrogen precursors, oxygen precursors, as well as other chemical precursors" (paragraph 67, lines 3-9) and "pulse of a boron precursor ( e.g., diborane) during the ALD cycle" (paragraph 60, lines 33-34), and "In step 108, a pulse of a first chemical precursor is administered into the processing chamber, pulsed into the stream of carrier gas, and adsorbed on the substrate surface" (paragraph 40 , lines 1-3).
MA teaches "An ALD process generally contains a multiplicity of cycles, such that a substrate surface is sequentially exposed to two or more reagents or precursors during each ALD cycle while forming the deposited layer. The thickness of a deposited material is the product of the number of conducted ALD cycles by the thickness of each deposited layer. The deposition rate may be used to adjust the thickness of the deposited material" (paragraph 8, lines 1-8), i.e. wherein (b) includes alternately repeating the supplying the impurity-containing gas to the substrate without converting the impurity containing gas into a plasma and the supplying the first metal-containing gas to the substrate.
It would have been obvious to one of ordinary skill in the art before the effective filing date to include wherein (b) includes alternately repeating the supplying the impurity-containing gas to the substrate without converting the impurity containing gas into a plasma and the supplying the first metal-containing gas to the substrate in the process of SAITO and ODA because MA teaches that such a deposition process allows for the direct control of thickness of what is applied.
As for claim 9, Examiner draws attention to the combination above and further notes that MA teaches "The reactive compounds may be in a state of gas, plasma, vapor, fluid or other state of matter useful for a vapor deposition process" (paragraph 106, lines 6-8), i.e. wherein the supplying the impurity-containing gas to the substrate without converting the impurity-containing gas into a plasma is performed first.
It would have been obvious to one of ordinary skill in the art before the effective filing date to include wherein the supplying the impurity-containing gas to the substrate without converting the impurity-containing gas into a plasma is performed first in the process of SAITO and ODA because MA teaches that such a deposition process allows for the direct control of thickness of what is applied.
The claim rejection(s) under AIA 35 U.S.C. 103 as being obvious over Saito US Patent Number 5,124,272 hereinafter SAITO, Oda US Patent Number 6,313,036 hereinafter ODA and Iyer US Patent Number 6,156,630 hereinafter IYER as applied to claim 1 and 6 above, and further in view of Ma et al. US PGPub 2010/0062149 hereinafter MA on claim 14 is withdrawn because the claim has been cancelled.
The claim rejection(s) under AIA 35 U.S.C. 103 as being obvious over Saito US Patent Number 5,124,272 hereinafter SAITO and Oda US Patent Number 6,313,036 hereinafter ODA as applied to claim 1 and 24 above, and further in view of Yamasaki et al. US PGPub 2018/0308709 hereinafter YAMAZAKI on claim 25 is maintained. The rejection is repeated below for convenience.
As for claim 25, SAITO teaches "An inert film in the form of a less than about 30A thick natural oxide film is removed by the hydrogen from the surface of silicon substrate 1 to thereby clean the substrate surface" (column 4, lines 50-54) and "By this step, a natural oxide film is removed from the surface of the silicon substrate 201 to thereby expose a chemically active silicon face" (column 7, lines 5-7), i.e. removing a native oxide film on the surface of the substrate.
SAITO and ODA is silent on wherein (d) includes supplying a gas containing a halogen element and a basic gas as process gases to the substrate.
YAMASAKI teaches "A titanium silicide region forming method includes: performing a pretreatment to expose a clean surface of a silicon layer of a workpiece; forming a titanium-containing region and a titanium silicide region on the silicon layer after performing the pretreatment" (abstract, lines 1-5).
YAMASAKI teaches "In the pretreatment, the oxide film (natural oxide film) on the surface of the silicon layer SL of the workpiece Wis removed. Specifically, in step ST1, the workpiece Wis transferred to the process module PM1. Then, a mixed gas of a hydrogen fluoride gas and an ammonia gas is supplied to the depressurized chamber inside the process module PM1. As a result, the silicon oxide constituting the oxide film on the surface of the silicon layer SL of the workpiece Wis transformed into ammonium fluorosilicate. Next, the workpiece Wis transferred to the process module PM4. Then, the workpiece W is heated in the depressurized chamber inside the process module PM4. The workpiece Wis heated to, for example, a temperature falling within a range of 50 degrees C. to 500 degrees C., alternatively 150 degrees C. to 200 degrees C. Thus, ammonium fluorosilicate is vaporized and generated gas is exhausted. As a result, the oxide film is removed. Thereafter, the workpiece Wis transferred to the process module PM2, i.e., the film forming apparatus 10A" (paragraph 52), i.e. wherein (d) includes supplying a gas containing a halogen element and a basic gas as process gases to the substrate.
It would have been obvious to one of ordinary skill in the art before the effective filing date to include wherein (d) includes supplying a gas containing a halogen element and a basic gas as process gases to the substrate in the process of SAITO and ODA because YAMASAKI teaches such a process removes silicon oxide from surfaces to prepare it for the formation of titanium silicide.
Response to Arguments
Applicant's arguments filed 2/27/26 have been fully considered but they are not persuasive.
Applicant’s argument is summarized and addressed below:
(a) Applicant argues that the cited references do not provide any teaching or suggestion to modify SAITO such that the impurity-containing layer formed by SAITO's non-plasma gas application would be used as a diffusion prevention layer on an already-doped region for suppressing dopant depletion into the metal silicide during subsequent silicidation as claimed.
Examiner notes that Applicant's argument is that neither SAITO or ODA teach BOTH limitation of ‘without plasma conversion' and forming a diffusion prevention layer. The entire argument hinges on the idea that because ODA fails to teach without plasma conversion, and SAITO does not teach a diffusion prevention layer, that they cannot render the claim obvious. However, as pointed in the rejection, ODA teaches applying a diffusion prevention layer with motivation to combine that layer into SAITO, and SAITO Teaches how to apply a layer of the same composition without plasma. Applicant has merely pointed out that the individual pieces of art do not anticipate the invention, but that is not the requirement for obviousness rejections. One cannot show nonobviousness by attacking references individually where the rejections are based on combinations of references. In re Keller, 642 F.2d 413, 208 USPQ 871 (CCPA 1981); In re Merck & Co., Inc., 800 F.2d 1091, 231 USPQ 375 (Fed. Cir. 1986).
Applicant’s arguments cannot be considered persuasive as their arguments only establish that the art does not anticipate the rejection, but does not address the fact that they can be combined to teach the invention with motivation.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
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/KRISTEN A DAGENAIS/Examiner, Art Unit 1717
/Dah-Wei D. Yuan/Supervisory Patent Examiner, Art Unit 1717
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