DETAILED ACTION
This Office Action is in response to the applicant's application filed October 23rd, 2024. In virtue of this communication, claims 1-19 are currently presented in the instant application.
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1, 2, and 17-19 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Guo et al. (US 2021/0135053 A1; hereinafter Guo).
With respect to claim 1, Guo teaches a light-emitting diode device in Figs. 5-19 with Fig. 1 teaching overlapping subject matter, comprising:
a substrate 180 having a first surface (top surface 180 in Fig. 5) and a second surface (bottom surface 180 in Fig. 5) arranged opposite to each other, wherein the first surface comprises a first region (at 116) and a second region (at 115), and the second region surrounds the first region (see Figs. 5, 8, 9, 18, and paragraphs 19, 37, 40);
a structural layer (comprising 131, 132, 270) covering the first region (at 116) and the second region (at 115) and at least comprising an electrode layer 270, a second insulating layer 132, and a first insulating layer 131 stacked in sequence from the first surface (top surface of 180 in Fig. 5) (see Figs. 5, 10-14, and paragraphs 25, 36, 37, 42, 45, 46); and
a light-emitting diode mesa 110 arranged above the first region (at 116) of the structural layer (comprising 131, 132, 270) and comprising a semiconductor epitaxial layer (113, 112, 111) comprising a second semiconductor layer 113, an active layer 112, and a first semiconductor layer 111 stacked in sequence from the first surface (top surface of 180 in Fig. 5) (see Figs. 5, 7-16, and paragraphs 20, 35, 40, 47).
With respect to claim 2, Guo teaches the light-emitting diode device according to claim 1, wherein the second region (at 115) comprises an edge region (outermost edge at 115) away from the first region (at 116), and a thickness of the first insulating layer 131 located in the edge region is between 0.1 μm and 1.4 μm (see Figs. 5, 10-14, and paragraph 36; note 5000 Å is 0.5 µm).
With respect to claim 17, Guo teaches the light-emitting diode device according to claim 1, wherein the light-emitting diode mesa 110 further comprises a conductive pillar (270 at 114) arranged on the semiconductor epitaxial layer (113, 112, 111), the conductive pillar (270 at 114) penetrates the second semiconductor layer 113, the active layer 112, and a portion of the first semiconductor layer 111, a sidewall of the conductive pillar (270 at 114) is the first insulating layer 131 and the second insulating layer 132 arranged in sequence, and the electrode layer 270 is formed on a sidewall of the second insulating layer 132 and the first semiconductor layer 131 to be electrically connected to the first semiconductor layer 111 (see Figs. 5, 9-14, 19, and paragraphs 35-37, 41, 45, 46).
With respect to claim 18, Guo teaches the light-emitting diode device according to claim 1, wherein a bonding layer (adhesive material) is further arranged between the structural layer (comprising 270, 132, 131) and the substrate 180, and a second electrode layer 191 is arranged on the second surface (bottom of 180 in Fig. 5) (see Fig. 5, and paragraphs 37, 38, 47).
With respect to claim 19, Guo teaches a wafer structure comprising a plurality of light-emitting diode devices according to claim 1 arranged in sequence, wherein edges of the second regions (at 115) of adjacent light-emitting diode devices are connected to each other to form a cutting path (see Fig. 8 and paragraphs 40, 47; note laser scribing).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 3, 4, 8-11, and 16 are rejected under 35 U.S.C. 103 as being unpatentable over Guo et al. (US 2021/0135053 A1; hereinafter Guo) in view of Hsu et al. (US 2021/0328117 A1; hereinafter Hsu).
With respect to claim 3, Guo discloses the light-emitting diode device according to claim 2.
Guo does not explicitly disclose wherein a total thickness of the first insulating layer and the second insulating layer located in the edge region is between 0.4 μm and 5 μm. However, Guo does disclose that the thickness of the first insulating layer 131 has a thickness not greater than 5000 Å (see Figs. paragraph 36; note 5000 Å is 0.5 µm).
Hsu discloses a light-emitting diode device in at least Figs. 4-6 wherein a sum of the thickness of the electrically connecting structure 2240, the insulating layer 2260, and the bonding layer (not shown) may not be greater than 5 μm, such as ranging from 3 μm to 5 μm (see Figs. 4-6 and paragraph 61; the thickness of the combination of layers is within the claimed range).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention that a total thickness of the first insulating layer and the second insulating layer located in the edge region of Guo would be between 0.4 μm and 5 μm because the combined teachings of Hsu and Guo disclose the general conditions of the claim and where the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the optimum or workable ranges by routine experimentation (see MPEP 2144.05 I).
With respect to claim 4, the combination of Guo and Hsu discloses the light-emitting diode device according to claim 3, wherein the second region (at 115) further comprises an electrode region (at 117) located between the edge region (outermost edge at 115) and the first region (at 116), wherein the first insulating layer 131 located in the electrode region (at 117) has a discontinuous region (region of 131 occupied by 160), and a first electrode 192 is arranged in the discontinuous region (region of 131 occupied by 160) (see Guo: Figs. 5 and 8-17 and paragraphs 36, 38, 40, 43, 46, 47).
With respect to claim 8, the combination of Guo and Hsu discloses the light-emitting diode device according to claim 4, wherein a width of the first electrode 192 is less than a width of the discontinuous region (region of 131 occupied by 160) (see Guo: Figs. 5 and 8-17 and paragraphs 36, 38, 40, 43, 46, 47; 160 extends over areas 116 and 117, 192 is only at 117).
With respect to claim 9, the combination of Guo and Hus discloses the light-emitting diode device according to claim 8, wherein the width of the discontinuous region (region of 131 occupied by 160) is between 2 μm and 4 μm (see Guo: Figs. 5 and 8-17 and paragraphs 36, 38, 40, 43, 46, 47; some arbitrarily defined region of 160 is obviously between 2-4 µm).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention that the width of the discontinuous region is between 2 μm and 4 μm because the discontinuous region arbitrarily defined and the combined teachings of Hsu and Guo disclose the general conditions of the claim. Where the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the optimum or workable ranges by routine experimentation (see MPEP 2144.05 I).
With respect to claim 10, the combination of Guo and Hsu discloses the light-emitting diode device according to claim 4, wherein a current spreading layer 160 is arranged between the first insulating layer 131 and the second insulating layer 132 and extends from the first region (at 116) to the electrode region (at 117), and the first electrode 192 is connected to the current spreading layer 160 (see Guo: Figs. 5 and 8-17 and paragraphs 36, 38, 40, 43, 46, 47).
With respect to claim 11, the combination of Guo and Hsu discloses the light-emitting diode device according to claim 10, wherein a thickness of the current spreading layer 160 is between 0.3 μm and 1 μm (see Guo: Figs. 5, 12, and paragraphs 22, 36; the thickness of 131 is not greater than 5000 Å or 0.5 µm and 160 is less than the thickness of layer 132. Also see Hsu: Figs. 4-6 and paragraph 61; the thickness of the combination of layers (2240, 2260 and bonding layer) is within the claimed range).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention that the thickness of the current spreading layer 160 would be between 0.3 μm and 1 μm as taught by Guo and Hsu because the combined teachings of Hsu and Guo disclose the general conditions of the claim and where the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the optimum or workable ranges by routine experimentation (see MPEP 2144.05 I).
With respect to claim 16, the combination of Guo and Hsu discloses the light-emitting diode device according to claim 10, wherein in a region corresponding to the light-emitting diode mesa 110, a through hole 133 is arranged in the first insulating layer 131, and a reflective metal layer (141, 142) is arranged between the first insulating layer 131 and the current spreading layer 160, the reflective metal layer (141, 142) covers the first insulating layer 131 at the light-emitting diode mesa 110 and fills the through hole 133 to be electrically connected to the second semiconductor layer 113, and a transparent conductive layer 120 is further arranged between the first insulating layer 131 and the second semiconductor layer 113 at the light-emitting diode mesa 110 (see Guo: Figs. 5, 9-11 and paragraphs 37, 38, 41-43; Al and Ag are reflective metals).
Claims 12 and 15 are rejected under 35 U.S.C. 103 as being unpatentable over Guo et al. (US 2021/0135053 A1; hereinafter Guo) in view of Hsu et al. (US 2021/0328117 A1; hereinafter Hsu) as applied to claim 4 above, and further in view of Choi et al. (US 2012/0032218 A1; hereinafter Choi).
With respect to claim 12, the combination of Guo and Hsu discloses the light-emitting diode device according to claim 4.
The combination does not disclose wherein a third insulating layer is arranged above a surface and a sidewall of the light-emitting diode mesa and the structural layer in the second region except the discontinuous region.
Choi discloses a light-emitting diode device in at least Fig. 8 wherein a third insulating layer 191 is arranged above a surface and a sidewall of the light-emitting diode mesa (comprising 150, 160, 170) and a structural layer (comprising 120, 130) in a second region except a discontinuous region (at 145) (see Fig. 8 and paragraphs 71-77).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention that the light-emitting device of the combination of Guo and Hsu would include a third insulating layer arranged above a surface and a sidewall of the light-emitting diode mesa and the structural layer in the second region except the discontinuous region as taught by Choi so as to protect the light emitting structure and when unevenness is formed on the passivation layers 191, an improved light extraction effect may be expected (see Choi: paragraph 77).
With respect to claim 15, the combination of Guo, Hsu, and Choi discloses the light-emitting diode device according to claim 12, wherein the first insulating layer (131 of Guo), the second insulating layer (132 of Guo), and the third insulating layer (191 of Choi) are all transparent insulating layers (see Guo: Figs. 5, 10-12 and paragraphs 25, 36. Also see Choi: Fig. 8 and paragraph 77. Note transparent materials for insulating layers).
Allowable Subject Matter
Claims 5-7, 13, and 14 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter: the prior art does not disclose or fairly suggest:
wherein the second region further comprises a middle region located between the edge region and the electrode region, and a thickness of the first insulating layer located in the edge region is less than a thickness of the first insulating layer located in the middle region, as called for in claim 5 (claim 13 depends from 5);
wherein the structural layer located in the edge region at least comprises the electrode layer and the second insulating layer stacked in sequence from the first surface, and a metal blocking wall is arranged above the second insulating layer, as called for in claim 6 (claims 7 and 14 depends from claim 6);
Inquiry
Any inquiry concerning this communication or earlier communications from the examiner should be directed to JORDAN M KLEIN whose telephone number is (571)270-7544. The examiner can normally be reached 9:00 am - 5:00 pm.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Sue Purvis can be reached at 571-272-1236. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/J.M.K/Examiner, Art Unit 2893
/SUE A PURVIS/ Supervisory Patent Examiner, Art Unit 2893
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