Prosecution Insights
Last updated: October 21, 2026
Application No. 18/929,676

OPTICAL CHIP AND PREPARATION METHOD FOR OPTICAL CHIP

Non-Final OA §103
Filed
Oct 29, 2024
Priority
Dec 19, 2023 — continuation of PCTCN2023139999
Examiner
CHU, CHRIS H
Art Unit
2874
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Wuhan Vanjee Optoelectronic Technology Co. Ltd.
OA Round
1 (Non-Final)
53%
Grant Probability
Moderate
1-2
OA Rounds
1y 1m
Est. Remaining
62%
With Interview

Examiner Intelligence

Grants 53% of resolved cases
53%
Career Allowance Rate
356 granted / 671 resolved
-14.9% vs TC avg
Moderate +9% lift
Without
With
+8.6%
Interview Lift
resolved cases with interview
Typical timeline
3y 0m
Avg Prosecution
43 currently pending
Career history
722
Total Applications
across all art units

Statute-Specific Performance

§101
0.5%
-39.5% vs TC avg
§103
74.6%
+34.6% vs TC avg
§102
20.7%
-19.3% vs TC avg
§112
1.6%
-38.4% vs TC avg
Black line = Tech Center average estimate • Based on career data from 671 resolved cases

Office Action

§103
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . DETAILED ACTION Information Disclosure Statement The information disclosure statement (IDS) submitted on October 29, 2024 has been considered by the Examiner. Drawings Nineteen sheets for formal drawings were filed October 29, 2024 and have been accepted by the Examiner. Specification Applicant’s cooperation is requested in correcting any errors of which applicant may become aware in the specification. Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. The factual inquiries set forth in Graham v. John Deere Co., 383 U.S. 1, 148 USPQ 459 (1966), that are applied for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows: 1. Determining the scope and contents of the prior art. 2. Ascertaining the differences between the prior art and the claims at issue. 3. Resolving the level of ordinary skill in the pertinent art. 4. Considering objective evidence present in the application indicating obviousness or nonobviousness. Claims 1-5 and 12-14 are rejected under 35 U.S.C. 103(a) as being unpatentable over Watts et al. (US 2019/0243081 A1 from Applicant’s Information Disclosure Statement). Regarding claims 1 and 12, Watts discloses an optical chip (100 in Figs. 2-18) and a preparation method for an optical chip, comprising a heat isolation substrate (130) and an optical device structure layer (102) formed based on a top silicon layer in an SOI substrate and located above the heat isolation substrate; wherein the heat isolation substrate is in a single-layer material structure, and the heat isolation substrate comprises at least one material layer formed of a material with a thermal conductivity less than 100 W/(m•K) (paragraph 0026); the optical device structure layer formed based on the top silicon layer in the SOI substrate sequentially comprises: a protection layer (bottom layer of 110 directly bonded to 130 in Fig. 2) which is a silicon dioxide material (paragraph 0003) deposited on the SOI substrate and located above the heat isolation substrate and fixedly connected with the heat isolation substrate; and a first optical device layer (top portion of 110) located on the protection layer and including at least one first optical device (104; paragraph 0024), wherein after providing and fixing the heat isolation substrate on the protection layer, then removing a substrate silicon layer (108) in the SOI substrate (Figs. 5-6; paragraph 0028). Still regarding claims 1 and 12, Watts teaches the claimed invention except for specifically stating the light beam emitted upwards to a detection space. However, optical emitting devices are known to emit light downwards and/or upwards and as such, one of ordinary skill in the art before the effective filing date of the claimed invention would have found it obvious for the light beam to be emitted upwards to a detection space as a matter of obvious design choice depending on the application. Regarding claim 2, Watts discloses a thickness of the heat isolation substrate is greater than 50 μm in paragraph 0026. Regarding claims 3 and 13, Watts discloses the heat isolation substrate is in the laminated structure (paragraph 0026 discloses other materials such as plastic, quartz and sapphire used in addition to glass), a thickness of the material layer formed of the material with a thermal conductivity less than 100 W/(m•K) is greater than or equal to 10 μm. Regarding claims 4 and 14, Watts discloses a material of the heat isolation substrate comprises one or more of silicon dioxide, quartz, glass, and plastic in paragraph 0026. Regarding claim 5, Watts discloses the first optical device layer (104) is formed of a silicon material (paragraph 0024); and the optical device structure layer further comprises: a second optical device layer (114) located between the first optical device layer and the protection layer, formed of a silicon nitride material (paragraph 0024) and including at least one second optical device; and a first spacer layer (layer between 104 and 114) located between the first optical device layer and the second optical device layer for spacing the first optical device layer and the second optical device layer. Claims 6-11 and 15-17 are rejected under 35 U.S.C. 103(a) as being unpatentable over Watts et al. (US 2019/0243081 A1 from Applicant’s Information Disclosure Statement) in view of Qiang et al. (CN 113841295 A from Applicant’s Information Disclosure Statement), further in view of Wu et al. (CN 113608197 A from Applicant’s Information Disclosure Statement). Regarding claims 6-8, Watts teaches the claimed invention except for an antenna array. Qiang discloses an antenna array having an optical device layer (Figs. 1-3) comprising a first coupler (light must be coupled into the device), a first beam splitter (202), a first phase shifter (200), and a first optical antenna (104). Since both of the inventions relate to optical devices, one of ordinary skill in the art before the effective filing date of the claimed invention would have found it obvious to use an antenna array as disclosed by Qiang in the device of Watts for the purpose of controlling a plurality of light beams. Still regarding claims 6-8, the proposed combination of Watts and Qiang teaches the claimed invention except for a second optical device layer. Wu discloses an antenna array having an optical device layer (Figs. 3A-3B) comprising a first coupler a first optical antenna (320a) and a second optical antenna (320b) which are combined to form a third optical antenna by coupling, and a reflection layer (330) located between the second optical device layer and a protection layer (layer below 330) and comprising a reflection structure configured to upwardly reflect light beams emitted from the optical antennas; and a second spacer layer located between the reflection layer and the second optical device layer for spacing the reflection layer and the second optical device structure; and a projection of the reflection layer in a vertical direction partially or completely overlaps with a projection of the optical antennas. Since all of the inventions relate to optical devices, one of ordinary skill in the art before the effective filing date of the claimed invention would have found it obvious to use a second optical device layer as disclosed by Wu in the device of the proposed combination of Watts and Qiang for the purpose of improving the reliability and stability. In the proposed combination, one having ordinary skill in the art would find it obvious to combine the other optical devices in order to further improve the reliability and stability of the optical chip. Regarding claims 9-11, the proposed combination of Watts, Qiang and Wu teaches the claimed invention except for specifically stating an optical correction structure. However, Qiang discloses an optical correction structure (404 in Fig. 4B) located for heating an optical antenna to change the refractive index. As such, it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to use an optical correction structure in the proposed combination of Watts, Qiang and Wu for the purpose of performing additional adjustment to the optical signal. Further, Qiang discloses a plurality of groups of heating structures in Figs. 3 and 4B and as such, one having ordinary skill would find it obvious to use different groups of heating structures in a plurality of groups of heating structures configured to heat different parts of any of the optical antennas, wherein heating parameters of different groups of heating structures among the plurality of groups of heating structures are the same; or, heating parameters of different groups of heating structures among the plurality of groups of heating structures are different as a matter of obvious design choice depending on the application. Regarding claims 15-17, the proposed combination of Watts, Qiang and Wu teaches the claimed invention except for specifically stating before forming the protection layer, depositing a silicon dioxide material on the SOI substrate, where the first optical device layer is formed, to form a first spacer layer; and forming a silicon nitride material layer on the first spacer layer, and forming a second optical device layer in the silicon nitride material layer. However, it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to deposit a silicon dioxide material on the SOI substrate, where the first optical device layer is formed, to form a first spacer layer; and forming a silicon nitride material layer on the first spacer layer, and forming a second optical device layer in the silicon nitride material layer before forming the protection layer in order to form the layers from bottom to top sequentially. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to CHRIS H CHU whose telephone number is (571)272-8655. The examiner can normally be reached on Mon-Fri 9AM-5PM. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Uyen-Chau Le can be reached on 571-272-239797. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Any inquiry of a general or clerical nature should be directed to the Technology Center 2800 receptionist at telephone number (571) 272-1562. Chris H. Chu /CHRIS H CHU/ Primary Examiner, Art Unit 2874 September 24, 2026
Read full office action

Prosecution Timeline

Oct 29, 2024
Application Filed
Sep 29, 2026
Non-Final Rejection mailed — §103 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
53%
Grant Probability
62%
With Interview (+8.6%)
3y 0m (~1y 1m remaining)
Median Time to Grant
Low
PTA Risk
Based on 671 resolved cases by this examiner. Grant probability derived from career allowance rate.

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