Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
DETAILED ACTION
Claims 1 – 20 are presented for examination.
Priority
Applicant’s claim for the benefit of a prior-filed application under 35 U.S.C. 120 is acknowledged.
Information Disclosure Statement
The information disclosure statement (IDS) submitted on 06/20/2025 was received. The submission is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner.
Claim Rejections - 35 USC § 112
The following is a quotation of the first paragraph of 35 U.S.C. 112(a):
(a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention.
The following is a quotation of the first paragraph of pre-AIA 35 U.S.C. 112:
The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor of carrying out his invention.
Claims 3, 4, 6, 10, 11, 13, 17, 18, and 20 are rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the written description requirement. The claim(s) contains subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, or for applications subject to pre-AIA 35 U.S.C. 112, the inventor(s), at the time the application was filed, had possession of the claimed invention.
Regarding claims 3, 10, and 17, the limitations “determining a priority of the read operation” and “pausing the one of the interruptible write operation or the interruptible erase operation based on the priority of the read operation”, are not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, or for applications subject to pre-AIA 35 U.S.C. 112, the inventor(s), at the time the application was filed, had possession of the claimed invention.
Specifically, paragraph 0034 discloses “An erase, even if the erase takes a long time, should be performed at high priority if failing to do so results in running out of storage capacity, i.e., having insufficient storage capacity for new writes”. One of ordinary skill in the art, at the time of filling, would understand the language to establish a priority of an “erase” operation not a read.
Regarding claims 4, 11, and 18, the limitations “determining whether the request to read the data from the storage system has a lower latency” and “in response to determining that the request to read the data has the lower latency” are not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, or for applications subject to pre-AIA 35 U.S.C. 112, the inventor(s), at the time the application was filed, had possession of the claimed invention.
Specifically, the specification is silent regarding the comparison of read latency values in relation to “pausing the one of the interruptible write operation or the interruptible erase operation”. Paragraph 0034, discloses erase latency related to “pausing the one of the interruptible write operation or the interruptible erase operation”.
Regarding claims 6, 13, and 20, the limitations “pausing the one of the interruptible write operation or the interruptible erase operation comprises issuing an interrupt to a storage device performing the one of the interruptible write operation or the interruptible erase operation” is not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, or for applications subject to pre-AIA 35 U.S.C. 112, the inventor(s), at the time the application was filed, had possession of the claimed invention.
Specifically, the specification is silent regarding issuing an interrupt. Paragraph 0034 discloses an “interruptible write, or interruptible erase, could be paused”, but does not disclose a mechanism for communicating a “pause” to the system.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1 – 20 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Bennett, U.S. Publication 2011/0055453 (herein Bennett).
Regarding claims 1, 8, and 15, claim 1 as representative, Bennett discloses: A method, comprising: receiving a request to read data from a storage system (paragraph 0041); pausing, by a processing device of a storage system controller, one of an interruptible write operation or an interruptible erase operation being performed on flash memory of the storage system (paragraph 0041); performing a read operation for the request to read the data (paragraph 0041); and resuming the one of the interruptible write operation or interruptible erase operation (paragraph 0041).
Regarding claims 2, 9, and 16, claim 2 as representative, Bennett discloses: determining whether pausing the one of the interruptible write operation or the interruptible erase operation exceeds a latency limit (paragraph 0063, 0072).
Regarding claims 3, 10, and 17, claim 3 as representative, Bennett discloses: determining a priority of the read operation (paragraph 0041); and pausing the one of the interruptible write operation or the interruptible erase operation based on the priority of the read operation (paragraph 0041).
Regarding claims 4, 11, and 18, claim 4 as representative, Bennett discloses: determining whether the request to read the data from the storage system has a lower latency than the one of the interruptible write operation or the interruptible erase operation (paragraph 0041, 0063, 0072); and in response to determining that the request to read the data has the lower latency, pausing the one of the interruptible write operation or the interruptible erase operation (paragraph 0041, 0063, 0072).
Regarding claims 5, 12, and 19, claim 5 as representative, Bennett discloses: the storage system comprises one or more managed flash storage devices that offload management responsibilities to the storage system controller (figure 3, element 320).
Regarding claims 6, 13, and 20, claim 6 as representative, Bennett discloses: pausing the one of the interruptible write operation or the interruptible erase operation comprises issuing an interrupt to a storage device performing the one of the interruptible write operation or the interruptible erase operation (paragraph 0022, 0042, 0043).
Regarding claim 7, Bennett discloses: the storage system comprises differing types of flash memory (paragraph 0025).
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure:
Intrater; Gideon et al. US 20160012891 A1
Bennett; John G. US 20110055453 A1
Hyun; Jea Woong et al. US 20130205085 A1
Hyun; Jea Woong et al. US 20130198451 A1
Franceschini; et al. US 20110026318 A1
pausing, by a processing device of a storage system controller, one of an interruptible write operation or an interruptible erase operation being performed on flash memory of the storage system;
performing a read operation for the request to read the data;
Any inquiry concerning this communication or earlier communications from the examiner should be directed to DANIEL F MCMAHON whose telephone number is (571)270-3232. The examiner can normally be reached Monday-Thursday 9am - 5pm EST.
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/Daniel F. McMahon/Primary Examiner, Art Unit 2111