Prosecution Insights
Last updated: October 25, 2026
Application No. 18/934,080

Embedding Methods for Fine-Pitch Components and Corresponding Component Carriers

Non-Final OA §102§103§112
Filed
Oct 31, 2024
Priority
Apr 02, 2021 — CN 202110363356.1 +1 more
Examiner
TRAN, BINH BACH THANH
Art Unit
2847
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
AT&S Austria Technologie & Systemtechnik AG
OA Round
1 (Non-Final)
81%
Grant Probability
Favorable
1-2
OA Rounds
5m
Est. Remaining
93%
With Interview

Examiner Intelligence

Grants 81% — above average
81%
Career Allowance Rate
579 granted / 715 resolved
+13.0% vs TC avg
Moderate +12% lift
Without
With
+12.0%
Interview Lift
resolved cases with interview
Typical timeline
2y 5m
Avg Prosecution
24 currently pending
Career history
736
Total Applications
across all art units

Statute-Specific Performance

§101
0.4%
-39.6% vs TC avg
§103
59.0%
+19.0% vs TC avg
§102
29.7%
-10.3% vs TC avg
§112
9.3%
-30.7% vs TC avg
Black line = Tech Center average estimate • Based on career data from 715 resolved cases

Office Action

§102 §103 §112
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 112 The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. Claim 14 is rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. Claim 14 recites the limitation "the second set of electrically conductive contacts" in line 2. There is insufficient antecedent basis for this limitation in the claim. Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claim(s) 1 – 3, 5, 6, 15, 19 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Wei (US 20200413547). Regarding claim 1, Wei discloses a component carrier, comprising: a stack (the stack in Fig. 3) comprising at least one electrically conductive layer structure (the first circuit layer 12) and/or at least one electrically insulating layer structure (the insulating layer 11); a cavity (the opening 101) formed in the stack; an electrically conductive contact structure (the second connecting pad 131) at a bottom of the cavity (101); and a finishing structure (the terminal appears to be resembling a solder bump or solder ball of the component 20 on top of the pad 131) on the electrically conductive contact structure; wherein the finishing structure has a smaller lateral extension than the electrically conductive contact structure (Fig. 3). Regarding claim 2, Wei discloses the claimed invention as set forth in claim 1. Wei further discloses a component (the component 20) provided in the stack. Regarding claim 3, Wei discloses the claimed invention as set forth in claim 2. Wei further discloses the component is arranged on the at least one electrically insulating layer structure (11 or 14). Regarding claim 5, Wei discloses the claimed invention as set forth in claim 2. Wei further suggests an underfill (the adhesive 23, Fig. 3), arranged between the component and the bottom of the cavity. Regarding claim 6, Wei discloses the claimed invention as set forth in claim 5. Wei further discloses the underfill comprises at least one of the following features: the underfill is a monolithic material (a single block of adhesive 23, Fig. 3); the underfill extends vertically so that it is at least partially in contact with the lateral surfaces of the component (Fig. 3); the underfill planarly extends between two sidewalls defining the periphery of the cavity (Fig. 3). Regarding claim 15, Wei discloses the claimed invention as set forth in claim 2. Wei further suggests the component is configured as a bridge (the component 20 appears to be a bridge between the top side circuit and the bottom side circuit, Fig. 17). Regarding claim 19, Wei discloses a component carrier, comprising: a stack (the stack in Fig. 3) comprising at least one electrically conductive layer structure (the first circuit layer 12) and/or at least one electrically insulating layer structure (the insulating layer 11); a cavity (the opening 101) formed in the stack; an electrically conductive contact structure (the second connecting pad 131) at a bottom of the cavity (101); and a finishing structure (the terminal appears to be resembling a solder bump or solder ball of the component 20 on top of the pad 131) on the electrically conductive contact structure. Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows: 1. Determining the scope and contents of the prior art. 2. Ascertaining the differences between the prior art and the claims at issue. 3. Resolving the level of ordinary skill in the pertinent art. 4. Considering objective evidence present in the application indicating obviousness or nonobviousness. This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention. Claim(s) 4, 7, 8 is/are rejected under 35 U.S.C. 103 as being unpatentable over Wei (US 20200413547), in view of Lee (US 20170207196). Regarding claim 4, Wei discloses the claimed invention as set forth in claim 2. Wei does not explicitly disclose a further electrically conductive layer structure and/or a further electrically insulating layer structure arranged as a build-up structure on a core layer, wherein said component is arranged at least partially in the build-up structure, wherein the cavity is formed at least partially in the build-up structure, and wherein the component is at least partially arranged in the cavity. Lee teaches a further electrically conductive layer structure (conductors in layer 204; Fig. 2) and/or a further electrically insulating layer structure (a first build-up portion 204) arranged as a build-up structure (204) on a core layer (the core 202), wherein said component (component 214) is arranged at least partially in the build-up structure, wherein the cavity (recess 106) is formed at least partially in the build-up structure, and wherein the component is at least partially arranged in the cavity (Fig. 2). It would have been obvious to one having skill in the art at the effective filing date of the invention to include a core layer in order to provide a mechanical support for the circuit board. Regarding claim 7, Wei discloses the claimed invention as set forth in claim 2. Wei does not explicitly disclose the component comprises a first set of electrical contacts along a bottom side, and wherein said first set of electrical contacts is connected to the electrically conductive contact structure through the finishing structure. Lee teaches the component (the IC component 214, Fig. 2) comprises a first set of electrical contacts (the conductive contacts 220) along a bottom side, and wherein said first set of electrical contacts is connected to the electrically conductive contact structure (the pad same as the pad 110 of the via on the bottom side of the recess 106) through the finishing structure (112). It would have been obvious to one having skill in the art at the effective filing date of the invention to include a set of the electrical contacts for the components in order to mount the components to the circuit board and to establish the electrical connection between the circuitry of the circuit board and the mounted components. Regarding claim 8, Wei, in view of Lee, discloses the claimed invention as set forth in claim 7. Lee further suggests a solder structure (solder balls 252, Fig. 2) arranged between the finishing structure (112) and the first set of electrical contacts (220) of the component, wherein the space between the electrically conductive contact structure at the bottom of the cavity, the finishing structure, the solder structure, and the first set of electrical contacts of the component is filled by the underfill (Wei suggests in claim 1 that the adhesive 23 covers the side and the bottom of the component including all the electrical contacts, Fig. 3). Claim(s) 13 is/are rejected under 35 U.S.C. 103 as being unpatentable over Wei (US 20200413547), in view of Kapsula (US 10332832). Regarding claim 13, Wei discloses the claimed invention as set forth in claim 1. Wei does not explicitly disclose the cavity is filled by an electrically insulating material. Wei suggests that the cavity is filled with the adhesive 23 made of the thermal conductive material. The adhesive 23 connects all electrical contacts together. It is obvious that the adhesive 23 is an electrically insulating material to prevent short circuit between the electrical contacts. Kapsula suggests the resin material 112, Fig. 22C, fills the opening 126 and encapsulate the component 102. It would have been obvious to one having skill in the art at the effective filing date of the invention to use the electrically insulating material to fill the space between the contacts in order to prevent electrical short circuit between the contacts. Allowable Subject Matter Claims 9 – 12, 16 – 18, 20 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Reasons for Allowance The following is an examiner’s statement of reasons for allowance: Regarding claim 9, the prior art of record, taken alone or in combination, fails to teach or fairly suggest, in combining with other limitations recited in claims 1, 2, and 7, a combination of limitations that the component is a double-sided component, and wherein the component comprises a second set of electrical contacts on the side opposite to the bottom side. None of the reference art of record discloses or renders obvious such a combination. Regarding claim 16, the prior art of record, taken alone or in combination, fails to teach or fairly suggest, in combining with other limitations recited in claims 1, 2, and 15, a combination of limitations that at least two further components arranged at a main surface of the stack, wherein said at least two further components are connected to the bridge. None of the reference art of record discloses or renders obvious such a combination. Regarding claim 20, the prior art of record, taken alone or in combination, fails to teach or fairly suggest, in combining with other limitations recited in claim 1, a combination of limitations that the component is a double-sided component; wherein the component comprises a second set of electrical contacts on the side opposite to the bottom side; wherein the second set of electrical contacts is connected to the external side of the component carrier through vias with exposed pads on top of the vias; wherein the component comprises through-hole structures that connect the first set of electrical contacts and the second set of electrical contacts, respectively; wherein at least two of the electrical contacts of the second set of electrical contacts are connected with each other; wherein the cavity is filled by an electrically insulating material; wherein the vias connected to the second set of electrically conductive contacts pass through said electrically insulating material; wherein the component is configured as a bridge; at least two further components arranged at a main surface of the stack; wherein said at least two further components are connected to the bridge; wherein the at least two further components are electrically connected by the bridge; wherein the at least two further components are connected to the second set of electric contacts. None of the reference art of record discloses or renders obvious such a combination. Any comments considered necessary by applicant must be submitted no later than the payment of the issue fee and, to avoid processing delays, should preferably accompany the issue fee. Such submissions should be clearly labeled “Comments on Statement of Reasons for Allowance.” Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Zluc (US 20200365573) discloses a component mounted in a cavity, Fig. 8. Lin (US 20160262267) discloses a component mounted in a cavity, Fig. 4. Yamamoto (US 20120039055) discloses a component mounted in a cavity, Fig. 10. Any inquiry concerning this communication or earlier communications from the examiner should be directed to BINH B TRAN whose telephone number is (571)272-9289. The examiner can normally be reached M-F 8:00 AM - 6:00 PM. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Timothy J Dole can be reached at 571-272-2229. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /BINH B TRAN/Primary Examiner, Art Unit 2847
Read full office action

Prosecution Timeline

Oct 31, 2024
Application Filed
Sep 29, 2026
Non-Final Rejection mailed — §102, §103, §112 (current)

Precedent Cases

Applications granted by this same examiner with similar technology

Patent 12764862
EMBEDDING OF A CIRCUIT OF ELECTRONIC COMPONENTS IN A BENDABLE SECTION OF AN ELONGATED FLEXIBLE DEVICE
2y 5m to grant Granted Oct 13, 2026
Patent 12757332
FLEXIBLE PRINTED CIRCUIT TO SUSPENSION SOLDERING IMPROVEMENT
2y 5m to grant Granted Oct 06, 2026
Patent 12757328
PRINTED CIRCUIT BOARD
2y 4m to grant Granted Oct 06, 2026
Patent 12750952
INTERCONNEXION FILM AND ELECTRONIC STRUCTURE COMPRISING SUCH A FILM
2y 2m to grant Granted Sep 29, 2026
Patent 12739984
DISPLAY DEVICE
2y 8m to grant Granted Sep 15, 2026
Study what changed to get past this examiner. Based on 5 most recent grants.

Strategy Recommendation AI-generated — please review before filing

Get a prosecution strategy drawn from examiner precedents, rejection analysis, and claim mapping.
Typically takes 5-10 seconds — AI-generated, attorney review required before filing

Prosecution Projections

1-2
Expected OA Rounds
81%
Grant Probability
93%
With Interview (+12.0%)
2y 5m (~5m remaining)
Median Time to Grant
Low
PTA Risk
Based on 715 resolved cases by this examiner. Grant probability derived from career allowance rate.

Sign in with your work email

Enter your email to receive a magic link. No password needed.

Personal email addresses (Gmail, Yahoo, etc.) are not accepted.

Free tier: 3 strategy analyses per month