DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
In addressing the rejection ground, each claim may not have been separately discussed to the extent the claimed features are the same as or similar to the previously-discussed features; the previous discussion is construed to apply for the other claims in the same or similar way.
In the office action, “/” should be read as and/or as generally understood. For example, “A/B” means A and B, or A or B.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claim(s) 1-11 and 13-19 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Brownell (US 5,422,547).
Regarding claim 1, Brownell discloses a dimmer structured [see figs. 1-2, e.g. 18/16] to be placed between a power source [T1/T2] and a load [e.g. lamp 12], comprising: a TRIAC (triode alternating current) [e.g. 52] having a gate, a first terminal [e.g. the bottom/top terminal] electrically connected to the load [see fig. 1, dimmer 18 and lamp 12 are electrically connected in parallel], and a second terminal [e.g. the top/bottom terminal] electrically connected to the power source, wherein the TRIAC is structured to conduct load current during an on phase and not conduct the load current during an off phase [ see at least Col. 5, lines 13-31]; a snubber circuit [e.g. 54 (or C4, R5/R4/R5A; C3, R3/R5/R5A;)] including a third resistor [e.g. R1] and a capacitor [e.g. C2] electrically connected to the third resistor at a node [the node between the capacitor and the third resistor], the third resistor being electrically connected to the power source at one end opposite the node, the capacitor being electrically connected to the first terminal of the TRIAC at one end opposite the node, wherein the snubber circuit is structured to limit fast voltage transients; and a bidirectional switch [e.g. 50, 48, 38, 36] including a first MOSFET (metal-oxide-semiconductor field-effect transistor) [e.g. Q3/Q2] having drain that is electrically connected to the node of the snubber circuit, a second MOSFET [e.g. Q2/Q3] having drain that is electrically connected to the gate of the TRIAC, a first resistor [e.g. R6/R5A] electrically connected to source of the first MOSFET, and a second resistor [e.g. R4/R5/R3] electrically connected to the first resistor at one end and source of the second MOSFET at another end, wherein the bidirectional switch is structured to transmit a gate current pulse signal [e.g. the output signal of 50] to the gate of the TRIAC to switch the TRIAC between the OFF phase and the ON phase.
Regarding claim 2, Brownell discloses the dimmer of claim 1, wherein the drain [e.g. 46] of the first MOSFET [e.g. Q3] is directly connected to the node of the snubber circuit and is not electrically connected to a line conductor [e.g. the line between R2 and L1, when 52 is off] coupled to the power source.
Regarding claim 3, Brownell discloses the dimmer of claim 1, wherein upon turning ON the first MOSFET and the second MOSFET, current flows to the gate of the TRIAC from the capacitor of the snubber circuit [e.g. C3/C4] via the first MOSFET and the second MOSFET.
Regarding claim 4, Brownell discloses the dimmer of claim 1, wherein the first resistor and the second resistor [e.g. R3, R5/R5A] are structured to limit the current flowing to the gate of the TRIAC upon turning ON the first MOSFET and the second MOSFET.
Regarding claim 5, Brownell discloses the dimmer of claim 1, wherein the capacitor [e.g. C4/C3] acts as an energy source to the TRIAC during the switching ON of the TRIAC.
Regarding claim 6, Brownell discloses the dimmer of claim 1, wherein upon turning ON the first MOSFET and the second MOSFET, gate current pulse rises to a peak and remains constant during switching ON of the TRIAC such that unwanted accidental switching OFF of the TRIAC is avoided [having similar structure with the current application].
Regarding claim 7, Brownell discloses the dimmer of claim 6, wherein the peak of the gate current pulse lasts for a period to maintain gate driving of the TRIAC until the TRIAC is fully switched ON [having similar structure with the current application, also see capacitor C3/C4].
Regarding claim 8, Brownell discloses the dimmer of claim 7, wherein the peak of the gate current pulse is independent of line voltage.
Regarding claim 9, Brownell discloses the dimmer of claim 1, wherein current from the capacitor continues to flow to the gate of the TRIAC until the capacitor is discharged.
Regarding claim 10, Brownell discloses the dimmer of claim 1, wherein the capacitor is discharged through the first and second MOSFETs, the TRIAC [e.g. 52], and in parallel through the third resistor [e.g. R5/R4/R3] of the snubber circuit.
Regarding claim 11, Brownell discloses the dimmer of claim 1, wherein gate current pulse has a falling edge spanning over a second period such that unwanted accidental switching OFF of the TRIAC is avoided [see at least Col. 5, lines 12-63].
Regarding claim 13, Brownell discloses the dimmer of claim 1, wherein the bidirectional switch further comprises: a fourth resistor [e.g. R3] electrically connected between the gate of the TRIAC and the first terminal [e.g. the top/bottom terminal] of the TRIAC, the fourth resistor being structured to increase immunity against false triggering of the TRIAC.
Regarding claim 14, Brownell discloses a bidirectional switch for use in a dimmer structured to be placed between a power source and a load, the dimmer having a snubber circuit including a resistor and a capacitor connected to each other at a node, and a TRIAC including a gate, first terminal structured to be connected to the load and the capacitor, and second terminal structured to be connected to the power source, comprising: a first MOSFET (metal-oxide-semiconductor field-effect transistor) having drain that is structured to be electrically connected to the node of the snubber circuit; a first resistor having first and second ends, the first end structured to be electrically connected to source of the first MOSFET; a second resistor having third and fourth ends, the third end structured to be electrically connected to the first end of the first resistor; and a second MOSFET having source that is structured to be electrically connected to the fourth end of the second resistor and drain that is structured to be electrically connected to the gate of the TRIAC, wherein the bidirectional switch is structured to transmit a gate current pulse signal to the gate of the TRIAC to switch the TRIAC between the OFF phase and the ON phase. Please see rejection of claim 1.
Regarding claim 15, Brownell discloses the bidirectional switch of claim 14, wherein the drain of the first MOSFET is structured to be directly connected to the node of the snubber circuit, and not connected to a line conductor coupled to the power source. Please see rejection of claim 2.
Regarding claim 16, Brownell discloses the bidirectional switch of claim 14, wherein upon turning ON the first MOSFET and the second MOSFET, current flows to the gate of the TRIAC from the capacitor of the snubber circuit via the first MOSFET and the second MOSFET and the capacitor acts as an energy source to the TRIAC during the switching ON of the TRIAC. Please see rejection of claim 3.
Regarding claim 17, Brownell discloses the bidirectional switch of claim 14, wherein the first resistor and the second resistor are structured to limit the current flowing to the gate of the TRIAC upon turning ON the first MOSFET and the second MOSFET. Please see rejection of claim 4.
Regarding claim 18, Brownell discloses the bidirectional switch of claim 14, wherein upon turning ON the first MOSFET and the second MOSFET, gate current pulse rises to a peak, and wherein the gate current pulse remains constant during switching ON of the TRIAC such that an unwanted accidental switching OFF of the TRIAC is prevented. Please see rejection of claim 6.
Regarding claim 19, Brownell discloses the bidirectional switch of claim 18, wherein the peak of the gate current pulse lasts for a period to maintain gate driving of the TRIAC until the TRIAC is fully switched ON. Please see rejection of claim 7.
Allowable Subject Matter
Claims 12 and 20 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to PATRICK C CHEN whose telephone number is (571)270-7207. The examiner can normally be reached M-F Flexible 9:00-5:30.
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/PATRICK C CHEN/Primary Examiner, Art Unit 2842