Prosecution Insights
Last updated: May 29, 2026
Application No. 18/936,558

POWER OVER ETHERNET (POE++) LIGHT EMITTING DIODE (LED) DRIVER AND A FIVE-CHANNEL CONTROLLER ASSEMBLY

Non-Final OA §103
Filed
Nov 04, 2024
Priority
Dec 07, 2023 — IN 202341083436
Examiner
CHEN, PATRICK C
Art Unit
2842
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Sgi Technology Group Limited
OA Round
1 (Non-Final)
82%
Grant Probability
Favorable
1-2
OA Rounds
9m
Est. Remaining
92%
With Interview

Examiner Intelligence

Grants 82% — above average
82%
Career Allowance Rate
468 granted / 569 resolved
+14.2% vs TC avg
Moderate +10% lift
Without
With
+9.5%
Interview Lift
resolved cases with interview
Typical timeline
2y 4m
Avg Prosecution
24 currently pending
Career history
605
Total Applications
across all art units

Statute-Specific Performance

§101
0.1%
-39.9% vs TC avg
§103
78.8%
+38.8% vs TC avg
§102
15.1%
-24.9% vs TC avg
§112
3.5%
-36.5% vs TC avg
Black line = Tech Center average estimate • Based on career data from 569 resolved cases

Office Action

§103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. In addressing the rejection ground, each claim may not have been separately discussed to the extent the claimed features are the same as or similar to the previously-discussed features; the previous discussion is construed to apply for the other claims in the same or similar way. In the office action, “/” should be read as and/or as generally understood. For example, “A/B” means A and B, or A or B. Claim Objections Claims 1-5 are objected to because of the following informalities: Claim 1 recites ”each channel configurable to”. It should be recited as --each channel configured to--, because configurable is not a positive citation. In addition, Claim 1 recites ”at the source side of the assembly”. It should be recited as --at a source side of the assembly--. Claims 2-5 are objected to based on the dependency from claim 1. Appropriate correction is required. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 1-5 is/are rejected under 35 U.S.C. 103 as being unpatentable over Kanarellis et al. (hereinafter Kanarellis; US 2020/0235607) in view of Hick (US 2018/0054083), or in view of Hick (US 2018/0054083) and Wendt et al. (hereinafter Wendt; US 10,231,314). Regarding claim 1, Kanarellis discloses a Power over Ethernet (PoE++) Light Emitting Diode (LED) driver and a five-channel controller assembly [e.g. fig. 1/2], the assembly (100) comprises: b. a five-output channel (102) [e.g. when N=5 for POE [N]] with each channel configurable to offer constant voltage and constant current output [e.g. when a LED light fixture is at a constant brightness, the POE output is at a constant voltage and a constant current because when the resistance is fixed when LED is at a constant brightness], thereby facilitating an ethernet-based lighting control system for a plurality of lighting applications [see at least paras. 0044, 0239]; c. an integrated power conversion controller (103) with built-in protection mechanism for managing overloading faults [para. 0018] at the source side of the assembly (100), thereby enabling control of one or more combination of fixtures; and d. a plurality of waterproof and dustproof attributes (104) [e.g. 0041, 0139, 0174, 0175, 0197, 0201, 0206] characterized by a predefined operational temperature range [see at least 0116, 0175]. It’s well-known to provide a PoE input passthrough port for powering and controlling one or more PoE compatible devices. For example, Hick discloses a PoE input passthrough port [see PoE input; the power/data signals pass through a cable/wire from a source to the PoE input] for powering and controlling one or more PoE compatible devices [e.g. LED light fixtures, see at least paras. 0016-0017]. Also, when a LED light fixture is at a constant brightness [e.g. a predetermined brightness, para. 0017 Hick], the POE output is at a constant voltage and a constant current. Therefore, it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to modify the device disclosed by Kanarellis in accordance with the teaching of Hick regarding POE inputs in order to provide an alternative power and communication data from a well-known PoE input [see at least figs. 7-8]. The combination does not explicitly disclose PoE++ input for powering and controlling one or more PoE+ compatible devices. However, it’s notorious well-known to implement a newer standard, so the it provides improvement and backward compatibility. The official notice of the foregoing fact is hereby taken. For example, Crenshaw (US 9941737) discloses the improvement of PoE++ [see Col. 1, lines 36-48]. Therefore, it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to modify the device disclosed by Kanarellis in accordance with the teaching of official notice regarding POE++ in order to provide more power/backward compatibility. Assuming, arguendo, the above combination does not disclose constant voltage and constant current output. To provide an output having constant voltage and/or constant current is known to one having ordinary skills. For example, Wendt discloses to provide an output having constant voltage and/or constant current [Col. 10, lines 45-53]. Therefore, it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to modify the device disclosed by Kanarellis and the official notice in accordance with the teaching of Wendt regarding an output value to loads in order to conquer overload [Col. 10, lines 45-53]. Regarding claim 2, the combination discussed above discloses the assembly (100) as claimed in claim 1, wherein the waterproof and dustproof attributes (104), culminates in an Ingress Protection (IP) rating, suitable for outdoor installation of the assembly (100). The combination does not explicitly disclose Ingress Protection (IP) rating. However, it’s well-known to implement Ingress Protection (IP) rating to achieve improved protection. The official notice of the foregoing fact is hereby taken. For example, Ericson (US 10,724,724) discloses to implement a device with IP rating suitable to be used in hostile environments. Therefore, it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to implement a device with IP rating suitable to be used in hostile environments. Regarding claim 3, the combination discussed above discloses the assembly (100) as claimed in claim 1, except wherein the assembly (100) is characterized by its compact form factor with dimensions measuring 3 inches in width, 7 inches in length, and 2 inches in height. However, it would have been obvious matter of design choice to have an area of the first receiving capacitive element smaller, since such a modification would have involved a mere change in the size of a component. A change in size is generally recognized as being within the level of ordinary skill in the art. In re Rose, 105 USPQ 237 (CCPA 1955). Regarding claim 4, the combination discussed above discloses the assembly (100) as claimed in claim 1, wherein the assembly (100) integrates with advanced home automation systems through one or more custom firmware drivers, using one or more connected nodes [see at least paras. 0014, 0016-0017, 0036-0037, 0040 Kanarellis]. Regarding claim 5, the combination discussed above discloses the assembly (100) as claimed in claim 1, wherein the assembly (100) is configured with a plurality of network communication capabilities through an Internet Protocol (IP) address and a Media Access Control (MAC) address [see at least paras. 0014-0021, 0199 Kanarellis; since Kanarellis and Hick provide PoE, Bluetooth and internet connection, the device must have IP and MAC address; in addition, a device connected to Internet is notorious well-known to have IP address and MAC address. The official notice of the foregoing fact is hereby taken.], thereby facilitating network-based control, measurement, and monitoring [see at least paras. 0014-0021, and claims of Kanarellis]. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to PATRICK C CHEN whose telephone number is (571)270-7207. The examiner can normally be reached M-F Flexible 9:00-5:30. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Lincoln Donovan can be reached at 571-272-1988. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /PATRICK C CHEN/Primary Examiner, Art Unit 2842
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Prosecution Timeline

Nov 04, 2024
Application Filed
Feb 19, 2026
Non-Final Rejection mailed — §103 (current)

Precedent Cases

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
82%
Grant Probability
92%
With Interview (+9.5%)
2y 4m (~9m remaining)
Median Time to Grant
Low
PTA Risk
Based on 569 resolved cases by this examiner. Grant probability derived from career allowance rate.

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