Prosecution Insights
Last updated: October 02, 2026
Application No. 18/939,729

PLASMA PROCESSING APPARATUS

Non-Final OA §103
Filed
Nov 07, 2024
Priority
May 19, 2022 — JP 2022-082268 +1 more
Examiner
LUONG, HENRY T
Art Unit
Tech Center
Assignee
Tokyo Electron Limited
OA Round
1 (Non-Final)
76%
Grant Probability
Favorable
1-2
OA Rounds
7m
Est. Remaining
94%
With Interview

Examiner Intelligence

Grants 76% — above average
76%
Career Allowance Rate
508 granted / 670 resolved
+15.8% vs TC avg
Strong +18% interview lift
Without
With
+18.0%
Interview Lift
resolved cases with interview
Typical timeline
2y 5m
Avg Prosecution
25 currently pending
Career history
685
Total Applications
across all art units

Statute-Specific Performance

§101
1.0%
-39.0% vs TC avg
§103
66.6%
+26.6% vs TC avg
§102
12.0%
-28.0% vs TC avg
§112
14.6%
-25.4% vs TC avg
Black line = Tech Center average estimate • Based on career data from 670 resolved cases

Office Action

§103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Remarks This Office Action is in response to the application filed on 11/07/24. Examiner acknowledged that claims 1-16 are pending. The information disclosure statement (IDS) submitted on 11/07/24 is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner. Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55. Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim(s) 1-2, 10, 12-13, 15-16 are rejected under 35 U.S.C. 103 as being unpatentable over Tamamushi (US 2021/0287883). PNG media_image1.png 404 513 media_image1.png Greyscale Examiner markup Fig. 3 Regarding Claim 1, Tamamushi teaches a plasma processing apparatus comprising: a chamber (Fig. 3: 10); a substrate support (Fig. 4: 16) disposed in the chamber, the substrate support including a base (Fig. 4: 17), a dielectric portion (Fig. 3: 21d) disposed on the base, a first bias electrode (Fig. 3: 21a), and a second bias electrode (fig. 3: 22a), the dielectric portion including a first region (Fig. 3: area under W) configured to support a substrate placed thereon and a second region (Fig. 3; area under ER) surrounding the first region and configured to support an edge ring (Fig. 3: ER) placed thereon, the first bias electrode being disposed in the first region, and the second bias electrode being disposed in at least the second region; and at least one bias power source (Fig. 3: 70) configured to supply an electric bias for ion attraction to the first bias electrode and the second bias electrode. Tamamushi does not explicitly teach in Fig. 3 wherein a shortest distance dW1 between a placement position of the substrate in the first region and the first bias electrode, a shortest distance dWE between the first bias electrode and a placement position of the edge ring in the second region, a shortest distance dE1 between the second bias electrode and the placement position of the edge ring, and a shortest distance dEW between the second bias electrode and the placement position of the substrate satisfy the following expressions (A) and (B). dW1 ≤ dWE ... (A) dE1 ≤ dEW ... (B). However, from Examiner markup above, it is obvious to one of ordinary skill in the art before the effective filling of the claimed invention to understand that the distances are taught since the placement of the electrodes and region are illustrated by Tamamushi. Regarding Claim 2, Tamamushi teaches the plasma processing apparatus according to claim 1, wherein the plasma processing apparatus comprises a first bias power source (Fig. 3: 55) electrically coupled to the first bias electrode and a second bias power source (Fig. 3: 71, 72) electrically coupled to the second bias electrode, as the at least one bias power source. Regarding Claim 10, Tamamushi teaches the plasma processing apparatus according to claim 1, wherein the electric bias is bias radio frequency power or a pulse of a voltage periodically generated (Fig. 5). Regarding Claim 12, Tamamushi teaches the plasma processing apparatus according to claim 1, wherein a part of the second region is integrated with the base (Fig. 3). Regarding Claim 13, Tamamushi teaches the plasma processing apparatus according to claim 1, wherein the first region and the second region are joined at a boundary between the first region and the second region (Fig. 3). Regarding Claim 15, Tamamushi teaches the plasma processing apparatus according to claim 1, wherein the shortest distance dW1 is longer than the shortest distance dE1 (Examiner markup Fig. 3). Regarding Claim 16, Tamamushi teaches the plasma processing apparatus according to claim 1, wherein the shortest distance dWE is longer than the shortest distance dEW (Examiner markup Fig. 3). Claim(s) 3 is/are rejected under 35 U.S.C. 103 as being unpatentable over Tamamushi as applied to claim 1 in view of Tamura (JP 2021158134 A). Regarding Claim 3, Tamamushi teaches the plasma processing apparatus according to claim 1, wherein the plasma processing apparatus comprises a single bias power source (Fig. 3: 55) electrically coupled to the first bias electrode through a first electrical path and electrically coupled to the second bias electrode through a second electrical path (Fig. 3: conductivity of 21d), as the at least one bias power source. Tamamushi does not teach at least one of the first electrical path and the second electrical path includes a variable impedance element. Tamura is in the field of plasma (abstract) and teaches at least one of the first electrical path and the second electrical path includes a variable impedance element (Fig. 8: 90). It would have been obvious to one of ordinary skill in the art before the effective filling of the claimed invention to modify the device of Tamamushi with the variable element as taught by Tamura in order for the electrode to receive a bias electric since the capacitor provides the electric bias coupling. Allowable Subject Matter Claims 4-9, 11, 14 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to HENRY T LUONG whose telephone number is (571)270-7008. The examiner can normally be reached Monday-Thursday: 8:00-6:00. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Alexander Taningco can be reached at (571) 272-8048. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /Henry Luong/Primary Examiner, Art Unit 2845
Read full office action

Prosecution Timeline

Nov 07, 2024
Application Filed
Sep 10, 2026
Non-Final Rejection mailed — §103 (current)

Precedent Cases

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
76%
Grant Probability
94%
With Interview (+18.0%)
2y 5m (~7m remaining)
Median Time to Grant
Low
PTA Risk
Based on 670 resolved cases by this examiner. Grant probability derived from career allowance rate.

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