Prosecution Insights
Last updated: October 02, 2026
Application No. 18/940,299

ELECTRONIC CIRCUITS FOR ANALYZING ELECTROGENIC CELLS AND RELATED METHODS

Non-Final OA §103
Filed
Nov 07, 2024
Priority
Nov 01, 2017 — provisional 62/580,126 +2 more
Examiner
QIAN, SHIZHI
Art Unit
1795
Tech Center
1700 — Chemical & Materials Engineering
Assignee
President and Fellows of Harvard College
OA Round
1 (Non-Final)
62%
Grant Probability
Moderate
1-2
OA Rounds
1y 4m
Est. Remaining
99%
With Interview

Examiner Intelligence

Grants 62% of resolved cases
62%
Career Allowance Rate
186 granted / 301 resolved
-3.2% vs TC avg
Strong +48% interview lift
Without
With
+47.9%
Interview Lift
resolved cases with interview
Typical timeline
3y 3m
Avg Prosecution
52 currently pending
Career history
372
Total Applications
across all art units

Statute-Specific Performance

§101
1.4%
-38.6% vs TC avg
§103
51.1%
+11.1% vs TC avg
§102
17.0%
-23.0% vs TC avg
§112
28.6%
-11.4% vs TC avg
Black line = Tech Center average estimate • Based on career data from 301 resolved cases

Office Action

§103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Information Disclosure Statement The information disclosure statement (IDS) submitted on 6/17/2025 and 6/16/2026 have been considered by the examiner. Election/Restrictions Applicant's election of Species A, Claims 39-51, without traverse in the reply filed on 06/16/2026 is acknowledged. In the response to restriction/election, Applicant forgot to elect sub-species of species A. During a telephone conversation with Tani Chen, the representative of applicant, on June 17, 2026, a provisional election was made without traverse to prosecute the invention of Species A and Sub-Species A-II. Affirmation of this election must be made by applicant in replying to this Office action. Upon consideration of the claims and the elected species A and sub-species A-II, claims 46 and 48-49 are drawn to Sub-Species A-I (Fig.9A). Claims 46 and 48-49 are therefore withdrawn as being drawn to non-elected sub-Species A-I, and claims 39-45, 47, and 50-51 are examined in the current office action. Claim Objection Claims 39-40 and 47 are objected to because of the following informalities: Claim 39: please amend “the array” to -- the electrode array--. Claim 40: please amend “an electrical voltage signal” to – [[an]] the electrical voltage signal--; “an electrical current signal” to – [[an]] the electrical current signal--. Claim 47: please amend “the electrical current” to -- the electrical current signal--. Appropriate correction is required. Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows: 1. Determining the scope and contents of the prior art. 2. Ascertaining the differences between the prior art and the claims at issue. 3. Resolving the level of ordinary skill in the pertinent art. 4. Considering objective evidence present in the application indicating obviousness or nonobviousness. This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention. Claims 39-45 and 47 are rejected under 35 U.S.C. 103 as being unpatentable over Harrison et al. (Microchip amplifier for in vitro, in vivo, and automated whole cell patch-clamp recording, J. Neurophysiol, 2015, 113, 1275-1282), and in view of Maher et al. (US20040110123A1). Regarding claim 39, Harrison teaches a method of measuring a cellular response (a method of measuring a cellular response is shown in Fig.1), the method comprising: positioning a cell with respect to an electrode so that the cell contacts the electrode (Fig.1 shows a cell contacting an electrode); generating a stimulation signal (the resulting output voltage, Vout, of the operational amplifier is deemed as the stimulation signal) and delivering the stimulation signal to the cell through the electrode (the stimulation signal is delivered to the cell through a negative feedback loop connected between the output terminal of the op amp and the electrode as shown in Fig.1); and receiving a measurement signal from the cell through the electrode in response to the stimulation signal at an input terminal of an operational amplifier coupled to the electrode (Fig.1 shows receiving a measurement signal, Icell, from the cell through the electrode in response the stimulation signal at an input terminal [the inverting terminal] of an operational amplifier coupled to the electrode), wherein one of the stimulation and measurement signals comprises an electrical current signal and one of the stimulation and measurement signals comprises an electrical voltage signal (Fig.1 shows the stimulation signal comprises an electrical voltage signal and the measurement signal comprises an electrical current signal) . Harrison only teaches positioning the cell with respect to an electrode instead of an electrode array, as shown in Fig.1. Maher teaches an electrical stimulation system as shown in Fig.3 as an extracellular current clamp device [para. 0370-0372, 0438, Fig.3]. Electrical stimuli were created via a high-power amplifier ( 320), driven by a pair of digital function generators (380 and 310). The switch (330) allowed defined wells within a 96-well plate to be electrically stimulated with any given time protocol [para. 0438]. The present invention includes electrodes, and electrode arrays, for creating electrical fields across the area of observation [para. 0151-0152]. Multiple electric potential sensors can be attached in arrays to the dipper electrode assembly. This arrangement will be useful to allow a stimulating electrode array to compensate for variations and imperfections in the well shape, volume of saline, variations in the manufacturing process for the electrodes, damage to the electrode assembly, etc. [para. 0163]. Fig.3 shows a stimulating electrode array in the stimulation head 370 [para. 0209]. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the electrode in Harrison to an electrode array, as taught by Maher, since it would provide a stimulating electrode array to compensate for variations and imperfections for the electrodes [para. 0163 in Maher]. Regarding claim 40, modified Harrison teaches the method of claim 39, and Harrison teaches wherein the stimulation signal comprises an electrical voltage signal and the measurement signal comprises an electrical current signal (as outline in the rejection of claim 39 above, the stimulation signal comprises an electrical voltage signal, Vout, which is delivered through the negative feedback loop connected between the output terminal of optional amplifier and the electrode [see Fig.1] and the measurement signal comprises an electrical current signal, Icell [see Fig.1]). Regarding claim 41, modified Harrison teaches the method of claim 40, and Harrison teaches wherein the input terminal of the operational amplifier is a second input terminal of the operational amplifier (the inverting terminal of the operational amplifier as shown in Fig.1 is the second input terminal) , the method further comprising generating the stimulation signal by applying a driving signal at a first input terminal of the operational amplifier (Fig.1 shows applying a driving signal [Vclamp] at a first input terminal [non-inverting terminal] of the operational amplifier). Regarding claim 42, modified Harrison teaches the method of claim 41, and Harrison teaches wherein the driving signal comprises an electrical voltage signal (Vclamp in Fig.1), the method further comprising generating the stimulation signal at an output terminal of the operational amplifier (Vout at the output terminal of the operation amplifier as shown in Fig.1) . Regarding claim 43, modified Harrison teaches the method of claim 42, and Harrison teaches further comprising delivering the stimulation signal to the cell through a negative feedback loop connected between the output terminal of the operational amplifier and the electrode (Fig.1 shows delivering the stimulation signal, Vout, to the cell through a negative feedback loop connected between the output terminal of the operational amplifier and the electrode). Regarding claim 44, modified Harrison teaches the method of claim 43, and Harrison teaches wherein the negative feedback loop is further connected to the second input terminal of the operational amplifier (Fig.1 shows the negative feedback loop is further connected to the second input terminal [inverting terminal] of the operational amplifier). Regarding claim 45, modified Harrison teaches the method of claim 44, and Harrison teaches wherein the first input terminal is a non-inverting terminal and the second input terminal is an inverting terminal (Fig.1 shows the first input terminal connected to Vclamp is a non-inverting terminal and the second input terminal coupled to the electrode is an inverting terminal). Regarding claim 47, modified Harrison teaches the method of claim 43, and Harrison teaches further comprising converting the electrical current of the measurement signal to an electrical voltage through the negative feedback loop (Fig.1 shows converting the electrical current of the measurement signal to an electrical voltage through the negative feedback loop; the resulting output voltage Vout is linearly proportional to the measured current [caption of Fig.1]). Claims 50-51 are rejected under 35 U.S.C. 103 as being unpatentable over Harrison and Maher, as applied to claim 44 above, and further in view of Dunbar et al. (US20150377856A1) and Ambo et al. (US20070030262A1). Regarding claim 50, modified Harrison teaches the method of claim 44, and is silent to wherein the negative feedback loop comprises a switched capacitance, the method further comprising adjusting one or more phases of the switched capacitance to decouple the output terminal of the operational amplifier from the second input terminal of the operational amplifier. Dunbar teaches compensated patch-clamp amplifier as shown in Fig.12, wherein the negative feedback loop comprises a capacitance Cf, the method further comprising adjusting one or more phases of the capacitance to decouple the output terminal of the operational amplifier from the second input terminal (inverting terminal) of the operational amplifier by a reset switch S1 (see Fig.12 and [para. 0060]). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to substitute the resistor in the negative feedback loop of the op amp in modified Harrison with the capacitive feedback loop comprising a switch in parallel with a capacitor, as taught by Dunbar, since it would provide automated compensation [para. 0060 in Dunbar]. Dunbar teaches the capacitance Cf 14 in Fig.12, but is silent to wherein the capacitance is a switched/variable capacitance. Ambo teaches a variable amplifier circuit comprising a feedback capacitor composed of a variable capacitor device (abstract). Fig.1 shows the feedback unit 1 is composed of switches T17 through T19 and a feedback capacitor Cf1 [para. 0022], wherein Cf1 is a variable capacitor device [para. 0025]. Fig.4 shows an embodiment of a feedback capacitor composed of capacitors C1 through Cn and switches SW1 through SWn for parallel connecting the capacitors. Though not specified, when a binary digital signal controls the switches SW1 through SWn to construct the variable capacity, the capacitors C1 through Cn are formed so that its capacitance values have binary weights [para. 0035]. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the capacitor of the capacitive feedback loop in modified Harrison to a variable capacitance, as taught by Ambo, since it would allow to provide variable gains by varying capacitance values of the feedback capacitor [para. 0038 in Ambo]. Regarding claim 51, modified Harrison teaches the method of claim 50, wherein the negative feedback loop comprises an adjustable capacitance, the method further comprising selecting a capacitance value of the adjustable capacitance to control a measurement bandwidth (as outlined in the rejection of claim 50 above, the capacitor of the capacitive feedback loop is an adjustable capacitance, and gains are switched by varying capacitance values of one set of feedback capacitors [para. 0038 in Ambo]). Conclusion The prior arts made of record and not relied upon are considered pertinent to applicant's disclosure: Harrison et al. (A low-power low-noise CMOS amplifier for neural recording applications, IEEE Journal of Solid-state Circuits, 2003, 38, 958-965) teaches an operation amplifier with a negative feedback loop for neural recording applications wherein the negative feedback loop comprises a capacitance C2 in parallel with transistors Ma and Mb (Fig.1). Dai et al. (A 15-V biodirectional current clamp circuit for integrated patch clamp electrophysiology, IEEE Transaction on Circuits and Systems, 2017, 64, 1287-1291) teaches a bidirectional current clamp circuit (see Fig.1). Crescentini et al. (Noise limits of CMOS current interfaces for biosensors: a review, IEEE Transactions on Biomedical Circuits and Systems, 2014, 8, 278-292) teaches TIA coupled to an electrode of a biosensor at the inverting terminal of an op amp. Any inquiry concerning this communication or earlier communications from the examiner should be directed to SHIZHI QIAN whose telephone number is (571)272-3487. The examiner can normally be reached Monday-Thursday 8:00 am-5:00 pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Luan V. Van can be reached on (571) 272-8521. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /SHIZHI QIAN/Primary Examiner, Art Unit 1795
Read full office action

Prosecution Timeline

Nov 07, 2024
Application Filed
Aug 12, 2026
Non-Final Rejection mailed — §103 (current)

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Prosecution Projections

1-2
Expected OA Rounds
62%
Grant Probability
99%
With Interview (+47.9%)
3y 3m (~1y 4m remaining)
Median Time to Grant
Low
PTA Risk
Based on 301 resolved cases by this examiner. Grant probability derived from career allowance rate.

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