DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Specification
The disclosure is objected to because of the following informalities:
Paragraph [0003], line 20 of page 1, should read as, “. . . numbers may stay at erased states for a longer period, such as about one hour, . . .”
Paragraph [0018], line 5 of page 7, should read as, “. . . Mth word line WL(M) to [[from]] the Mth word line WL(M) to 0th word line WL(0) . . .”
Appropriate correction is required.
Claim Objections
Claim 10 is objected to because of the following informalities:
Claim 10, line 6 of page 3, should read as, “. . . the Mth word line to [[from]] the Mth word line to the 0th word line when a cycle . . .”
Claim 14, line 5 of page 4, should read as, “. . . lines at a side of the [[mth]] Mth word line; and . . .”
Appropriate correction is required.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
Claim 10 is rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 10 recites, “. . . switching a program sequence of the block . . . when a cycle number during the N1 program-erase cycles reaches a predetermined threshold number.” (emphasis added) This limitation in claim 10 contradicts the limitations of claim 1 because it expresses the program sequence switching may occur when a predetermined threshold number of cycles may be less than N1. According the FIG. 4 and para. [0018], the threshold number is intended to be equal to N1, i.e., set to 1000 to 2000.
As best understood by the examiner, claim 10 should read as, “. . . switching a program sequence of the block from from the 0th word line to the Mth word line to [[from]] the Mth word line to the 0th word line when a cycle number during the N1 program-erase cycles reaches a predetermined threshold number; wherein the predetermined threshold number is equal to N1.”
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1-5 and 10 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Linnen et al. (US 10943662 B1; hereinafter "Linnen").
Regarding claim 1, Linnen discloses a method for operating a memory device, wherein the memory device comprises a 0th word line to a Mth word line connected to memory cells of a block (FIG. 5B: word lines WL0-WL95 of block BLK0), and wherein the method comprises: programming the block from the 0th word line to the Mth word line for N1 program-erase cycles; and programming the block from the Mth word line to the 0th word line for N2 program-erase cycles (para. [0144]: “In some embodiments, the order in which a set of word lines are programmed is reversed at some point. For example, initially a set of word lines in a block or sub-block may be programmed sequentially in a direction from the source end of the block (or sub-block) to the drain end of the block (or sub-block). At some point, the program order may be reversed such that the set of word lines may be programmed sequentially in a direction from the drain end of the block (or sub-block) to the source end of the block (or sub-block).”; para. [0151]: “In one embodiment, when the program/erase cycle count exceeds a threshold, the order of programming the word lines is changed”); wherein N1 and N2 are positive integers.
The threshold value of program/erase cycles, expressed by Linnen, is interpreted to map to N1. Linnen does not explicitly express a target value of program/erase cycles (N2) following the change of programming direction when the threshold value of program/erase cycles (N1) has been reached. However, it is clear the memory device of Linnen is intended to operate in a reversed programming order for some number (N2) of program/erase cycles for the remaining lifetime of the memory device, and the memory device would inevitably reach the some number (N2), presuming no other terminal failures occurred. Therefore, Linnen teaches a memory device that programs a block in a normal order for a number (N1) of program/erase cycles before reaching the threshold of program/erase cycles, and switching to a reversed programming order for N2 program-erase cycles after programming the block. Under the broadest reasonable interpretation of claim 1, Linnen meets the recited limitations of claim 1.
Regarding claim 2, Linnen an SSD type storage device in para. [0046]; enterprise SSDs are common in the art, known to be comprised of word line layers (e.g. NAND memory structures), of which the programming teachings of Linnen could be applied (Official Notice: see Kim (US 20240040784 A1)).
Regarding claim 3, Linnen discloses switching a program sequence of the block using a controller (FIG. 1A and para. [0046]: “Storage device 100 can implement the technology proposed herein for reversing the sequential programming order . . . Storage device 100 comprises a controller 102, non-volatile memory 104 for storing data, and local memory (e.g. DRAM/ReRAM) 106.”) of the memory device between said programming the block from the 0th word line to the Mth word line for N1 program-erase cycles and said programming the block from the Mth word line to the 0th word line for N2 program-erase cycles.
Regarding claim 4, Linnen discloses a frequency of the switching (para. [0151]: a frequency of the switching is interpreted to map to the threshold of program/erase cycles) is a part of a firmware in the controller (para. [0058]: “In other embodiments, the control circuit can consist only of controller 102 (or other controller), which is an electrical circuit in combination with software (e.g., firmware), that performs the functions described below in the flow charts.”).
Regarding claim 5, a controller with firmware comprising two set of operation codes for a normal program sequence and a reverse program sequence would be an inherent characteristic of the controller 102 of Linnen.
Regarding claim 10, Linnen discloses switching a program sequence of the block from from the 0th word line to the Mth word line to from the Mth word line to the 0th word line when a cycle number during the N1 program-erase cycles reaches a predetermined threshold number (para. [0151]: “In one embodiment, when the program/erase cycle count exceeds a threshold, the order of programming the word lines is changed”).
Allowable Subject Matter
Claim 6-9, 11-13, and 15-19 are allowable.
The following is a statement of reasons for the indication of allowable subject matter:
Regarding claim 6, the prior art made of record and considered pertinent to the applicant’s disclosure, taken individually or in combination, does not teach or suggest the claimed limitation(s) of "recording a cycle number during the N1 program-erase cycles in a controller of the memory device during said programming the block from the 0th word line to the Mth word line for N1 program-erase cycles and recording a cycle number during the N2 program-erase cycles in the controller during said programming the block from the Mth word line to the 0th word line for N2 program-erase cycles, and switching a program sequence of the block between from the 0th word line to the Mth word line and from the Mth word line to the 0th word line when the cycle number during the N1 program-erase cycles or the cycle number during the N2 program-erase cycles reaches a predetermined cycle number for switching," (emphasis added) in combination with the other limitations recited in the claim. Claims 7-9 depend on claim 6; and therefore, are allowable for at least these reasons.
Regarding claim 11, the prior art made of record and considered pertinent to the applicant’s disclosure, taken individually or in combination, does not teach or suggest the claimed limitation(s) of "wherein N1 is larger than or equal to N2, and the method further comprises: after said programming the block from the Mth word line to the 0th word line for N2 program-erase cycles, programming the block from the 0th word line to the Mth word line for N3 program-erase cycles, N3 equal to N2," in combination with the other limitations recited in the claim. Claims 12-13 depend on claim 11; and therefore, are allowable for at least these reasons.
Regarding claim 14, the prior art made of record and considered pertinent to the applicant’s disclosure, taken individually or in combination, does not teach or suggest the claimed limitation(s) of "monitoring a difference between a fail bit count of a first group of word lines at a side of the 0th word line and a fail bit count of a second group of word lines at a side of the [[mth]] Mth word line; and switching a program sequence of the block between from the 0th word line to the Mth word line and from the Mth word line to the 0th word line when the difference is larger than a switching threshold value" in combination with the other limitations recited in the claim. Claims 15-19 depend on claim 14; and therefore, are allowable for at least these reasons. However, claim 14 has an objection as set forth above.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to JUSTIN BRYCE HEISTERKAMP whose telephone number is (703)756-1095. The examiner can normally be reached M-F 0800-1700.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Amir Zarabian can be reached at (571) 272-1852. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/JUSTIN BRYCE HEISTERKAMP/Examiner, Art Unit 2827 /AMIR ZARABIAN/Supervisory Patent Examiner, Art Unit 2827
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