Prosecution Insights
Last updated: July 17, 2026
Application No. 18/944,028

BATTERY VOLTAGE MONITORING SEMICONDUCTOR INTEGRATED CIRCUIT AND ELECTRONIC CIRCUIT SYSTEM

Non-Final OA §102§103
Filed
Nov 12, 2024
Priority
Nov 14, 2023 — JP 2023-193787
Examiner
LE, THANG XUAN
Art Unit
Tech Center
Assignee
Minebea Mitsumi Inc.
OA Round
1 (Non-Final)
88%
Grant Probability
Favorable
1-2
OA Rounds
6m
Est. Remaining
97%
With Interview

Examiner Intelligence

Grants 88% — above average
88%
Career Allowance Rate
800 granted / 905 resolved
+28.4% vs TC avg
Moderate +9% lift
Without
With
+8.6%
Interview Lift
resolved cases with interview
Typical timeline
2y 2m
Avg Prosecution
28 currently pending
Career history
930
Total Applications
across all art units

Statute-Specific Performance

§101
1.1%
-38.9% vs TC avg
§103
68.0%
+28.0% vs TC avg
§102
12.2%
-27.8% vs TC avg
§112
12.9%
-27.1% vs TC avg
Black line = Tech Center average estimate • Based on career data from 905 resolved cases

Office Action

§102 §103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Information Disclosure Statement 1. The information disclosure statements (IDS) submitted on 11/12/2024 and is in compliance with the provisions of 37 CFR 1.97. According, the information disclosure statement is being considered by the Examiner. Examiner Notes 2. Examiner cites particular paragraphs, columns and line numbers in the references as applied to the claims below for the convenience of the applicant. Although the specified citations are representative of the teachings in the art and are applied to the specific limitations within the individual claim, other passages and figures may apply as well. It is respectfully requested that, in preparing responses, the applicant fully consider the references in entirety as potentially teaching all or part of the claimed invention, as well as the context of the passage as taught by the prior art or disclosed by the examiner. Claim Rejections - 35 USC § 102 3. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention. (a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention. 4. Claim 1 is rejected under 35 U.S.C. 102(a)(1) as being anticipated by Liu et al. (CN209169999; hereinafter “Liu” ). Regarding claim 1, Liu discloses, in Fig. 1, a battery voltage monitoring semiconductor integrated circuit, comprising: a voltage input terminal (a voltage input terminal connected to a positive terminal of a battery for receiving a voltage from the battery) to receive an input of a voltage from a monitored battery (see annotated Fig. 1); a voltage dividing circuit (R1, R2) that includes a plurality of series resistors (R1, R2) to divide a voltage at the voltage input terminal (see annotated Fig. 1); an output terminal (an output terminal 1) that outputs a voltage corresponding to a voltage obtained by the voltage dividing circuit dividing the voltage at the voltage input terminal (see Fig. 1); a voltage buffer circuit (U1A) connected between a connection node (a connection node as shown in the annotated Fig. 1) of the plurality of series resistors and the output terminal; and a clamp circuit (a clamping D1) that clamps a potential at the connection node of the plurality of series resistors (see Fig. 1 and abstract). PNG media_image1.png 552 784 media_image1.png Greyscale Claim Rejections - 35 USC § 103 5. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. 6. Claim 1 is rejected under 35 U.S.C. 103 as being unpatentable over Takano et al. (US. Pub. 2022/0271747; hereinafter “Takano”) in view of Liu. Regarding claim 1, Takano discloses, in Figs. 1-5, a battery voltage monitoring semiconductor integrated circuit, comprising: a voltage input terminal (a voltage input terminal Vs connected to a positive terminal of a battery PS1 for receiving a voltage from the battery) to receive an input of a voltage from a monitored battery (see Figs. 1-2A); a voltage dividing circuit (R1, R2) that includes a plurality of series resistors (R1, R2) to divide a voltage at the voltage input terminal (see Fig. 2A); an output terminal (an output terminal OUT, in Fig. 1) that outputs a voltage corresponding to a voltage obtained by the voltage dividing circuit dividing the voltage at the voltage input terminal (see Figs. 1-2A); a voltage buffer circuit (CMP, LGC) connected between a connection node (N0, N1 in annotated Fig. 2A) of the plurality of series resistors and the output terminal. PNG media_image2.png 274 710 media_image2.png Greyscale Takano does not specify that a clamp circuit that clamps a potential at the connection node of the plurality of series resistors. Liu discloses a battery voltage monitoring system comprising a clamp circuit (a clamping D1) that clamps a potential at the connection node of the plurality of series resistors (see Fig. 1 and abstract). It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to employ the a DC power supply monitoring system of Takano by having a clamp circuit that clamps a potential at the connection node of the plurality of series resistors as taught by Liu for purpose of a clamping circuit is connected with operational amplifier, have the protective function such as when the battery reverse connection protection in-phase input end of the amplifier and not cause damage due to over-negative voltage. 7. Claim 5 is rejected under 35 U.S.C. 103 as being unpatentable over Liu in view of Tian et al. (CN 101281216; hereinafter “Tian”). Regarding claim 5, Liu discloses the battery voltage monitoring semiconductor integrated circuit according to claim 1, except for explicitly specify that further comprising: a switch element connected in series with the plurality of series resistors constituting the voltage dividing circuit; and a second external terminal capable of receiving a signal for turning on and off the switch element. Tian discloses a voltage detection circuit (see annotated Fig. 2) comprising a switch element (SW1) connected in series with the plurality of series resistors (R1, R2) constituting the voltage dividing circuit; and a second external terminal capable of receiving a signal for turning on and off the switch element (a switch control circuit for controlling on/off the switch element SW1). It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to employ the battery monitoring system of Liu by having a switch element connected in series with the plurality of series resistors constituting the voltage dividing circuit, and a second external terminal capable of receiving a signal for turning on and off the switch element, as taught by Tian for purpose of the circuit can recover the work point voltage in the state of balance swiftly when quitting the end period of the scanning pattern, thus realizing exact voltage detection threshold value. PNG media_image3.png 428 712 media_image3.png Greyscale 8. Claim 6 is rejected under 35 U.S.C. 103 as being unpatentable over Takano in view of Liu and further in view of Yang et al. (US. Pub. 2012/0158338; hereinafter “Yang”). Regarding claim 6, Takano and Liu disclose an electronic circuit system, Takano further teaches comprising: the battery voltage monitoring semiconductor integrated circuit according to claim 1; and a microcomputer (a microcontroller 10 in Fig. 1) that includes: a voltage output from the output terminal OUT of the voltage detection circuit 21, see Figs. 1 and 2A) of the battery voltage monitoring semiconductor integrated circuit is input to the input terminal of the microcomputer (see Fig. 1). Takano and Liu do not explicitly specify that the microcontroller 10 includes an analog-to-digital converter for converting a voltage from analog to digital signal. Yang discloses a battery management system comprised a microcomputer (1100 in Fig. 2) including an analog-to-digital converter (ADC) to measure a battery voltage (see paragraphs [0009-10]). It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to employ the battery monitoring system of Liu by a microcomputer included an analog-to-digital converter (ADC) to measure a battery voltage, as taught by Yang in order to meet the system design and specification requirement. 9. Claim 10 and 12 are rejected under 35 U.S.C. 103 as being unpatentable over Liu in view of Tian and further in view of Yang. Regarding claim 10, Liu and Tian disclose an electronic circuit system, Liu further teaches comprising: the battery voltage monitoring semiconductor integrated circuit according to claim 5; and a microcomputer (a microcomputer CPU in Fig. 1) that includes: see Fig. 1 and claim 1). Liu and Tian do not explicitly specify that the microcomputer includes an analog-to-digital converter for converting a voltage from analog to digital signal. Yang discloses a battery management system comprised a microcomputer (1100 in Fig. 2) including an analog-to-digital converter (ADC) to measure a battery voltage (see paragraphs [0009-10]). It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to employ the battery monitoring system of Liu and Tian by a microcomputer included an analog-to-digital converter (ADC) to measure a battery voltage, as taught by Yang in order to meet the system design and specification requirement. Regarding claim 12, Liu and Tian disclose an electronic circuit system, comprising: the battery voltage monitoring semiconductor integrated circuit according to claim 5; and Liu and Tian do not explicitly specify that the microcomputer includes an analog-to-digital converter for converting a voltage from analog to digital signal. Yang discloses a battery management system comprised a microcomputer (1100 in Fig. 2) including an analog-to-digital converter (ADC) to measure a battery voltage (see paragraphs [0009-10]). It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to employ the battery monitoring system of Liu and Tian by a microcomputer included an analog-to-digital converter (ADC) to measure a battery voltage, as taught by Yang in order to meet the system design and specification requirement. Allowable Subject Matter 10. Claims 2-4, 7-9 and 11 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to THANG LE whose telephone number is (571)272-9349. The examiner can normally be reached on Monday thru Friday 7:30AM-5:00PM EST. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Huy Phan can be reached on (571) 272-7924. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. For more information about the PAIR system, see http://pair-direct.uspto.gov. Should you have questions on access to the Private PAIR system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative or access to the automated information system, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /THANG X LE/Primary Examiner, Art Unit 2858 7/5/2026
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Prosecution Timeline

Nov 12, 2024
Application Filed
Jul 08, 2026
Non-Final Rejection mailed — §102, §103 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
88%
Grant Probability
97%
With Interview (+8.6%)
2y 2m (~6m remaining)
Median Time to Grant
Low
PTA Risk
Based on 905 resolved cases by this examiner. Grant probability derived from career allowance rate.

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