DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Priorities
Acknowledgment is made of applicant’s claim for foreign priority under 35 U.S.C. 119 (a)-(d). The certified copy has been filed in parent Application No. KR10-2023-0167046, filed on 11/27/2023.
Information Disclosure Statement
The information disclosure statements filed 11/12/2024 has been acknowledged and considered by the examiner. An initialed copy of the PTO-1449 is included in this correspondence.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claims 1-2, 7, and 14-16 are rejected under 35 U.S.C. 103 as being unpatentable over Park (US Pub. 2024/0127744 A1) in view of Ha et al. (US Pub. 2022/0122550 A1).
Regarding claim 1; Park teaches a display device (a display device, Fig.1) comprising:
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(Fig.6 of Park reproduced)
a display panel including a pixel (Fig.1, a display panel 10 comprises a plurality of pixels); and
a panel driver (Fig.1, the display device comprises a data driver 12 including a data voltage supply unit 121 and a sensing circuit 122) configured to apply an initialization voltage (Figs. 2 and 3, para. [0064], the sensing circuit 122 is configured to generate a reference voltage Vref) to the pixel in a first pre-charge period which is included in an active period of a frame period (para. [0064], in each of a display driving, a sensing driving, and a recovery driving, the sensing circuit 122 turns on a first switch SW1 to apply the reference voltage Vref to a readout line 16. In other words, the reference voltage Vref would be applied to the readout line 16 in an active period and a blank period), to apply a data voltage to the pixel (para. [0058-0059], the data voltage supply unit 121 is configured to generate a data voltage VDATA), to perform a sensing operation to the pixel in a sensing period which is included in a blank period of the frame period (Figs. 4 and 6, para. [0066 and 0094], during a sensing period Psen within the blank period Blank, a sensing voltage SVDATA is supplied to pixels of sensing pixel row. The sensing circuit may sense an electrical characteristic of the second pixel PXL2 on the basis of the sensing data voltage SVDATA in the sensing period Psen of the vertical blank period Blank), to apply the initialization voltage to the pixel in a second pre-charge period which is included in the blank period (para. [0064], the first switch SW1 is turned on in a sensing period (i.e., sensing driving) Psen so as to charge the reference voltage Vref to a source node Ns of a pixel PXL) and to apply a previous data voltage to the pixel in a previous frame writing period which is included in the blank period (Figs. 4 and 6, a recovery data voltage VREC including a previous data voltage (e.g., IVDATA and IVDATA’) is supplied to pixels during the blank period Blank).
Park does not teach that the panel driver is further configured to change one of a length of the first pre-charge period and a length of the second pre-charge period based on a frame rate.
Ha teaches the panel driver is further configured to change one of a length of the first pre-charge period and a length of the second pre-charge period based on a frame rate (Figs. 5 and 6, Ha disclose a method of adjusting an initialization voltage VINIT applied to a node N2 to pre-charge a light emitting element EE. The initialization voltage VINIT is determined based on a frame rate. More specifically, para. [0051], when the display device is driven at a first frame rate (“NORMAL”, step S320, Fig.6), a controller 150 may control the initialization voltage VINIT to a first voltage level (e.g., 2V) during a first period. When the display device is driven at a second frame rate (e.g., ADAPTIVE SYNC) higher than the first frame rate, the controller may control the initialization voltage VINIT to a second voltage level (e.g., (2+a)V)) which is higher than the first voltage level during a second period. As shown in Fig.5 reproduced above, the first period is longer than the second period. In other words, by increasing a magnitude of the initialization voltage VINIT, a length of the initialization voltage is decreased (i.e., second period). As such, it would increase the LED turn-on speed).
[AltContent: textbox (Second period)][AltContent: arrow][AltContent: connector][AltContent: connector][AltContent: textbox (First period)][AltContent: arrow][AltContent: connector]
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(Fig.5 of Ha reproduced)
At the time of invention was effectively filed, it would have been obvious to one of ordinary skill in the art to modify the display device of Park to include the teaching of Ha of adjusting a magnitude (and a length) of an initialization voltage based on a frame rate. The motivation would have to improve image quality in a variable frame mode (Ha, para. [0006]).
Regarding claim 2; Park in view of Ha teaches the display device of claim 1 as discussed above. Park further teaches after the previous data voltage is applied in the blank period, a gate-source voltage of a driving transistor of the pixel is equal to or less than a gate-source voltage of the driving transistor of the least one pixel in the active period (para. [0052, 0056, and 0066], in the recovery driving period, a recovery data voltage may be applied to the pixels PXL of the sensing pixel row, for the recovery driving. For example, the panel driving device may apply the recovery data voltage, having the same level as that of the display data voltage immediately before the sensing driving, to the pixels PXL of the sensing pixel row, and thus, corresponding pixels PXL may emit light again, thereby recovering luminance of the sensing pixel row to a state which occurred immediately before the sensing driving. Therefore, a gate-source voltage of a driving transistor DT in the recovery driving would be equal to a gate-source voltage of the driving transistor DT in a display driving (i.e., active period)).
Regarding claim 7; Park in view of Ha teaches the display device of claim 1 as discussed above. Park further teaches a driving transistor (Fig.3, a driving transistor DT) including a gate connected to a gate node, a first terminal connected to a line of a first supply voltage (EVDD, Fig.3) and a second terminal connected to a source node (a source node Ns, Fig.3); a scan transistor (a scan transistor ST1, Fig.3) including a gate receiving a scan signal (a scan signal SCAN, Fig.3), a first terminal connected to a data line (a data line 15) and a second terminal connected to the gate node (see Fig.3); a sensing transistor (a sensing transistor ST2) including a gate receiving a sensing signal (a scan signal SCAN), a first terminal connected to a sensing line (a readout line 16) and a second terminal connected to the source node (the source node Ns); a storage capacitor (a storage capacitor Cst) including a first electrode connected to the gate node and a second electrode connected to the source node (see Fig.3); and a light emitting element (a light emitting element EL) including an anode connected to the source node (Fig.3) and a cathode connected to a line of a second power supply voltage (EVSS, Fig.3).
Regarding claim 14; Park in view of Ha teaches a display device comprising: a display panel including a pixel including a driving transistor (Ha, Fig.3, a driving transistor DT), a scan transistor (Ha, Fig.3, a scan transistor ST1), a sensing transistor (Ha, Fig.3, a sensing transistor ST2) and a light emitting element (Ha, Fig.3, a light emitting element EL); and a panel driver configured to apply an initialization voltage to the driving transistor through the sensing transistor in a first pre-charge period which is included in an active period of a frame period, to apply a data voltage to the driving transistor through the scan transistor in a data writing period which is included in the active period, to perform a sensing operation to the driving transistor in a sensing period which is included in a blank period of the frame period, to apply the initialization voltage to the driving transistor through the sensing transistor in a second pre-charge period which is included in the blank period and to apply a previous data voltage to the driving transistor through the scan transistor in a previous frame writing period which is included in the blank period, wherein a length of the first pre-charge period and a length of the second pre-charge period are different from each other (similar to the analysis of claim 1).
Regarding claim 15; Park in view of Ha teaches a method of operating a display device, the method comprising: changing one of a length of a first pre-charge period which is included in an active period of a frame period and a length of a second pre-charge period which is included in a blank period of the frame period based on a present frame rate; applying an initialization voltage to at least one pixel of pixels in the first pre-charge period; sequentially applying data voltages to the pixels on a row basis in a data writing period which is included in the active period; performing a sensing operation on the at least one pixel in a sensing period which is included in the blank period; applying the initialization voltage to the at least one pixel in the second pre-charge period; and applying a previous data voltage to the at least one pixel in a previous frame data writing period which is included in the blank period (similar to the analysis of claim 1 above).
Regarding claim 16; Park in view of Ha teaches the method of claim 15 as discussed above. The limitation of claim 16 is substantially similar to claim 2. Accordingly, claim 16 is rejected based on the same analysis as claim 2.
Claim 3 is rejected under 35 U.S.C. 103 as being unpatentable over Park (US Pub. 2024/0127744 A1) in view of Ha et al. (US Pub. 2022/0122550 A1) as applied to claim 1 above; further in view of Kim et al. (US Pub. 2018/0293944 A1).
Regarding claim 3; Park in view of Ha teaches the display device of claim 1 as discussed above. Park in view of Ha does not teach the panel driver is configured to change the length of the first pre-charge period based on a first look-up table in which the first pre-charge period gradually decreases as the frame rate increases.
Ha teaches that the panel driver is configured to change the length of the first pre-charge period in which the first pre-charge period gradually decreases as the frame rate increases (see the analysis of claim 1 above, Ha discloses that, a length of the initialization voltage VINIT is decreased when the frame rate is increased).
The motivation is the same as the rejection of claim 1.
Park and Ha do not teach based on a look up table.
Kim teaches a method of determining an initialization voltage according to a frame rate based on a look up table (Figs. 8 and 9, an initialization voltage is determined according to a frame rate based on a look up table).
At the time of invention was effectively filed, it would have been obvious to one of ordinary skill in the art to modify the display device of Park in view of Ha to include the teaching of Kim of determining an initialization voltage according to a frame rate based on a look up table. The motivation would have been in order to facilitate the method of determining initialization voltage.
Allowable Subject Matter
Claims 4-6, 8-13, and 17-20 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter: Prior art fails to teach all limitations recited in dependent claims 4, 5, 8, and 17.
Inquiries
Any inquiry concerning this communication or earlier communications from the examiner should be directed to NGUYEN H TRUONG whose telephone number is (571)270-1630. The examiner can normally be reached M-F: 10-6.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Chanh Nguyen can be reached at 571-272-7772. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/NGUYEN H TRUONG/Examiner, Art Unit 2623
/CHANH D NGUYEN/Supervisory Patent Examiner, Art Unit 2623