Prosecution Insights
Last updated: October 01, 2026
Application No. 18/948,407

ELECTRONIC DEVICE

Non-Final OA §103§112
Filed
Nov 14, 2024
Priority
Aug 24, 2022 — CN 202211021806.X +2 more
Examiner
BUTTAR, MANDEEP S
Art Unit
Tech Center
Assignee
Canaan Creative Co. Ltd.
OA Round
1 (Non-Final)
80%
Grant Probability
Favorable
1-2
OA Rounds
2m
Est. Remaining
96%
With Interview

Examiner Intelligence

Grants 80% — above average
80%
Career Allowance Rate
441 granted / 553 resolved
+19.7% vs TC avg
Strong +16% interview lift
Without
With
+16.0%
Interview Lift
resolved cases with interview
Fast prosecutor
2y 1m
Avg Prosecution
16 currently pending
Career history
563
Total Applications
across all art units

Statute-Specific Performance

§101
0.6%
-39.4% vs TC avg
§103
58.1%
+18.1% vs TC avg
§102
26.6%
-13.4% vs TC avg
§112
10.6%
-29.4% vs TC avg
Black line = Tech Center average estimate • Based on career data from 553 resolved cases

Office Action

§103 §112
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Priority Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55. Information Disclosure Statement The information disclosure statement (IDS) submitted on 11/14/2024 and 7/16/2025 are in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner. Gao was disclosed in the IDS. Claim Rejections - 35 USC § 112 The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. Claim 18 is rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. Claim 18 recites “further comprising a control board”, however, claim 1 already discloses a control board connected to the circuit board. The office is unsure if the claim requires a second control board or a single control board. The office will interpret a single control board provided on the substrate. Dependent claims 19-20 are also rejected under 112(b) as being dependent upon claim 18. Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows: 1. Determining the scope and contents of the prior art. 2. Ascertaining the differences between the prior art and the claims at issue. 3. Resolving the level of ordinary skill in the pertinent art. 4. Considering objective evidence present in the application indicating obviousness or nonobviousness. Claim 1 is rejected under 35 U.S.C. 103 as being unpatentable over Chen (CN 111867338 A) in view of Tian (U.S 2014/0167511 A1). In regards to Claim 1, Chen discloses an electronic device (Fig.2, #10), comprising: a housing (Fig.2, #10); working assemblies (Fig.2, #20 in conjunction with #30) mounted in the housing (Fig.2), wherein each working assembly comprises a circuit board and a radiator (Fig.4-6, #20 and #30), the circuit board comprising a substrate (Fig.6, #20 includes a substrate) and a plurality of working chips (Fig.6, #21-24, rows of working chips) provided on the substrate (Fig.6); and the working assemblies are detachably mounted within the housing (Fig.2, working assemblies are detachable mounted within #10). Chen does disclose the electronic device is electrically operational with cooling fans, but fails to mention anything regarding a power source or such. Chen fails to explicitly disclose: A control board connected to the circuit board; and a power source configured to supply power to the circuit board. However, Tian discloses: A control board (Fig.1, #100), connected to the circuit board (Fig.1, #201); and a power source (Fig.2, #203) configured to supply power to the circuit board (Fig.2 and paragraph [0009], as such the office notes that with the combination of Chen in view of Tian, the electronic device comprising a circuit board and fans (as taught by Chen) would be modified to have a control board and power source electrically connected to the circuit board (as taught by Tian) to ensure said device is powered). Therefore, it would of have been obvious to one of ordinary skill in the art at the time the application was filed to have modified the electronic device comprising a circuit board and fans (as taught by Chen) to additionally include a control board and power source electrically connected to the circuit board (as taught by Tian) to ensure said device is powered. By including a control board and a power source, would enable said device to electrically connect and control components within said device. Claims 2-3, 5, and 7-10 are rejected under 35 U.S.C. 103 as being unpatentable over Chen (CN 111867338 A) in view of Tian (U.S 2014/0167511 A1), and further, in view of MA (U.S 2021/0321527 A1). In regards to Claim 2, Chen in view of Tian disclose the electronic device according to claim 1, further comprising: the radiator comprises a heat dissipation main body (Chen, Fig.4, #30 has a main body (base)) and heat dissipation fins (Chen, Fig.2, #31), wherein the heat dissipation main body comprises a first surface and a second surface opposite to each other (Chen, Fig.2), the first surface is connected to the heat dissipation fins (Chen, Fig.2), the second surface is provided with a plurality of bosses (Chen, Fig.2, the second surface opposite the top includes a plurality of bosses protruding outwards), the bosses are in contact with at least one of the component (Chen, Fig.2, bosses are in contact with chips #21-24), and an extension direction of the bosses is the same as an extension direction of the component (Chen, Fig.2, bosses and the components are extending in the same direction (vertically)). Chen in view of Tian fail to disclose: A plurality of thermal conductive elements, wherein each thermal conductive element covers at least two adjacent working chips and a region between the adjacent working chips; and wherein the bosses contact the thermal conductive elements. However, MA discloses: A plurality of thermal conductive elements (Fig.1a, #28), wherein each thermal conductive element covers at least two adjacent working chips (Fig.1a, #28 covers two chips #26) and a region between the adjacent working chips (Fig.1a, #28 covers a region between the two chips #26); and wherein the bosses contact the thermal conductive elements (Fig.1a, as such the office notes that with the combination of Chen in view of Tian and MA, the electronic device comprising a radiator having a main body, bosses and heat dissipation fins disposed on a circuit board having a plurality of working chips (as taught by Chen) would be modified to include a plurality of heat conducting elements between the chips and heat sink (as taught by MA) to help dissipate heat generated via chips to the radiator). Therefore, it would of have been obvious to one of ordinary skill in the art at the time the application was filed to have modified the electronic device comprising a radiator having a main body, bosses and heat dissipation fins disposed on a circuit board having a plurality of working chips (as taught by Chen) to further include a plurality of heat conducting elements between the chips and heat sink (as taught by MA) to help dissipate heat generated via chips to the radiator. By utilizing a thermal conductive element between the bosses and chips of the radiator, would reduce/remove any thermal gaps between said elements, thus providing a more efficient heat dissipation path. In regards to Claim 3, Chen in view of Tian and MA disclose the electronic device according to claim 2, wherein the plurality of working chips are distributed in rows and columns (Chen Fig.6, section #24), an average spacing between the plurality of working chips in a row direction is greater than an average spacing between the plurality of working chips in a column direction (Chen, Fig.6, the spacing (D2) between the chips in a row are greater than an average of spacing between the column direction), and the thermal conductive elements extend in the column direction (Chen in view of Tian and MA, the plurality of chips (as taught by Chen) would be modified to all include a thermal conductive element extending in the column direction (as taught by MA) to reduce thermal resistance between the chips and radiator). In regards to Claim 5, Chen in view of Tian and MA disclose the electronic device according to claim 2, wherein the plurality of working chips are distributed in rows and columns (Chen Fig.6, section #22-23), an average spacing between the plurality of working chips in a row direction is less than an average spacing between the plurality of working chips in a column direction (Chen Fig.6, the spacing (d1) between the chips on the right side (#22-23) in a row have less spacing than the chips in the column direction), and the thermal conductive elements extend in the row direction (Chen in view of Tian and MA, the plurality of chips (as taught by Chen) would be modified to all include a thermal conductive element extending in the row direction (as taught by MA) to reduce thermal resistance between the chips and radiator). In regards to Claim 7, Chen in view of Tian and MA disclose the electronic device according to claim 2, wherein the thermal conductive elements extend in a direction perpendicular to a heat dissipation direction (MA, Fig.1a, #28 extends in the vertical direction perpendicular to the heat dissipation direction (horizontal direction)). In regards to Claim 8, Chen in view of Tian and MA disclose the electronic device according to claim 7, wherein in the heat dissipation direction, spacing between at least some of adjacent working chips is gradually increased (Chen Fig.6, the spacing between chips in sections #22- 24 in the horizontal direction gradually increase). In regards to Claim 9, Chen in view of Tian and MA disclose the electronic device according to claim 8, wherein the housing (Chen, fig,1) encloses a heat dissipation air duct (Chen, Fig.1, the enclosure interior defines an air duct to allow to travel from inlet to outlet), the circuit board and the radiator are both provided in the heat dissipation air duct (Chen, Fig.1, #1 is provide within the air duct), and the heat dissipation direction is an air direction of the heat dissipation air duct (Chen, Fig.1, horizontally), and wherein the spacing between at least some of adjacent working chips is positively correlated with a distance from the at least some of adjacent working chips to an air inlet of the heat dissipation air duct (Chen, Fig.6, #21-24 are spaced differently between working chips to positively correlate with the distance from the air inlet of the duct, see “On the other hand, it can be understood that, because the cooling air flows through the substrate unit, the cooling air will continuously absorb heat, and the temperature of the cooling air is gradually increased, which results in the temperature of the chip on the substrate unit is gradually increased along the flow direction of the cooling air, that is, the chip temperature is not uniform, the temperature of the chip at the air inlet is low; the temperature of the chip at the air outlet is high; In the embodiment of the invention, opposite to the flow direction of the cooling air, gradually increasing the temperature difference between the heating element and the cooling air by gradually reducing the radiating area corresponding to each of the first heating element row; That is to say, through the embodiment of the invention set, can gradually increase the temperature difference between the heating element row and the cooling air at one end of the air inlet, at the same time, gradually reducing the temperature difference between the heating element row and the cooling air at one end of the air outlet, so that the temperature of the heating element on the base plate unit is gradually accordant along the direction of the cooling wind;”); or wherein an inner cavity of the radiator accommodates a heat dissipation medium, and the heat dissipation direction is a flowing direction of the heat dissipation medium. In regards to Claim 10, Chen in view of Tian and MA disclose the electronic device according to claim 2, wherein the respective working chips have the same size, and/or the respective working chips have the same heating area (Chen Fig.6, chips #22-24 are the same size). Claims 4 and 6 are rejected under 35 U.S.C. 103 as being unpatentable over Chen (CN 111867338 A) in view of Tian (U.S 2014/0167511 A1), MA (U.S 2021/0321527 A1), and further, in view of Gallina (WO 2013081585 A1). In regards to Claim 4, Chen in view of Tian and MA disclose the electronic device according to claim 3, wherein the plurality of working chips form a plurality of working chip columns (Chen, Fig.6). Chen in view of Tian and MA fail to disclose: Voltage regulation circuits are further provided on the substrate, and components of at least some of the voltage regulation circuits are distributed among the working chip columns. However, Gallina discloses: Voltage regulation circuits are further provided on the substrate, and components of at least some of the voltage regulation circuits are distributed among the working chip columns (Fig.13a, some of the chips #178 include voltage regulation circuits, see “In general, one or more chips 178 may be mounted to the back side of the expansion card 174, wherein the chips 178 might include heat generating circuits such as memory and/or voltage regulation circuits”, as such the office notes that with the combination of Chen in view of Tian, MA, and Gallina, the plurality of working chips disposed on the substrate (as taught by Chen) would be modified to include voltage regulation circuits (as taught by Gallina) to provide a steady and safe output voltage). Therefore, it would of have been obvious to one of ordinary skill in the art at the time the application was filed to have modified the plurality of working chips disposed on the substrate (as taught by Chen) to further include voltage regulation circuits (as taught by Gallina) to provide a steady and safe output voltage. By utilizing voltage circuits within the substrate, would stop high voltage spikes, lower thermal and electrical stress and keep chips running properly from unexpected drops in power. In regards to Claim 6, Chen in view of Tian and MA disclose the electronic device according to claim 5, wherein the plurality of working chips form a plurality of working chip rows (Chen, Fig.6). Chen in view of Tian and MA fail to disclose: Voltage regulation circuits are further provided on the substrate, and components of at least some of the voltage regulation circuits are distributed among the working chip rows. However, Gallina discloses: Voltage regulation circuits are further provided on the substrate, and components of at least some of the voltage regulation circuits are distributed among the working chip columns (Fig.13a, some of the chips #178 include voltage regulation circuits, see “In general, one or more chips 178 may be mounted to the back side of the expansion card 174, wherein the chips 178 might include heat generating circuits such as memory and/or voltage regulation circuits”, as such the office notes that with the combination of Chen in view of Tian, MA, and Gallina, the plurality of working chips disposed on the substrate (as taught by Chen) would be modified to include voltage regulation circuits (as taught by Gallina) to provide a steady and safe output voltage). Therefore, it would of have been obvious to one of ordinary skill in the art at the time the application was filed to have modified the plurality of working chips disposed on the substrate (as taught by Chen) to further include voltage regulation circuits (as taught by Gallina) to provide a steady and safe output voltage. By utilizing voltage circuits within the substrate, would stop high voltage spikes, lower thermal and electrical stress and keep chips running properly from unexpected drops in power. Claim 12 is rejected under 35 U.S.C. 103 as being unpatentable over Chen (CN 111867338 A) in view of Tian (U.S 2014/0167511 A1) and further, in view of Degner (U.S 2015/0253822 A1). In regards to Claim 12, Chen in view of Tian disclose the electronic device according to claim 1, wherein the housing encloses a heat dissipation air duct, and the circuit board and the radiator are both provided in the heat dissipation air duct (Chen Fig.1, #01 (pcb + radiator) is placed within the air duct defined by the housing). Chen in view of Tian fail to disclose: The electronic device further comprises a seal provided at end portions of the radiator and the circuit board close to an air inlet of the heat dissipation air duct, wherein the seal extends in a direction perpendicular to an air direction of the heat dissipation air duct. However, Degner discloses: The electronic device (Fig.1 & 4, #100) further comprises a seal (Fig.1, #120/118) provided at end portions of the radiator and the circuit board close to an air inlet of the heat dissipation air duct (Fig.1 & 4, #116 is provided at the end portion of the radiator #404 and circuit board #412-414, wherein the seal extends in a direction perpendicular to an air direction of the heat dissipation air duct (Fig.1-4, #118 would extend in a direction perpendicular to the air direction #314, as such the office notes that with the combination of Chen in view of Tian and Degner, the ends of the assemblies #1 and inlet fan #02 (as taught by Chen) would be modified to include a seal at the end portions of the assemblies and inlet (as taught by Degner) to ensure no air leaks in our out of the interior duct). Therefore, it would of have been obvious to one of ordinary skill in the art at the time the application was filed to have modified the ends of the assemblies #1 and inlet fan #02 (as taught by Chen) would be modified to include a seal at the end portion of the assembly and inlet (as taught by Degner) to ensure no air leaks in our out of the interior duct. By utilizing seals at the end portion, would ensure no air leaks and precent dust and moisture from entering said device. Claim 18 is rejected under 35 U.S.C. 103 as being unpatentable over Chen (CN 111867338 A) in view of Tian (U.S 2014/0167511 A1) and, further, in view of Gao (CN 114201024 A). In regards to Claim 18, Chen in view of Tian disclose the electronic device according to claim 1. Chen in view of Tian fail to disclose: Further comprising a control board, and a signal transmission circuit provided on the substrate, wherein the signal transmission circuit comprises: N stages of working circuits connected in series, wherein each working circuit respectively comprises at least one working chip, where N is an integer greater than 1, a first-stage working circuit is connected to a first system voltage, and an Nth-stage working circuit is connected to a second system voltage, the second system voltage being higher than the first system voltage; and a signal voltage conversion circuit, wherein a first input/output end of the signal voltage conversion circuit is connected to the Nth-stage working circuit, and a second input/output end of the signal voltage conversion circuit is connected to the control board; wherein the signal voltage conversion circuit is configured to perform voltage conversion on a control board signal sent by the control board and then send the converted control board signal to the N stages of working circuits; alternatively, the signal voltage conversion circuit is configured to perform voltage conversion on working circuit signals sent by the N stages of working circuits and then send the converted working circuit signals to the control board. However, Gao discloses: Further comprising a control board (Fig.5, #302), and a signal transmission circuit provided on the substrate (Fig.3), wherein the signal transmission circuit comprises: N stages of working circuits connected in series, wherein each working circuit respectively comprises at least one working chip, where N is an integer greater than 1, a first-stage working circuit is connected to a first system voltage, and an Nth-stage working circuit is connected to a second system voltage, the second system voltage being higher than the first system voltage; and a signal voltage conversion circuit, wherein a first input/output end of the signal voltage conversion circuit is connected to the Nth-stage working circuit, and a second input/output end of the signal voltage conversion circuit is connected to the control board; wherein the signal voltage conversion circuit is configured to perform voltage conversion on a control board signal sent by the control board and then send the converted control board signal to the N stages of working circuits; alternatively, the signal voltage conversion circuit is configured to perform voltage conversion on working circuit signals sent by the N stages of working circuits and then send the converted working circuit signals to the control board (Fig.1-5 and paragraphs [0022-0025], which discloses a control board having a signal voltage circuit, wherein said board and circuit are configured to be connected to a plurality of working chips (fig.4, #A1-An) and wherein the first tier (first stage working circuit) is connected to a first voltage system and a second tier (Nth state working circuit) is connected to a second system voltage, the second system voltage being higher than the first, and wherein each other remaining working chips sent different working voltages and signals, corresponding to their position, as such the office notes that with the combination of Chen in view of Tian and Gao, the working circuits including a control board and a signal transmission circuit (as taught by Chen in view of Tian) would be modified to further include a first and second voltage system which would provide power independently to each working circuit (as taught by Gao) to ensure each circuit is properly supplied with the correct amount of power to work efficiently. Therefore, it would of have been obvious to one of ordinary skill in the art at the time the application was filed to have modified the circuit board including a control board and a signal transmission circuit (as taught by Chen in view of Tian) would be modified to further include a first and second voltage system/circuit which would provide power independently to each working circuit (as taught by Gao) to ensure each circuit is properly supplied with the correct amount of power to work efficiently. In regards to Claim 19, Chen in view of Tian and Gao disclose the electronic device according to claim 18, wherein the first-stage working circuit is configured to receive the control board signal, and the signal voltage conversion circuit is configured to send a working circuit signal of the Nth-stage working circuit to the control board (Gao, Fig.1-5, and paragraphs [0022-0026], which discloses A1 to Am are configured to received control signals from #302 and the voltage conversion circuit is configured to second a working voltages (different based on tiers) to each of the Nth (a1-am) working circuits. Allowable Subject Matter Claims 11 and 13-17 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. In regards to Claim 11, no prior art fairly suggests or discloses “wherein at least one metal piece is provided between the adjacent working chips connected in series, and a thermal conductive element between the adjacent working chips covers the metal piece, wherein a projection of a boss on the substrate corresponds to the metal piece, wherein a projection of the thermal conductive element on the substrate corresponds to the metal piece between the adjacent working chips, and wherein a thickness of the metal piece is less than or equal to a thickness of a working chip, and a thickness direction of the metal piece and a thickness direction of the working chip are perpendicular to the substrate”, in conjunction with claims 10, 2, and the remaining elements. In regards to Claim 13, no prior art fairly suggests or discloses “wherein the seal comprises: a seal body abutting against the end portions of the circuit board and the radiator close to the air inlet; and a seal protruding portion protruding from the seal body and located at a gap between the radiator and the circuit board, wherein the seal protruding portion is an integrated member extending in a length direction of the seal body, and the length direction of the seal body is perpendicular to the air direction; or wherein the seal protruding portion comprises a plurality of sub-protruding portions arranged in a length direction of the seal body, and the length direction of the seal body is perpendicular to the air direction”, in conjunction with the remaining elements. Dependent claims 14-15 are also allowably by virtue of their dependency from claim 13. In regards to Claim 16, no prior art fairly suggests or discloses “wherein a seal protruding towards the circuit board is formed at an end portion of the radiator close to the air inlet, and the seal is in contact with the end portion of the circuit board close to the air inlet, wherein the plurality of working chips form a plurality of working chip rows, an extension direction of the working chip rows is perpendicular to the air direction, and an extension length of the seal is greater than a length of the working chip rows, and wherein an extension length of the seal is less than a length of the circuit board in the direction perpendicular to the air direction”, in conjunction with claim 12 and the remaining elements. In regards to Claim 17, no prior art fairly suggests or discloses “wherein the circuit board is a single- layer circuit board, and the circuit board further comprises: at least one bridging element provided at an intersection of circuit connection lines, wherein the bridging element comprises a zero-ohm resistor and/or a zero-ohm metal patch, and wherein the zero-ohm resistor is provided opposite to a recess portion on the radiator”, in conjunction with the remaining elements. Claim 20 would be allowable if rewritten to overcome the rejection(s) under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), 2nd paragraph, set forth in this Office action and to include all of the limitations of the base claim and any intervening claims. Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Wang (CN 209149236 U) – Discloses a electronic device comprising a circuit board having a substrate and a plurality of working chips, wherein said chips are disposed in rows and columns and spaced apart based on heat dissipation requirement. Any inquiry concerning this communication or earlier communications from the examiner should be directed to MANDEEP S BUTTAR whose telephone number is (571)272-4768. The examiner can normally be reached 7:00AM-4:00PM. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Jayprakash Gandhi can be reached at 571-272-3740. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /MANDEEP S BUTTAR/ Primary Examiner, Art Unit 2841
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Prosecution Timeline

Nov 14, 2024
Application Filed
Sep 17, 2026
Non-Final Rejection mailed — §103, §112 (current)

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